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| 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// | 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file implements the InstX8632 and OperandX8632 classes, | 10 // This file implements the InstX8632 and OperandX8632 classes, |
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| 633 TargetX8632::SSE4_1); | 633 TargetX8632::SSE4_1); |
| 634 emitVariableBlendInst(Opcode, this, Func); | 634 emitVariableBlendInst(Opcode, this, Func); |
| 635 } | 635 } |
| 636 | 636 |
| 637 template <> void InstX8632Imul::emit(const Cfg *Func) const { | 637 template <> void InstX8632Imul::emit(const Cfg *Func) const { |
| 638 Ostream &Str = Func->getContext()->getStrEmit(); | 638 Ostream &Str = Func->getContext()->getStrEmit(); |
| 639 assert(getSrcSize() == 2); | 639 assert(getSrcSize() == 2); |
| 640 if (getDest()->getType() == IceType_i8) { | 640 if (getDest()->getType() == IceType_i8) { |
| 641 // The 8-bit version of imul only allows the form "imul r/m8". | 641 // The 8-bit version of imul only allows the form "imul r/m8". |
| 642 Variable *Src0 = llvm::dyn_cast<Variable>(getSrc(0)); | 642 Variable *Src0 = llvm::dyn_cast<Variable>(getSrc(0)); |
| 643 (void)Src0; |
| 643 assert(Src0 && Src0->getRegNum() == TargetX8632::Reg_eax); | 644 assert(Src0 && Src0->getRegNum() == TargetX8632::Reg_eax); |
| 644 Str << "\timul\t"; | 645 Str << "\timul\t"; |
| 645 getSrc(1)->emit(Func); | 646 getSrc(1)->emit(Func); |
| 646 Str << "\n"; | 647 Str << "\n"; |
| 647 } else if (llvm::isa<Constant>(getSrc(1))) { | 648 } else if (llvm::isa<Constant>(getSrc(1))) { |
| 648 Str << "\timul\t"; | 649 Str << "\timul\t"; |
| 649 getDest()->emit(Func); | 650 getDest()->emit(Func); |
| 650 Str << ", "; | 651 Str << ", "; |
| 651 getSrc(0)->emit(Func); | 652 getSrc(0)->emit(Func); |
| 652 Str << ", "; | 653 Str << ", "; |
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| 679 void InstX8632Shld::emit(const Cfg *Func) const { | 680 void InstX8632Shld::emit(const Cfg *Func) const { |
| 680 Ostream &Str = Func->getContext()->getStrEmit(); | 681 Ostream &Str = Func->getContext()->getStrEmit(); |
| 681 assert(getSrcSize() == 3); | 682 assert(getSrcSize() == 3); |
| 682 assert(getDest() == getSrc(0)); | 683 assert(getDest() == getSrc(0)); |
| 683 Str << "\tshld\t"; | 684 Str << "\tshld\t"; |
| 684 getDest()->emit(Func); | 685 getDest()->emit(Func); |
| 685 Str << ", "; | 686 Str << ", "; |
| 686 getSrc(1)->emit(Func); | 687 getSrc(1)->emit(Func); |
| 687 Str << ", "; | 688 Str << ", "; |
| 688 if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) { | 689 if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) { |
| 690 (void)ShiftReg; |
| 689 assert(ShiftReg->getRegNum() == TargetX8632::Reg_ecx); | 691 assert(ShiftReg->getRegNum() == TargetX8632::Reg_ecx); |
| 690 Str << "cl"; | 692 Str << "cl"; |
| 691 } else { | 693 } else { |
| 692 getSrc(2)->emit(Func); | 694 getSrc(2)->emit(Func); |
| 693 } | 695 } |
| 694 Str << "\n"; | 696 Str << "\n"; |
| 695 } | 697 } |
| 696 | 698 |
| 697 void InstX8632Shld::dump(const Cfg *Func) const { | 699 void InstX8632Shld::dump(const Cfg *Func) const { |
| 698 Ostream &Str = Func->getContext()->getStrDump(); | 700 Ostream &Str = Func->getContext()->getStrDump(); |
| 699 dumpDest(Func); | 701 dumpDest(Func); |
| 700 Str << " = shld." << getDest()->getType() << " "; | 702 Str << " = shld." << getDest()->getType() << " "; |
| 701 dumpSources(Func); | 703 dumpSources(Func); |
| 702 } | 704 } |
| 703 | 705 |
| 704 void InstX8632Shrd::emit(const Cfg *Func) const { | 706 void InstX8632Shrd::emit(const Cfg *Func) const { |
| 705 Ostream &Str = Func->getContext()->getStrEmit(); | 707 Ostream &Str = Func->getContext()->getStrEmit(); |
| 706 assert(getSrcSize() == 3); | 708 assert(getSrcSize() == 3); |
| 707 assert(getDest() == getSrc(0)); | 709 assert(getDest() == getSrc(0)); |
| 708 Str << "\tshrd\t"; | 710 Str << "\tshrd\t"; |
| 709 getDest()->emit(Func); | 711 getDest()->emit(Func); |
| 710 Str << ", "; | 712 Str << ", "; |
| 711 getSrc(1)->emit(Func); | 713 getSrc(1)->emit(Func); |
| 712 Str << ", "; | 714 Str << ", "; |
| 713 if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) { | 715 if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) { |
| 716 (void)ShiftReg; |
| 714 assert(ShiftReg->getRegNum() == TargetX8632::Reg_ecx); | 717 assert(ShiftReg->getRegNum() == TargetX8632::Reg_ecx); |
| 715 Str << "cl"; | 718 Str << "cl"; |
| 716 } else { | 719 } else { |
| 717 getSrc(2)->emit(Func); | 720 getSrc(2)->emit(Func); |
| 718 } | 721 } |
| 719 Str << "\n"; | 722 Str << "\n"; |
| 720 } | 723 } |
| 721 | 724 |
| 722 void InstX8632Shrd::dump(const Cfg *Func) const { | 725 void InstX8632Shrd::dump(const Cfg *Func) const { |
| 723 Ostream &Str = Func->getContext()->getStrDump(); | 726 Ostream &Str = Func->getContext()->getStrDump(); |
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| 1474 default: | 1477 default: |
| 1475 Str << "???"; | 1478 Str << "???"; |
| 1476 break; | 1479 break; |
| 1477 } | 1480 } |
| 1478 Str << "("; | 1481 Str << "("; |
| 1479 Var->dump(Func); | 1482 Var->dump(Func); |
| 1480 Str << ")"; | 1483 Str << ")"; |
| 1481 } | 1484 } |
| 1482 | 1485 |
| 1483 } // end of namespace Ice | 1486 } // end of namespace Ice |
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