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1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// | 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the InstX8632 and OperandX8632 classes, | 10 // This file implements the InstX8632 and OperandX8632 classes, |
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587 getSrc(1)->emit(Func); | 587 getSrc(1)->emit(Func); |
588 Str << "\n"; | 588 Str << "\n"; |
589 } | 589 } |
590 | 590 |
591 template <> void InstX8632Imul::emit(const Cfg *Func) const { | 591 template <> void InstX8632Imul::emit(const Cfg *Func) const { |
592 Ostream &Str = Func->getContext()->getStrEmit(); | 592 Ostream &Str = Func->getContext()->getStrEmit(); |
593 assert(getSrcSize() == 2); | 593 assert(getSrcSize() == 2); |
594 if (getDest()->getType() == IceType_i8) { | 594 if (getDest()->getType() == IceType_i8) { |
595 // The 8-bit version of imul only allows the form "imul r/m8". | 595 // The 8-bit version of imul only allows the form "imul r/m8". |
596 Variable *Src0 = llvm::dyn_cast<Variable>(getSrc(0)); | 596 Variable *Src0 = llvm::dyn_cast<Variable>(getSrc(0)); |
| 597 (void)Src0; |
597 assert(Src0 && Src0->getRegNum() == TargetX8632::Reg_eax); | 598 assert(Src0 && Src0->getRegNum() == TargetX8632::Reg_eax); |
598 Str << "\timul\t"; | 599 Str << "\timul\t"; |
599 getSrc(1)->emit(Func); | 600 getSrc(1)->emit(Func); |
600 Str << "\n"; | 601 Str << "\n"; |
601 } else if (llvm::isa<Constant>(getSrc(1))) { | 602 } else if (llvm::isa<Constant>(getSrc(1))) { |
602 Str << "\timul\t"; | 603 Str << "\timul\t"; |
603 getDest()->emit(Func); | 604 getDest()->emit(Func); |
604 Str << ", "; | 605 Str << ", "; |
605 getSrc(0)->emit(Func); | 606 getSrc(0)->emit(Func); |
606 Str << ", "; | 607 Str << ", "; |
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633 void InstX8632Shld::emit(const Cfg *Func) const { | 634 void InstX8632Shld::emit(const Cfg *Func) const { |
634 Ostream &Str = Func->getContext()->getStrEmit(); | 635 Ostream &Str = Func->getContext()->getStrEmit(); |
635 assert(getSrcSize() == 3); | 636 assert(getSrcSize() == 3); |
636 assert(getDest() == getSrc(0)); | 637 assert(getDest() == getSrc(0)); |
637 Str << "\tshld\t"; | 638 Str << "\tshld\t"; |
638 getDest()->emit(Func); | 639 getDest()->emit(Func); |
639 Str << ", "; | 640 Str << ", "; |
640 getSrc(1)->emit(Func); | 641 getSrc(1)->emit(Func); |
641 Str << ", "; | 642 Str << ", "; |
642 if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) { | 643 if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) { |
| 644 (void)ShiftReg; |
643 assert(ShiftReg->getRegNum() == TargetX8632::Reg_ecx); | 645 assert(ShiftReg->getRegNum() == TargetX8632::Reg_ecx); |
644 Str << "cl"; | 646 Str << "cl"; |
645 } else { | 647 } else { |
646 getSrc(2)->emit(Func); | 648 getSrc(2)->emit(Func); |
647 } | 649 } |
648 Str << "\n"; | 650 Str << "\n"; |
649 } | 651 } |
650 | 652 |
651 void InstX8632Shld::dump(const Cfg *Func) const { | 653 void InstX8632Shld::dump(const Cfg *Func) const { |
652 Ostream &Str = Func->getContext()->getStrDump(); | 654 Ostream &Str = Func->getContext()->getStrDump(); |
653 dumpDest(Func); | 655 dumpDest(Func); |
654 Str << " = shld." << getDest()->getType() << " "; | 656 Str << " = shld." << getDest()->getType() << " "; |
655 dumpSources(Func); | 657 dumpSources(Func); |
656 } | 658 } |
657 | 659 |
658 void InstX8632Shrd::emit(const Cfg *Func) const { | 660 void InstX8632Shrd::emit(const Cfg *Func) const { |
659 Ostream &Str = Func->getContext()->getStrEmit(); | 661 Ostream &Str = Func->getContext()->getStrEmit(); |
660 assert(getSrcSize() == 3); | 662 assert(getSrcSize() == 3); |
661 assert(getDest() == getSrc(0)); | 663 assert(getDest() == getSrc(0)); |
662 Str << "\tshrd\t"; | 664 Str << "\tshrd\t"; |
663 getDest()->emit(Func); | 665 getDest()->emit(Func); |
664 Str << ", "; | 666 Str << ", "; |
665 getSrc(1)->emit(Func); | 667 getSrc(1)->emit(Func); |
666 Str << ", "; | 668 Str << ", "; |
667 if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) { | 669 if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) { |
| 670 (void)ShiftReg; |
668 assert(ShiftReg->getRegNum() == TargetX8632::Reg_ecx); | 671 assert(ShiftReg->getRegNum() == TargetX8632::Reg_ecx); |
669 Str << "cl"; | 672 Str << "cl"; |
670 } else { | 673 } else { |
671 getSrc(2)->emit(Func); | 674 getSrc(2)->emit(Func); |
672 } | 675 } |
673 Str << "\n"; | 676 Str << "\n"; |
674 } | 677 } |
675 | 678 |
676 void InstX8632Shrd::dump(const Cfg *Func) const { | 679 void InstX8632Shrd::dump(const Cfg *Func) const { |
677 Ostream &Str = Func->getContext()->getStrDump(); | 680 Ostream &Str = Func->getContext()->getStrDump(); |
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1408 default: | 1411 default: |
1409 Str << "???"; | 1412 Str << "???"; |
1410 break; | 1413 break; |
1411 } | 1414 } |
1412 Str << "("; | 1415 Str << "("; |
1413 Var->dump(Func); | 1416 Var->dump(Func); |
1414 Str << ")"; | 1417 Str << ")"; |
1415 } | 1418 } |
1416 | 1419 |
1417 } // end of namespace Ice | 1420 } // end of namespace Ice |
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