| OLD | NEW |
| 1 #if defined(__arm__) | 1 #if defined(__arm__) |
| 2 #include "arm_arch.h" | 2 #include "arm_arch.h" |
| 3 | 3 |
| 4 .text | 4 .text |
| 5 .code 32 | 5 .code 32 |
| 6 | 6 |
| 7 .type rem_4bit,%object | 7 .type rem_4bit,%object |
| 8 .align 5 | 8 .align 5 |
| 9 rem_4bit: | 9 rem_4bit: |
| 10 .short 0x0000,0x1C20,0x3840,0x2460 | 10 .short 0x0000,0x1C20,0x3840,0x2460 |
| 11 .short 0x7080,0x6CA0,0x48C0,0x54E0 | 11 .short 0x7080,0x6CA0,0x48C0,0x54E0 |
| 12 .short 0xE100,0xFD20,0xD940,0xC560 | 12 .short 0xE100,0xFD20,0xD940,0xC560 |
| 13 .short 0x9180,0x8DA0,0xA9C0,0xB5E0 | 13 .short 0x9180,0x8DA0,0xA9C0,0xB5E0 |
| 14 .size rem_4bit,.-rem_4bit | 14 .size rem_4bit,.-rem_4bit |
| 15 | 15 |
| 16 .type rem_4bit_get,%function | 16 .type rem_4bit_get,%function |
| 17 rem_4bit_get: | 17 rem_4bit_get: |
| 18 sub r2,pc,#8 | 18 sub r2,pc,#8 |
| 19 sub r2,r2,#32 @ &rem_4bit | 19 sub r2,r2,#32 @ &rem_4bit |
| 20 b .Lrem_4bit_got | 20 b .Lrem_4bit_got |
| 21 nop | 21 nop |
| 22 .size rem_4bit_get,.-rem_4bit_get | 22 .size rem_4bit_get,.-rem_4bit_get |
| 23 | 23 |
| 24 .global gcm_ghash_4bit | 24 .global gcm_ghash_4bit |
| 25 .hidden gcm_ghash_4bit |
| 25 .type gcm_ghash_4bit,%function | 26 .type gcm_ghash_4bit,%function |
| 26 gcm_ghash_4bit: | 27 gcm_ghash_4bit: |
| 27 sub r12,pc,#8 | 28 sub r12,pc,#8 |
| 28 add r3,r2,r3 @ r3 to point at the end | 29 add r3,r2,r3 @ r3 to point at the end |
| 29 stmdb sp!,{r3-r11,lr} @ save r3/end too | 30 stmdb sp!,{r3-r11,lr} @ save r3/end too |
| 30 sub r12,r12,#48 @ &rem_4bit | 31 sub r12,r12,#48 @ &rem_4bit |
| 31 | 32 |
| 32 ldmia r12,{r4-r11} @ copy rem_4bit ... | 33 ldmia r12,{r4-r11} @ copy rem_4bit ... |
| 33 stmdb sp!,{r4-r11} @ ... to stack | 34 stmdb sp!,{r4-r11} @ ... to stack |
| 34 | 35 |
| (...skipping 133 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 168 ldmia sp!,{r4-r11,pc} | 169 ldmia sp!,{r4-r11,pc} |
| 169 #else | 170 #else |
| 170 ldmia sp!,{r4-r11,lr} | 171 ldmia sp!,{r4-r11,lr} |
| 171 tst lr,#1 | 172 tst lr,#1 |
| 172 moveq pc,lr @ be binary compatible with V4, yet | 173 moveq pc,lr @ be binary compatible with V4, yet |
| 173 .word 0xe12fff1e @ interoperable with Thumb ISA:-
) | 174 .word 0xe12fff1e @ interoperable with Thumb ISA:-
) |
| 174 #endif | 175 #endif |
| 175 .size gcm_ghash_4bit,.-gcm_ghash_4bit | 176 .size gcm_ghash_4bit,.-gcm_ghash_4bit |
| 176 | 177 |
| 177 .global gcm_gmult_4bit | 178 .global gcm_gmult_4bit |
| 179 .hidden gcm_gmult_4bit |
| 178 .type gcm_gmult_4bit,%function | 180 .type gcm_gmult_4bit,%function |
| 179 gcm_gmult_4bit: | 181 gcm_gmult_4bit: |
| 180 stmdb sp!,{r4-r11,lr} | 182 stmdb sp!,{r4-r11,lr} |
| 181 ldrb r12,[r0,#15] | 183 ldrb r12,[r0,#15] |
| 182 b rem_4bit_get | 184 b rem_4bit_get |
| 183 .Lrem_4bit_got: | 185 .Lrem_4bit_got: |
| 184 and r14,r12,#0xf0 | 186 and r14,r12,#0xf0 |
| 185 and r12,r12,#0x0f | 187 and r12,r12,#0x0f |
| 186 mov r3,#14 | 188 mov r3,#14 |
| 187 | 189 |
| (...skipping 116 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 304 ldmia sp!,{r4-r11,lr} | 306 ldmia sp!,{r4-r11,lr} |
| 305 tst lr,#1 | 307 tst lr,#1 |
| 306 moveq pc,lr @ be binary compatible with V4, yet | 308 moveq pc,lr @ be binary compatible with V4, yet |
| 307 .word 0xe12fff1e @ interoperable with Thumb ISA:-
) | 309 .word 0xe12fff1e @ interoperable with Thumb ISA:-
) |
| 308 #endif | 310 #endif |
| 309 .size gcm_gmult_4bit,.-gcm_gmult_4bit | 311 .size gcm_gmult_4bit,.-gcm_gmult_4bit |
| 310 #if __ARM_ARCH__>=7 | 312 #if __ARM_ARCH__>=7 |
| 311 .fpu neon | 313 .fpu neon |
| 312 | 314 |
| 313 .global gcm_init_neon | 315 .global gcm_init_neon |
| 316 .hidden gcm_init_neon |
| 314 .type gcm_init_neon,%function | 317 .type gcm_init_neon,%function |
| 315 .align 4 | 318 .align 4 |
| 316 gcm_init_neon: | 319 gcm_init_neon: |
| 317 vld1.64 d7,[r1,:64]! @ load H | 320 vld1.64 d7,[r1,:64]! @ load H |
| 318 vmov.i8 q8,#0xe1 | 321 vmov.i8 q8,#0xe1 |
| 319 vld1.64 d6,[r1,:64] | 322 vld1.64 d6,[r1,:64] |
| 320 vshl.i64 d17,#57 | 323 vshl.i64 d17,#57 |
| 321 vshr.u64 d16,#63 @ t0=0xc2....01 | 324 vshr.u64 d16,#63 @ t0=0xc2....01 |
| 322 vdup.8 q9,d7[7] | 325 vdup.8 q9,d7[7] |
| 323 vshr.u64 d26,d6,#63 | 326 vshr.u64 d26,d6,#63 |
| 324 vshr.s8 q9,#7 @ broadcast carry bit | 327 vshr.s8 q9,#7 @ broadcast carry bit |
| 325 vshl.i64 q3,q3,#1 | 328 vshl.i64 q3,q3,#1 |
| 326 vand q8,q8,q9 | 329 vand q8,q8,q9 |
| 327 vorr d7,d26 @ H<<<=1 | 330 vorr d7,d26 @ H<<<=1 |
| 328 veor q3,q3,q8 @ twisted H | 331 veor q3,q3,q8 @ twisted H |
| 329 vstmia r0,{q3} | 332 vstmia r0,{q3} |
| 330 | 333 |
| 331 .word 0xe12fff1e | 334 .word 0xe12fff1e |
| 332 .size gcm_init_neon,.-gcm_init_neon | 335 .size gcm_init_neon,.-gcm_init_neon |
| 333 | 336 |
| 334 .global gcm_gmult_neon | 337 .global gcm_gmult_neon |
| 338 .hidden gcm_gmult_neon |
| 335 .type gcm_gmult_neon,%function | 339 .type gcm_gmult_neon,%function |
| 336 .align 4 | 340 .align 4 |
| 337 gcm_gmult_neon: | 341 gcm_gmult_neon: |
| 338 vld1.64 d7,[r0,:64]! @ load Xi | 342 vld1.64 d7,[r0,:64]! @ load Xi |
| 339 vld1.64 d6,[r0,:64]! | 343 vld1.64 d6,[r0,:64]! |
| 340 vmov.i64 d29,#0x0000ffffffffffff | 344 vmov.i64 d29,#0x0000ffffffffffff |
| 341 vldmia r1,{d26-d27} @ load twisted H | 345 vldmia r1,{d26-d27} @ load twisted H |
| 342 vmov.i64 d30,#0x00000000ffffffff | 346 vmov.i64 d30,#0x00000000ffffffff |
| 343 #ifdef __ARMEL__ | 347 #ifdef __ARMEL__ |
| 344 vrev64.8 q3,q3 | 348 vrev64.8 q3,q3 |
| 345 #endif | 349 #endif |
| 346 vmov.i64 d31,#0x000000000000ffff | 350 vmov.i64 d31,#0x000000000000ffff |
| 347 veor d28,d26,d27 @ Karatsuba pre-processing | 351 veor d28,d26,d27 @ Karatsuba pre-processing |
| 348 mov r3,#16 | 352 mov r3,#16 |
| 349 b .Lgmult_neon | 353 b .Lgmult_neon |
| 350 .size gcm_gmult_neon,.-gcm_gmult_neon | 354 .size gcm_gmult_neon,.-gcm_gmult_neon |
| 351 | 355 |
| 352 .global gcm_ghash_neon | 356 .global gcm_ghash_neon |
| 357 .hidden gcm_ghash_neon |
| 353 .type gcm_ghash_neon,%function | 358 .type gcm_ghash_neon,%function |
| 354 .align 4 | 359 .align 4 |
| 355 gcm_ghash_neon: | 360 gcm_ghash_neon: |
| 356 vld1.64 d1,[r0,:64]! @ load Xi | 361 vld1.64 d1,[r0,:64]! @ load Xi |
| 357 vld1.64 d0,[r0,:64]! | 362 vld1.64 d0,[r0,:64]! |
| 358 vmov.i64 d29,#0x0000ffffffffffff | 363 vmov.i64 d29,#0x0000ffffffffffff |
| 359 vldmia r1,{d26-d27} @ load twisted H | 364 vldmia r1,{d26-d27} @ load twisted H |
| 360 vmov.i64 d30,#0x00000000ffffffff | 365 vmov.i64 d30,#0x00000000ffffffff |
| 361 #ifdef __ARMEL__ | 366 #ifdef __ARMEL__ |
| 362 vrev64.8 q0,q0 | 367 vrev64.8 q0,q0 |
| (...skipping 153 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 516 vst1.64 d1,[r0,:64]! @ write out Xi | 521 vst1.64 d1,[r0,:64]! @ write out Xi |
| 517 vst1.64 d0,[r0,:64] | 522 vst1.64 d0,[r0,:64] |
| 518 | 523 |
| 519 .word 0xe12fff1e | 524 .word 0xe12fff1e |
| 520 .size gcm_ghash_neon,.-gcm_ghash_neon | 525 .size gcm_ghash_neon,.-gcm_ghash_neon |
| 521 #endif | 526 #endif |
| 522 .asciz "GHASH for ARMv4/NEON, CRYPTOGAMS by <appro@openssl.org>" | 527 .asciz "GHASH for ARMv4/NEON, CRYPTOGAMS by <appro@openssl.org>" |
| 523 .align 2 | 528 .align 2 |
| 524 | 529 |
| 525 #endif | 530 #endif |
| OLD | NEW |