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Side by Side Diff: src/IceTargetLoweringX8632.h

Issue 427843002: Subzero: Add support for SSE4.1 instructions. (Closed) Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master
Patch Set: 1) Fix compilation 2) Fuse conditions in mul lowering to avoid code duplication Created 6 years, 4 months ago
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1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===// 1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file declares the TargetLoweringX8632 class, which 10 // This file declares the TargetLoweringX8632 class, which
(...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after
64 64
65 enum Registers { 65 enum Registers {
66 #define X(val, init, name, name16, name8, scratch, preserved, stackptr, \ 66 #define X(val, init, name, name16, name8, scratch, preserved, stackptr, \
67 frameptr, isI8, isInt, isFP) \ 67 frameptr, isI8, isInt, isFP) \
68 val init, 68 val init,
69 REGX8632_TABLE 69 REGX8632_TABLE
70 #undef X 70 #undef X
71 Reg_NUM 71 Reg_NUM
72 }; 72 };
73 73
74 enum X86InstructionSet {
75 // SSE2 is the PNaCl baseline instruction set.
76 SSE2,
77 SSE4_1
78 };
79
80 X86InstructionSet getInstructionSet() const { return InstructionSet; }
81
74 protected: 82 protected:
75 TargetX8632(Cfg *Func); 83 TargetX8632(Cfg *Func);
76 84
77 virtual void postLower(); 85 virtual void postLower();
78 86
79 virtual void lowerAlloca(const InstAlloca *Inst); 87 virtual void lowerAlloca(const InstAlloca *Inst);
80 virtual void lowerArithmetic(const InstArithmetic *Inst); 88 virtual void lowerArithmetic(const InstArithmetic *Inst);
81 virtual void lowerAssign(const InstAssign *Inst); 89 virtual void lowerAssign(const InstAssign *Inst);
82 virtual void lowerBr(const InstBr *Inst); 90 virtual void lowerBr(const InstBr *Inst);
83 virtual void lowerCall(const InstCall *Inst); 91 virtual void lowerCall(const InstCall *Inst);
(...skipping 91 matching lines...) Expand 10 before | Expand all | Expand 10 after
175 } 183 }
176 void _addps(Variable *Dest, Operand *Src0) { 184 void _addps(Variable *Dest, Operand *Src0) {
177 Context.insert(InstX8632Addps::create(Func, Dest, Src0)); 185 Context.insert(InstX8632Addps::create(Func, Dest, Src0));
178 } 186 }
179 void _addss(Variable *Dest, Operand *Src0) { 187 void _addss(Variable *Dest, Operand *Src0) {
180 Context.insert(InstX8632Addss::create(Func, Dest, Src0)); 188 Context.insert(InstX8632Addss::create(Func, Dest, Src0));
181 } 189 }
182 void _and(Variable *Dest, Operand *Src0) { 190 void _and(Variable *Dest, Operand *Src0) {
183 Context.insert(InstX8632And::create(Func, Dest, Src0)); 191 Context.insert(InstX8632And::create(Func, Dest, Src0));
184 } 192 }
193 void _blendvps(Variable *Dest, Operand *Src0, Operand *Src1) {
194 Context.insert(InstX8632Blendvps::create(Func, Dest, Src0, Src1));
195 }
185 void _br(InstX8632::BrCond Condition, CfgNode *TargetTrue, 196 void _br(InstX8632::BrCond Condition, CfgNode *TargetTrue,
186 CfgNode *TargetFalse) { 197 CfgNode *TargetFalse) {
187 Context.insert( 198 Context.insert(
188 InstX8632Br::create(Func, TargetTrue, TargetFalse, Condition)); 199 InstX8632Br::create(Func, TargetTrue, TargetFalse, Condition));
189 } 200 }
190 void _br(CfgNode *Target) { 201 void _br(CfgNode *Target) {
191 Context.insert(InstX8632Br::create(Func, Target)); 202 Context.insert(InstX8632Br::create(Func, Target));
192 } 203 }
193 void _br(InstX8632::BrCond Condition, CfgNode *Target) { 204 void _br(InstX8632::BrCond Condition, CfgNode *Target) {
194 Context.insert(InstX8632Br::create(Func, Target, Condition)); 205 Context.insert(InstX8632Br::create(Func, Target, Condition));
(...skipping 54 matching lines...) Expand 10 before | Expand all | Expand 10 after
249 void _fld(Operand *Src0) { Context.insert(InstX8632Fld::create(Func, Src0)); } 260 void _fld(Operand *Src0) { Context.insert(InstX8632Fld::create(Func, Src0)); }
250 void _fstp(Variable *Dest) { 261 void _fstp(Variable *Dest) {
251 Context.insert(InstX8632Fstp::create(Func, Dest)); 262 Context.insert(InstX8632Fstp::create(Func, Dest));
252 } 263 }
253 void _idiv(Variable *Dest, Operand *Src0, Operand *Src1) { 264 void _idiv(Variable *Dest, Operand *Src0, Operand *Src1) {
254 Context.insert(InstX8632Idiv::create(Func, Dest, Src0, Src1)); 265 Context.insert(InstX8632Idiv::create(Func, Dest, Src0, Src1));
255 } 266 }
256 void _imul(Variable *Dest, Operand *Src0) { 267 void _imul(Variable *Dest, Operand *Src0) {
257 Context.insert(InstX8632Imul::create(Func, Dest, Src0)); 268 Context.insert(InstX8632Imul::create(Func, Dest, Src0));
258 } 269 }
270 void _insertps(Variable *Dest, Operand *Src0, Operand *Src1) {
271 Context.insert(InstX8632Insertps::create(Func, Dest, Src0, Src1));
272 }
259 void _lea(Variable *Dest, Operand *Src0) { 273 void _lea(Variable *Dest, Operand *Src0) {
260 Context.insert(InstX8632Lea::create(Func, Dest, Src0)); 274 Context.insert(InstX8632Lea::create(Func, Dest, Src0));
261 } 275 }
262 void _mfence() { Context.insert(InstX8632Mfence::create(Func)); } 276 void _mfence() { Context.insert(InstX8632Mfence::create(Func)); }
263 // If Dest=NULL is passed in, then a new variable is created, marked 277 // If Dest=NULL is passed in, then a new variable is created, marked
264 // as infinite register allocation weight, and returned through the 278 // as infinite register allocation weight, and returned through the
265 // in/out Dest argument. 279 // in/out Dest argument.
266 void _mov(Variable *&Dest, Operand *Src0, 280 void _mov(Variable *&Dest, Operand *Src0,
267 int32_t RegNum = Variable::NoRegister) { 281 int32_t RegNum = Variable::NoRegister) {
268 if (Dest == NULL) { 282 if (Dest == NULL) {
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
306 } 320 }
307 void _padd(Variable *Dest, Operand *Src0) { 321 void _padd(Variable *Dest, Operand *Src0) {
308 Context.insert(InstX8632Padd::create(Func, Dest, Src0)); 322 Context.insert(InstX8632Padd::create(Func, Dest, Src0));
309 } 323 }
310 void _pand(Variable *Dest, Operand *Src0) { 324 void _pand(Variable *Dest, Operand *Src0) {
311 Context.insert(InstX8632Pand::create(Func, Dest, Src0)); 325 Context.insert(InstX8632Pand::create(Func, Dest, Src0));
312 } 326 }
313 void _pandn(Variable *Dest, Operand *Src0) { 327 void _pandn(Variable *Dest, Operand *Src0) {
314 Context.insert(InstX8632Pandn::create(Func, Dest, Src0)); 328 Context.insert(InstX8632Pandn::create(Func, Dest, Src0));
315 } 329 }
330 void _pblendvb(Variable *Dest, Operand *Src0, Operand *Src1) {
331 Context.insert(InstX8632Pblendvb::create(Func, Dest, Src0, Src1));
332 }
316 void _pcmpeq(Variable *Dest, Operand *Src0) { 333 void _pcmpeq(Variable *Dest, Operand *Src0) {
317 Context.insert(InstX8632Pcmpeq::create(Func, Dest, Src0)); 334 Context.insert(InstX8632Pcmpeq::create(Func, Dest, Src0));
318 } 335 }
319 void _pcmpgt(Variable *Dest, Operand *Src0) { 336 void _pcmpgt(Variable *Dest, Operand *Src0) {
320 Context.insert(InstX8632Pcmpgt::create(Func, Dest, Src0)); 337 Context.insert(InstX8632Pcmpgt::create(Func, Dest, Src0));
321 } 338 }
322 void _pextrw(Variable *Dest, Operand *Src0, Operand *Src1) { 339 void _pextr(Variable *Dest, Operand *Src0, Operand *Src1) {
323 Context.insert(InstX8632Pextrw::create(Func, Dest, Src0, Src1)); 340 Context.insert(InstX8632Pextr::create(Func, Dest, Src0, Src1));
324 } 341 }
325 void _pinsrw(Variable *Dest, Operand *Src0, Operand *Src1) { 342 void _pinsr(Variable *Dest, Operand *Src0, Operand *Src1) {
326 Context.insert(InstX8632Pinsrw::create(Func, Dest, Src0, Src1)); 343 Context.insert(InstX8632Pinsr::create(Func, Dest, Src0, Src1));
327 } 344 }
328 void _pmullw(Variable *Dest, Operand *Src0) { 345 void _pmull(Variable *Dest, Operand *Src0) {
329 Context.insert(InstX8632Pmullw::create(Func, Dest, Src0)); 346 Context.insert(InstX8632Pmull::create(Func, Dest, Src0));
330 } 347 }
331 void _pmuludq(Variable *Dest, Operand *Src0) { 348 void _pmuludq(Variable *Dest, Operand *Src0) {
332 Context.insert(InstX8632Pmuludq::create(Func, Dest, Src0)); 349 Context.insert(InstX8632Pmuludq::create(Func, Dest, Src0));
333 } 350 }
334 void _pop(Variable *Dest) { 351 void _pop(Variable *Dest) {
335 Context.insert(InstX8632Pop::create(Func, Dest)); 352 Context.insert(InstX8632Pop::create(Func, Dest));
336 } 353 }
337 void _por(Variable *Dest, Operand *Src0) { 354 void _por(Variable *Dest, Operand *Src0) {
338 Context.insert(InstX8632Por::create(Func, Dest, Src0)); 355 Context.insert(InstX8632Por::create(Func, Dest, Src0));
339 } 356 }
(...skipping 77 matching lines...) Expand 10 before | Expand all | Expand 10 after
417 void _xchg(Operand *Dest, Variable *Src) { 434 void _xchg(Operand *Dest, Variable *Src) {
418 Context.insert(InstX8632Xchg::create(Func, Dest, Src)); 435 Context.insert(InstX8632Xchg::create(Func, Dest, Src));
419 // The xchg modifies Dest and Src -- model that update with a FakeDef. 436 // The xchg modifies Dest and Src -- model that update with a FakeDef.
420 Context.insert( 437 Context.insert(
421 InstFakeDef::create(Func, Src, llvm::dyn_cast<Variable>(Dest))); 438 InstFakeDef::create(Func, Src, llvm::dyn_cast<Variable>(Dest)));
422 } 439 }
423 void _xor(Variable *Dest, Operand *Src0) { 440 void _xor(Variable *Dest, Operand *Src0) {
424 Context.insert(InstX8632Xor::create(Func, Dest, Src0)); 441 Context.insert(InstX8632Xor::create(Func, Dest, Src0));
425 } 442 }
426 443
444 X86InstructionSet InstructionSet;
Jim Stichnoth 2014/07/29 23:01:17 Make this const?
wala 2014/07/30 00:11:24 Done.
427 bool IsEbpBasedFrame; 445 bool IsEbpBasedFrame;
428 size_t FrameSizeLocals; 446 size_t FrameSizeLocals;
429 size_t LocalsSizeBytes; 447 size_t LocalsSizeBytes;
430 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; 448 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM];
431 llvm::SmallBitVector ScratchRegs; 449 llvm::SmallBitVector ScratchRegs;
432 llvm::SmallBitVector RegsUsed; 450 llvm::SmallBitVector RegsUsed;
433 SizeT NextLabelNumber; 451 SizeT NextLabelNumber;
434 bool ComputedLiveRanges; 452 bool ComputedLiveRanges;
435 VarList PhysicalRegisters; 453 VarList PhysicalRegisters;
436 static IceString RegNames[]; 454 static IceString RegNames[];
(...skipping 24 matching lines...) Expand all
461 virtual ~TargetGlobalInitX8632() {} 479 virtual ~TargetGlobalInitX8632() {}
462 }; 480 };
463 481
464 template <> void ConstantInteger::emit(GlobalContext *Ctx) const; 482 template <> void ConstantInteger::emit(GlobalContext *Ctx) const;
465 template <> void ConstantFloat::emit(GlobalContext *Ctx) const; 483 template <> void ConstantFloat::emit(GlobalContext *Ctx) const;
466 template <> void ConstantDouble::emit(GlobalContext *Ctx) const; 484 template <> void ConstantDouble::emit(GlobalContext *Ctx) const;
467 485
468 } // end of namespace Ice 486 } // end of namespace Ice
469 487
470 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H 488 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H
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