Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(1229)

Side by Side Diff: src/IceTargetLoweringX8632.h

Issue 427843002: Subzero: Add support for SSE4.1 instructions. (Closed) Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master
Patch Set: Fix an empty line that was deleted Created 6 years, 4 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceInstX8632.def ('k') | src/IceTargetLoweringX8632.cpp » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===// 1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file declares the TargetLoweringX8632 class, which 10 // This file declares the TargetLoweringX8632 class, which
(...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after
64 64
65 enum Registers { 65 enum Registers {
66 #define X(val, init, name, name16, name8, scratch, preserved, stackptr, \ 66 #define X(val, init, name, name16, name8, scratch, preserved, stackptr, \
67 frameptr, isI8, isInt, isFP) \ 67 frameptr, isI8, isInt, isFP) \
68 val init, 68 val init,
69 REGX8632_TABLE 69 REGX8632_TABLE
70 #undef X 70 #undef X
71 Reg_NUM 71 Reg_NUM
72 }; 72 };
73 73
74 enum X86InstructionSet {
75 // SSE2 is the PNaCl baseline instruction set.
76 SSE2,
77 SSE4_1
78 };
79
80 X86InstructionSet getInstructionSet() const { return InstructionSet; }
81
74 protected: 82 protected:
75 TargetX8632(Cfg *Func); 83 TargetX8632(Cfg *Func);
76 84
77 virtual void postLower(); 85 virtual void postLower();
78 86
79 virtual void lowerAlloca(const InstAlloca *Inst); 87 virtual void lowerAlloca(const InstAlloca *Inst);
80 virtual void lowerArithmetic(const InstArithmetic *Inst); 88 virtual void lowerArithmetic(const InstArithmetic *Inst);
81 virtual void lowerAssign(const InstAssign *Inst); 89 virtual void lowerAssign(const InstAssign *Inst);
82 virtual void lowerBr(const InstBr *Inst); 90 virtual void lowerBr(const InstBr *Inst);
83 virtual void lowerCall(const InstCall *Inst); 91 virtual void lowerCall(const InstCall *Inst);
(...skipping 95 matching lines...) Expand 10 before | Expand all | Expand 10 after
179 } 187 }
180 void _addps(Variable *Dest, Operand *Src0) { 188 void _addps(Variable *Dest, Operand *Src0) {
181 Context.insert(InstX8632Addps::create(Func, Dest, Src0)); 189 Context.insert(InstX8632Addps::create(Func, Dest, Src0));
182 } 190 }
183 void _addss(Variable *Dest, Operand *Src0) { 191 void _addss(Variable *Dest, Operand *Src0) {
184 Context.insert(InstX8632Addss::create(Func, Dest, Src0)); 192 Context.insert(InstX8632Addss::create(Func, Dest, Src0));
185 } 193 }
186 void _and(Variable *Dest, Operand *Src0) { 194 void _and(Variable *Dest, Operand *Src0) {
187 Context.insert(InstX8632And::create(Func, Dest, Src0)); 195 Context.insert(InstX8632And::create(Func, Dest, Src0));
188 } 196 }
197 void _blendvps(Variable *Dest, Operand *Src0, Operand *Src1) {
198 Context.insert(InstX8632Blendvps::create(Func, Dest, Src0, Src1));
199 }
189 void _br(InstX8632::BrCond Condition, CfgNode *TargetTrue, 200 void _br(InstX8632::BrCond Condition, CfgNode *TargetTrue,
190 CfgNode *TargetFalse) { 201 CfgNode *TargetFalse) {
191 Context.insert( 202 Context.insert(
192 InstX8632Br::create(Func, TargetTrue, TargetFalse, Condition)); 203 InstX8632Br::create(Func, TargetTrue, TargetFalse, Condition));
193 } 204 }
194 void _br(CfgNode *Target) { 205 void _br(CfgNode *Target) {
195 Context.insert(InstX8632Br::create(Func, Target)); 206 Context.insert(InstX8632Br::create(Func, Target));
196 } 207 }
197 void _br(InstX8632::BrCond Condition, CfgNode *Target) { 208 void _br(InstX8632::BrCond Condition, CfgNode *Target) {
198 Context.insert(InstX8632Br::create(Func, Target, Condition)); 209 Context.insert(InstX8632Br::create(Func, Target, Condition));
(...skipping 54 matching lines...) Expand 10 before | Expand all | Expand 10 after
253 void _fld(Operand *Src0) { Context.insert(InstX8632Fld::create(Func, Src0)); } 264 void _fld(Operand *Src0) { Context.insert(InstX8632Fld::create(Func, Src0)); }
254 void _fstp(Variable *Dest) { 265 void _fstp(Variable *Dest) {
255 Context.insert(InstX8632Fstp::create(Func, Dest)); 266 Context.insert(InstX8632Fstp::create(Func, Dest));
256 } 267 }
257 void _idiv(Variable *Dest, Operand *Src0, Operand *Src1) { 268 void _idiv(Variable *Dest, Operand *Src0, Operand *Src1) {
258 Context.insert(InstX8632Idiv::create(Func, Dest, Src0, Src1)); 269 Context.insert(InstX8632Idiv::create(Func, Dest, Src0, Src1));
259 } 270 }
260 void _imul(Variable *Dest, Operand *Src0) { 271 void _imul(Variable *Dest, Operand *Src0) {
261 Context.insert(InstX8632Imul::create(Func, Dest, Src0)); 272 Context.insert(InstX8632Imul::create(Func, Dest, Src0));
262 } 273 }
274 void _insertps(Variable *Dest, Operand *Src0, Operand *Src1) {
275 Context.insert(InstX8632Insertps::create(Func, Dest, Src0, Src1));
276 }
263 void _lea(Variable *Dest, Operand *Src0) { 277 void _lea(Variable *Dest, Operand *Src0) {
264 Context.insert(InstX8632Lea::create(Func, Dest, Src0)); 278 Context.insert(InstX8632Lea::create(Func, Dest, Src0));
265 } 279 }
266 void _mfence() { Context.insert(InstX8632Mfence::create(Func)); } 280 void _mfence() { Context.insert(InstX8632Mfence::create(Func)); }
267 // If Dest=NULL is passed in, then a new variable is created, marked 281 // If Dest=NULL is passed in, then a new variable is created, marked
268 // as infinite register allocation weight, and returned through the 282 // as infinite register allocation weight, and returned through the
269 // in/out Dest argument. 283 // in/out Dest argument.
270 void _mov(Variable *&Dest, Operand *Src0, 284 void _mov(Variable *&Dest, Operand *Src0,
271 int32_t RegNum = Variable::NoRegister) { 285 int32_t RegNum = Variable::NoRegister) {
272 if (Dest == NULL) { 286 if (Dest == NULL) {
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
310 } 324 }
311 void _padd(Variable *Dest, Operand *Src0) { 325 void _padd(Variable *Dest, Operand *Src0) {
312 Context.insert(InstX8632Padd::create(Func, Dest, Src0)); 326 Context.insert(InstX8632Padd::create(Func, Dest, Src0));
313 } 327 }
314 void _pand(Variable *Dest, Operand *Src0) { 328 void _pand(Variable *Dest, Operand *Src0) {
315 Context.insert(InstX8632Pand::create(Func, Dest, Src0)); 329 Context.insert(InstX8632Pand::create(Func, Dest, Src0));
316 } 330 }
317 void _pandn(Variable *Dest, Operand *Src0) { 331 void _pandn(Variable *Dest, Operand *Src0) {
318 Context.insert(InstX8632Pandn::create(Func, Dest, Src0)); 332 Context.insert(InstX8632Pandn::create(Func, Dest, Src0));
319 } 333 }
334 void _pblendvb(Variable *Dest, Operand *Src0, Operand *Src1) {
335 Context.insert(InstX8632Pblendvb::create(Func, Dest, Src0, Src1));
336 }
320 void _pcmpeq(Variable *Dest, Operand *Src0) { 337 void _pcmpeq(Variable *Dest, Operand *Src0) {
321 Context.insert(InstX8632Pcmpeq::create(Func, Dest, Src0)); 338 Context.insert(InstX8632Pcmpeq::create(Func, Dest, Src0));
322 } 339 }
323 void _pcmpgt(Variable *Dest, Operand *Src0) { 340 void _pcmpgt(Variable *Dest, Operand *Src0) {
324 Context.insert(InstX8632Pcmpgt::create(Func, Dest, Src0)); 341 Context.insert(InstX8632Pcmpgt::create(Func, Dest, Src0));
325 } 342 }
326 void _pextrw(Variable *Dest, Operand *Src0, Operand *Src1) { 343 void _pextr(Variable *Dest, Operand *Src0, Operand *Src1) {
327 Context.insert(InstX8632Pextrw::create(Func, Dest, Src0, Src1)); 344 Context.insert(InstX8632Pextr::create(Func, Dest, Src0, Src1));
328 } 345 }
329 void _pinsrw(Variable *Dest, Operand *Src0, Operand *Src1) { 346 void _pinsr(Variable *Dest, Operand *Src0, Operand *Src1) {
330 Context.insert(InstX8632Pinsrw::create(Func, Dest, Src0, Src1)); 347 Context.insert(InstX8632Pinsr::create(Func, Dest, Src0, Src1));
331 } 348 }
332 void _pmullw(Variable *Dest, Operand *Src0) { 349 void _pmull(Variable *Dest, Operand *Src0) {
333 Context.insert(InstX8632Pmullw::create(Func, Dest, Src0)); 350 Context.insert(InstX8632Pmull::create(Func, Dest, Src0));
334 } 351 }
335 void _pmuludq(Variable *Dest, Operand *Src0) { 352 void _pmuludq(Variable *Dest, Operand *Src0) {
336 Context.insert(InstX8632Pmuludq::create(Func, Dest, Src0)); 353 Context.insert(InstX8632Pmuludq::create(Func, Dest, Src0));
337 } 354 }
338 void _pop(Variable *Dest) { 355 void _pop(Variable *Dest) {
339 Context.insert(InstX8632Pop::create(Func, Dest)); 356 Context.insert(InstX8632Pop::create(Func, Dest));
340 } 357 }
341 void _por(Variable *Dest, Operand *Src0) { 358 void _por(Variable *Dest, Operand *Src0) {
342 Context.insert(InstX8632Por::create(Func, Dest, Src0)); 359 Context.insert(InstX8632Por::create(Func, Dest, Src0));
343 } 360 }
(...skipping 77 matching lines...) Expand 10 before | Expand all | Expand 10 after
421 void _xchg(Operand *Dest, Variable *Src) { 438 void _xchg(Operand *Dest, Variable *Src) {
422 Context.insert(InstX8632Xchg::create(Func, Dest, Src)); 439 Context.insert(InstX8632Xchg::create(Func, Dest, Src));
423 // The xchg modifies Dest and Src -- model that update with a FakeDef. 440 // The xchg modifies Dest and Src -- model that update with a FakeDef.
424 Context.insert( 441 Context.insert(
425 InstFakeDef::create(Func, Src, llvm::dyn_cast<Variable>(Dest))); 442 InstFakeDef::create(Func, Src, llvm::dyn_cast<Variable>(Dest)));
426 } 443 }
427 void _xor(Variable *Dest, Operand *Src0) { 444 void _xor(Variable *Dest, Operand *Src0) {
428 Context.insert(InstX8632Xor::create(Func, Dest, Src0)); 445 Context.insert(InstX8632Xor::create(Func, Dest, Src0));
429 } 446 }
430 447
448 const X86InstructionSet InstructionSet;
431 bool IsEbpBasedFrame; 449 bool IsEbpBasedFrame;
432 size_t FrameSizeLocals; 450 size_t FrameSizeLocals;
433 size_t LocalsSizeBytes; 451 size_t LocalsSizeBytes;
434 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; 452 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM];
435 llvm::SmallBitVector ScratchRegs; 453 llvm::SmallBitVector ScratchRegs;
436 llvm::SmallBitVector RegsUsed; 454 llvm::SmallBitVector RegsUsed;
437 SizeT NextLabelNumber; 455 SizeT NextLabelNumber;
438 bool ComputedLiveRanges; 456 bool ComputedLiveRanges;
439 VarList PhysicalRegisters; 457 VarList PhysicalRegisters;
440 static IceString RegNames[]; 458 static IceString RegNames[];
(...skipping 24 matching lines...) Expand all
465 virtual ~TargetGlobalInitX8632() {} 483 virtual ~TargetGlobalInitX8632() {}
466 }; 484 };
467 485
468 template <> void ConstantInteger::emit(GlobalContext *Ctx) const; 486 template <> void ConstantInteger::emit(GlobalContext *Ctx) const;
469 template <> void ConstantFloat::emit(GlobalContext *Ctx) const; 487 template <> void ConstantFloat::emit(GlobalContext *Ctx) const;
470 template <> void ConstantDouble::emit(GlobalContext *Ctx) const; 488 template <> void ConstantDouble::emit(GlobalContext *Ctx) const;
471 489
472 } // end of namespace Ice 490 } // end of namespace Ice
473 491
474 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H 492 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H
OLDNEW
« no previous file with comments | « src/IceInstX8632.def ('k') | src/IceTargetLoweringX8632.cpp » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698