MIPS64: Add support for architecture revision 6.

src/mips64/constants-mips64.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/v8.h"
 
 #if V8_TARGET_ARCH_MIPS64
 
 #include "src/mips64/constants-mips64.h"
 
@@ skipping 277 matching lines @@
         case INS:
         case EXT:
           return kRegisterType;
         default:
           return kUnsupported;
       }
       break;
     case COP1:    // Coprocessor instructions.
       switch (RsFieldRawNoAssert()) {
         case BC1:   // Branch on coprocessor condition.
+        case BC1EQZ:
+        case BC1NEZ:
           return kImmediateType;
         default:
           return kRegisterType;
       }
       break;
     case COP1X:
       return kRegisterType;
     // 16 bits Immediate type instructions. e.g.: addi dest, src, imm16.
     case REGIMM:
     case BEQ:
     case BNE:
     case BLEZ:
     case BGTZ:
     case ADDI:
     case DADDI:
     case ADDIU:
     case DADDIU:
     case SLTI:
     case SLTIU:
     case ANDI:
     case ORI:
     case XORI:
     case LUI:
     case BEQL:
     case BNEL:
     case BLEZL:
     case BGTZL:
+    case BEQZC:
+    case BNEZC:
     case LB:
     case LH:
     case LWL:
     case LW:
     case LWU:
     case LD:
     case LBU:
     case LHU:
     case LWR:
     case SB:
@@ skipping 14 matching lines @@
     default:
       return kUnsupported;
   }
   return kUnsupported;
 }
 
 
 } }   // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS64