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| 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. |
| 4 |
| 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
| 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
| 7 |
| 8 namespace v8 { |
| 9 namespace internal { |
| 10 namespace compiler { |
| 11 |
| 12 // ARM-specific opcodes that specify which assembly sequence to emit. |
| 13 // Most opcodes specify a single instruction. |
| 14 #define TARGET_ARCH_OPCODE_LIST(V) \ |
| 15 V(ArmAdd) \ |
| 16 V(ArmAnd) \ |
| 17 V(ArmBic) \ |
| 18 V(ArmCmp) \ |
| 19 V(ArmCmn) \ |
| 20 V(ArmTst) \ |
| 21 V(ArmTeq) \ |
| 22 V(ArmOrr) \ |
| 23 V(ArmEor) \ |
| 24 V(ArmSub) \ |
| 25 V(ArmRsb) \ |
| 26 V(ArmMul) \ |
| 27 V(ArmMla) \ |
| 28 V(ArmMls) \ |
| 29 V(ArmSdiv) \ |
| 30 V(ArmUdiv) \ |
| 31 V(ArmMov) \ |
| 32 V(ArmMvn) \ |
| 33 V(ArmBfc) \ |
| 34 V(ArmUbfx) \ |
| 35 V(ArmCallCodeObject) \ |
| 36 V(ArmCallJSFunction) \ |
| 37 V(ArmCallAddress) \ |
| 38 V(ArmPush) \ |
| 39 V(ArmDrop) \ |
| 40 V(ArmVcmpF64) \ |
| 41 V(ArmVaddF64) \ |
| 42 V(ArmVsubF64) \ |
| 43 V(ArmVmulF64) \ |
| 44 V(ArmVmlaF64) \ |
| 45 V(ArmVmlsF64) \ |
| 46 V(ArmVdivF64) \ |
| 47 V(ArmVmodF64) \ |
| 48 V(ArmVnegF64) \ |
| 49 V(ArmVcvtF64S32) \ |
| 50 V(ArmVcvtF64U32) \ |
| 51 V(ArmVcvtS32F64) \ |
| 52 V(ArmVcvtU32F64) \ |
| 53 V(ArmFloat64Load) \ |
| 54 V(ArmFloat64Store) \ |
| 55 V(ArmLoadWord8) \ |
| 56 V(ArmStoreWord8) \ |
| 57 V(ArmLoadWord16) \ |
| 58 V(ArmStoreWord16) \ |
| 59 V(ArmLoadWord32) \ |
| 60 V(ArmStoreWord32) \ |
| 61 V(ArmStoreWriteBarrier) |
| 62 |
| 63 |
| 64 // Addressing modes represent the "shape" of inputs to an instruction. |
| 65 // Many instructions support multiple addressing modes. Addressing modes |
| 66 // are encoded into the InstructionCode of the instruction and tell the |
| 67 // code generator after register allocation which assembler method to call. |
| 68 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
| 69 V(Offset_RI) /* [%r0 + K] */ \ |
| 70 V(Offset_RR) /* [%r0 + %r1] */ \ |
| 71 V(Operand2_I) /* K */ \ |
| 72 V(Operand2_R) /* %r0 */ \ |
| 73 V(Operand2_R_ASR_I) /* %r0 ASR K */ \ |
| 74 V(Operand2_R_LSL_I) /* %r0 LSL K */ \ |
| 75 V(Operand2_R_LSR_I) /* %r0 LSR K */ \ |
| 76 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ |
| 77 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ |
| 78 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ |
| 79 |
| 80 } // namespace compiler |
| 81 } // namespace internal |
| 82 } // namespace v8 |
| 83 |
| 84 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
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Chromium Code Reviews
Issue 426233002:
Land the Fan (disabled) (Closed)
Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge