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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <stdarg.h> | 5 #include <stdarg.h> |
6 #include <stdlib.h> | 6 #include <stdlib.h> |
7 #include <cmath> | 7 #include <cmath> |
8 | 8 |
9 #include "src/v8.h" | 9 #include "src/v8.h" |
10 | 10 |
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2704 } | 2704 } |
2705 break; | 2705 break; |
2706 } | 2706 } |
2707 } | 2707 } |
2708 return; | 2708 return; |
2709 } | 2709 } |
2710 break; | 2710 break; |
2711 } | 2711 } |
2712 case db_x: { | 2712 case db_x: { |
2713 if (FLAG_enable_sudiv) { | 2713 if (FLAG_enable_sudiv) { |
2714 if (!instr->HasW()) { | 2714 if (instr->Bits(5, 4) == 0x1) { |
2715 if (instr->Bits(5, 4) == 0x1) { | 2715 if ((instr->Bit(22) == 0x0) && (instr->Bit(20) == 0x1)) { |
2716 if ((instr->Bit(22) == 0x0) && (instr->Bit(20) == 0x1)) { | 2716 // (s/u)div (in V8 notation matching ARM ISA format) rn = rm/rs |
2717 // sdiv (in V8 notation matching ARM ISA format) rn = rm/rs | 2717 // Format(instr, "'(s/u)div'cond'b 'rn, 'rm, 'rs); |
2718 // Format(instr, "'sdiv'cond'b 'rn, 'rm, 'rs); | 2718 int rm = instr->RmValue(); |
2719 int rm = instr->RmValue(); | 2719 int32_t rm_val = get_register(rm); |
2720 int32_t rm_val = get_register(rm); | 2720 int rs = instr->RsValue(); |
2721 int rs = instr->RsValue(); | 2721 int32_t rs_val = get_register(rs); |
2722 int32_t rs_val = get_register(rs); | 2722 int32_t ret_val = 0; |
2723 int32_t ret_val = 0; | 2723 ASSERT(rs_val != 0); |
2724 ASSERT(rs_val != 0); | 2724 // udiv |
2725 if ((rm_val == kMinInt) && (rs_val == -1)) { | 2725 if (instr->Bit(21) == 0x1) { |
2726 ret_val = kMinInt; | 2726 ret_val = static_cast<int32_t>(static_cast<uint32_t>(rm_val) / |
2727 } else { | 2727 static_cast<uint32_t>(rs_val)); |
2728 ret_val = rm_val / rs_val; | 2728 } else if ((rm_val == kMinInt) && (rs_val == -1)) { |
2729 } | 2729 ret_val = kMinInt; |
2730 set_register(rn, ret_val); | 2730 } else { |
2731 return; | 2731 ret_val = rm_val / rs_val; |
2732 } | 2732 } |
2733 } | 2733 set_register(rn, ret_val); |
2734 } | 2734 return; |
2735 } | 2735 } |
| 2736 } |
| 2737 } |
2736 // Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w"); | 2738 // Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w"); |
2737 addr = rn_val - shifter_operand; | 2739 addr = rn_val - shifter_operand; |
2738 if (instr->HasW()) { | 2740 if (instr->HasW()) { |
2739 set_register(rn, addr); | 2741 set_register(rn, addr); |
2740 } | 2742 } |
2741 break; | 2743 break; |
2742 } | 2744 } |
2743 case ib_x: { | 2745 case ib_x: { |
2744 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) { | 2746 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) { |
2745 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16)); | 2747 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16)); |
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2765 } | 2767 } |
2766 return; | 2768 return; |
2767 } else if (!instr->HasW() && (instr->Bits(6, 4) == 0x1)) { | 2769 } else if (!instr->HasW() && (instr->Bits(6, 4) == 0x1)) { |
2768 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7)); | 2770 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7)); |
2769 uint32_t msbit = static_cast<uint32_t>(instr->Bits(20, 16)); | 2771 uint32_t msbit = static_cast<uint32_t>(instr->Bits(20, 16)); |
2770 if (msbit >= lsbit) { | 2772 if (msbit >= lsbit) { |
2771 // bfc or bfi - bitfield clear/insert. | 2773 // bfc or bfi - bitfield clear/insert. |
2772 uint32_t rd_val = | 2774 uint32_t rd_val = |
2773 static_cast<uint32_t>(get_register(instr->RdValue())); | 2775 static_cast<uint32_t>(get_register(instr->RdValue())); |
2774 uint32_t bitcount = msbit - lsbit + 1; | 2776 uint32_t bitcount = msbit - lsbit + 1; |
2775 uint32_t mask = (1 << bitcount) - 1; | 2777 uint32_t mask = 0xffffffffu >> (32 - bitcount); |
2776 rd_val &= ~(mask << lsbit); | 2778 rd_val &= ~(mask << lsbit); |
2777 if (instr->RmValue() != 15) { | 2779 if (instr->RmValue() != 15) { |
2778 // bfi - bitfield insert. | 2780 // bfi - bitfield insert. |
2779 uint32_t rm_val = | 2781 uint32_t rm_val = |
2780 static_cast<uint32_t>(get_register(instr->RmValue())); | 2782 static_cast<uint32_t>(get_register(instr->RmValue())); |
2781 rm_val &= mask; | 2783 rm_val &= mask; |
2782 rd_val |= rm_val << lsbit; | 2784 rd_val |= rm_val << lsbit; |
2783 } | 2785 } |
2784 set_register(instr->RdValue(), rd_val); | 2786 set_register(instr->RdValue(), rd_val); |
2785 } else { | 2787 } else { |
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3830 uintptr_t address = *stack_slot; | 3832 uintptr_t address = *stack_slot; |
3831 set_register(sp, current_sp + sizeof(uintptr_t)); | 3833 set_register(sp, current_sp + sizeof(uintptr_t)); |
3832 return address; | 3834 return address; |
3833 } | 3835 } |
3834 | 3836 |
3835 } } // namespace v8::internal | 3837 } } // namespace v8::internal |
3836 | 3838 |
3837 #endif // USE_SIMULATOR | 3839 #endif // USE_SIMULATOR |
3838 | 3840 |
3839 #endif // V8_TARGET_ARCH_ARM | 3841 #endif // V8_TARGET_ARCH_ARM |
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