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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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915 // The constant for movw and movt should be in the range 0-0xffff. | 915 // The constant for movw and movt should be in the range 0-0xffff. |
916 void movw(Register reg, uint32_t immediate, Condition cond = al); | 916 void movw(Register reg, uint32_t immediate, Condition cond = al); |
917 void movt(Register reg, uint32_t immediate, Condition cond = al); | 917 void movt(Register reg, uint32_t immediate, Condition cond = al); |
918 | 918 |
919 void bic(Register dst, Register src1, const Operand& src2, | 919 void bic(Register dst, Register src1, const Operand& src2, |
920 SBit s = LeaveCC, Condition cond = al); | 920 SBit s = LeaveCC, Condition cond = al); |
921 | 921 |
922 void mvn(Register dst, const Operand& src, | 922 void mvn(Register dst, const Operand& src, |
923 SBit s = LeaveCC, Condition cond = al); | 923 SBit s = LeaveCC, Condition cond = al); |
924 | 924 |
| 925 // Shift instructions |
| 926 |
| 927 void asr(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC, |
| 928 Condition cond = al) { |
| 929 if (src2.is_reg()) { |
| 930 mov(dst, Operand(src1, ASR, src2.rm()), s, cond); |
| 931 } else { |
| 932 mov(dst, Operand(src1, ASR, src2.immediate()), s, cond); |
| 933 } |
| 934 } |
| 935 |
| 936 void lsl(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC, |
| 937 Condition cond = al) { |
| 938 if (src2.is_reg()) { |
| 939 mov(dst, Operand(src1, LSL, src2.rm()), s, cond); |
| 940 } else { |
| 941 mov(dst, Operand(src1, LSL, src2.immediate()), s, cond); |
| 942 } |
| 943 } |
| 944 |
| 945 void lsr(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC, |
| 946 Condition cond = al) { |
| 947 if (src2.is_reg()) { |
| 948 mov(dst, Operand(src1, LSR, src2.rm()), s, cond); |
| 949 } else { |
| 950 mov(dst, Operand(src1, LSR, src2.immediate()), s, cond); |
| 951 } |
| 952 } |
| 953 |
925 // Multiply instructions | 954 // Multiply instructions |
926 | 955 |
927 void mla(Register dst, Register src1, Register src2, Register srcA, | 956 void mla(Register dst, Register src1, Register src2, Register srcA, |
928 SBit s = LeaveCC, Condition cond = al); | 957 SBit s = LeaveCC, Condition cond = al); |
929 | 958 |
930 void mls(Register dst, Register src1, Register src2, Register srcA, | 959 void mls(Register dst, Register src1, Register src2, Register srcA, |
931 Condition cond = al); | 960 Condition cond = al); |
932 | 961 |
933 void sdiv(Register dst, Register src1, Register src2, | 962 void sdiv(Register dst, Register src1, Register src2, |
934 Condition cond = al); | 963 Condition cond = al); |
935 | 964 |
| 965 void udiv(Register dst, Register src1, Register src2, Condition cond = al); |
| 966 |
936 void mul(Register dst, Register src1, Register src2, | 967 void mul(Register dst, Register src1, Register src2, |
937 SBit s = LeaveCC, Condition cond = al); | 968 SBit s = LeaveCC, Condition cond = al); |
938 | 969 |
939 void smlal(Register dstL, Register dstH, Register src1, Register src2, | 970 void smlal(Register dstL, Register dstH, Register src1, Register src2, |
940 SBit s = LeaveCC, Condition cond = al); | 971 SBit s = LeaveCC, Condition cond = al); |
941 | 972 |
942 void smull(Register dstL, Register dstH, Register src1, Register src2, | 973 void smull(Register dstL, Register dstH, Register src1, Register src2, |
943 SBit s = LeaveCC, Condition cond = al); | 974 SBit s = LeaveCC, Condition cond = al); |
944 | 975 |
945 void umlal(Register dstL, Register dstH, Register src1, Register src2, | 976 void umlal(Register dstL, Register dstH, Register src1, Register src2, |
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1283 int SizeOfCodeGeneratedSince(Label* label) { | 1314 int SizeOfCodeGeneratedSince(Label* label) { |
1284 return pc_offset() - label->pos(); | 1315 return pc_offset() - label->pos(); |
1285 } | 1316 } |
1286 | 1317 |
1287 // Check the number of instructions generated from label to here. | 1318 // Check the number of instructions generated from label to here. |
1288 int InstructionsGeneratedSince(Label* label) { | 1319 int InstructionsGeneratedSince(Label* label) { |
1289 return SizeOfCodeGeneratedSince(label) / kInstrSize; | 1320 return SizeOfCodeGeneratedSince(label) / kInstrSize; |
1290 } | 1321 } |
1291 | 1322 |
1292 // Check whether an immediate fits an addressing mode 1 instruction. | 1323 // Check whether an immediate fits an addressing mode 1 instruction. |
1293 bool ImmediateFitsAddrMode1Instruction(int32_t imm32); | 1324 static bool ImmediateFitsAddrMode1Instruction(int32_t imm32); |
1294 | 1325 |
1295 // Check whether an immediate fits an addressing mode 2 instruction. | 1326 // Check whether an immediate fits an addressing mode 2 instruction. |
1296 bool ImmediateFitsAddrMode2Instruction(int32_t imm32); | 1327 bool ImmediateFitsAddrMode2Instruction(int32_t imm32); |
1297 | 1328 |
1298 // Class for scoping postponing the constant pool generation. | 1329 // Class for scoping postponing the constant pool generation. |
1299 class BlockConstPoolScope { | 1330 class BlockConstPoolScope { |
1300 public: | 1331 public: |
1301 explicit BlockConstPoolScope(Assembler* assem) : assem_(assem) { | 1332 explicit BlockConstPoolScope(Assembler* assem) : assem_(assem) { |
1302 assem_->StartBlockConstPool(); | 1333 assem_->StartBlockConstPool(); |
1303 } | 1334 } |
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1624 public: | 1655 public: |
1625 explicit EnsureSpace(Assembler* assembler) { | 1656 explicit EnsureSpace(Assembler* assembler) { |
1626 assembler->CheckBuffer(); | 1657 assembler->CheckBuffer(); |
1627 } | 1658 } |
1628 }; | 1659 }; |
1629 | 1660 |
1630 | 1661 |
1631 } } // namespace v8::internal | 1662 } } // namespace v8::internal |
1632 | 1663 |
1633 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1664 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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