MIPS: Only generate a single normal IC per kind per slow-mode map.

src/mips/stub-cache-mips.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/v8.h"
 
 #if V8_TARGET_ARCH_MIPS
 
 #include "src/codegen.h"
 #include "src/ic-inl.h"
@@ skipping 1245 matching lines @@
 
 Handle<Code> PropertyICCompiler::CompilePolymorphic(TypeHandleList* types,
                                                     CodeHandleList* handlers,
                                                     Handle<Name> name,
                                                     Code::StubType type,
                                                     IcCheckType check) {
   Label miss;
 
   if (check == PROPERTY &&
       (kind() == Code::KEYED_LOAD_IC || kind() == Code::KEYED_STORE_IC)) {
-    __ Branch(&miss, ne, this->name(), Operand(name));
+    // In case we are compiling an IC for dictionary loads and stores, just
+    // check whether the name is unique.
+    if (name.is_identical_to(isolate()->factory()->normal_ic_symbol())) {
+      __ JumpIfNotUniqueName(this->name(), &miss);
+    } else {
+      __ Branch(&miss, ne, this->name(), Operand(name));
+    }
   }
 
   Label number_case;
   Register match = scratch2();
   Label* smi_target = IncludesNumberType(types) ? &number_case : &miss;
   __ JumpIfSmi(receiver(), smi_target, match);  // Reg match is 0 if Smi.
 
   // Polymorphic keyed stores may use the map register
   Register map_reg = scratch1();
   ASSERT(kind() != Code::KEYED_STORE_IC ||
@@ skipping 102 matching lines @@
 
   TailCallBuiltin(masm, Builtins::kKeyedLoadIC_Miss);
 }
 
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS