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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. |
6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
7 | 7 |
8 #include "vm/flow_graph_compiler.h" | 8 #include "vm/flow_graph_compiler.h" |
9 | 9 |
10 #include "vm/ast_printer.h" | 10 #include "vm/ast_printer.h" |
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1602 __ LoadMultipleDFromOffset(dtmp0, 2, FP, source_offset); | 1602 __ LoadMultipleDFromOffset(dtmp0, 2, FP, source_offset); |
1603 __ StoreMultipleDToOffset(dtmp0, 2, FP, dest_offset); | 1603 __ StoreMultipleDToOffset(dtmp0, 2, FP, dest_offset); |
1604 } | 1604 } |
1605 } else { | 1605 } else { |
1606 ASSERT(source.IsConstant()); | 1606 ASSERT(source.IsConstant()); |
1607 const Object& constant = source.constant(); | 1607 const Object& constant = source.constant(); |
1608 if (destination.IsRegister()) { | 1608 if (destination.IsRegister()) { |
1609 __ LoadObject(destination.reg(), constant); | 1609 __ LoadObject(destination.reg(), constant); |
1610 } else if (destination.IsFpuRegister()) { | 1610 } else if (destination.IsFpuRegister()) { |
1611 const DRegister dst = EvenDRegisterOf(destination.fpu_reg()); | 1611 const DRegister dst = EvenDRegisterOf(destination.fpu_reg()); |
1612 __ LoadObject(TMP, constant); | 1612 if (Utils::DoublesBitEqual(Double::Cast(constant).value(), 0.0) && |
1613 __ AddImmediate(TMP, TMP, Double::value_offset() - kHeapObjectTag); | 1613 TargetCPUFeatures::neon_supported()) { |
1614 __ vldrd(dst, Address(TMP, 0)); | 1614 QRegister qdst = destination.fpu_reg(); |
1615 __ veorq(qdst, qdst, qdst); | |
regis
2014/07/29 21:43:17
Why not veord?
Mmm, it looks like Zach did not imp
| |
1616 } else { | |
1617 __ LoadObject(TMP, constant); | |
1618 __ AddImmediate(TMP, TMP, Double::value_offset() - kHeapObjectTag); | |
1619 __ vldrd(dst, Address(TMP, 0)); | |
1620 } | |
1615 } else if (destination.IsDoubleStackSlot()) { | 1621 } else if (destination.IsDoubleStackSlot()) { |
1622 if (Utils::DoublesBitEqual(Double::Cast(constant).value(), 0.0) && | |
1623 TargetCPUFeatures::neon_supported()) { | |
1624 __ veorq(QTMP, QTMP, QTMP); | |
1625 } else { | |
1626 __ LoadObject(TMP, constant); | |
1627 __ AddImmediate(TMP, TMP, Double::value_offset() - kHeapObjectTag); | |
1628 __ vldrd(DTMP, Address(TMP, 0)); | |
1629 } | |
1616 const intptr_t dest_offset = destination.ToStackSlotOffset(); | 1630 const intptr_t dest_offset = destination.ToStackSlotOffset(); |
1617 __ LoadObject(TMP, constant); | |
1618 __ AddImmediate(TMP, TMP, Double::value_offset() - kHeapObjectTag); | |
1619 __ vldrd(DTMP, Address(TMP, 0)); | |
1620 __ StoreDToOffset(DTMP, FP, dest_offset); | 1631 __ StoreDToOffset(DTMP, FP, dest_offset); |
1621 } else { | 1632 } else { |
1622 ASSERT(destination.IsStackSlot()); | 1633 ASSERT(destination.IsStackSlot()); |
1623 const intptr_t dest_offset = destination.ToStackSlotOffset(); | 1634 const intptr_t dest_offset = destination.ToStackSlotOffset(); |
1624 __ LoadObject(TMP, constant); | 1635 __ LoadObject(TMP, constant); |
1625 __ StoreToOffset(kWord, TMP, FP, dest_offset); | 1636 __ StoreToOffset(kWord, TMP, FP, dest_offset); |
1626 } | 1637 } |
1627 } | 1638 } |
1628 | 1639 |
1629 move->Eliminate(); | 1640 move->Eliminate(); |
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1772 DRegister dreg = EvenDRegisterOf(reg); | 1783 DRegister dreg = EvenDRegisterOf(reg); |
1773 __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex)); | 1784 __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex)); |
1774 } | 1785 } |
1775 | 1786 |
1776 | 1787 |
1777 #undef __ | 1788 #undef __ |
1778 | 1789 |
1779 } // namespace dart | 1790 } // namespace dart |
1780 | 1791 |
1781 #endif // defined TARGET_ARCH_ARM | 1792 #endif // defined TARGET_ARCH_ARM |
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