Contribution of PowerPC port.

src/base/platform/platform-posix.cc

Index: src/base/platform/platform-posix.cc
diff --git a/src/base/platform/platform-posix.cc b/src/base/platform/platform-posix.cc
index b63163146d9bbf88450cf387a209dcebd555bcaa..c9ed5fa88c1163deb9eaace6233051fce201b9cc 100644
--- a/src/base/platform/platform-posix.cc
+++ b/src/base/platform/platform-posix.cc
@@ -148,6 +148,8 @@ int OS::ActivationFrameAlignment() {
   return 8;
 #elif V8_TARGET_ARCH_MIPS
   return 8;
+#elif V8_TARGET_ARCH_PPC
+  return 16;
 #else
   // Otherwise we just assume 16 byte alignment, i.e.:
   // - With gcc 4.4 the tree vectorization optimizer can generate code
@@ -238,6 +240,14 @@ void* OS::GetRandomMmapAddr() {
   // the hint address to 46 bits to give the kernel a fighting chance of
   // fulfilling our placement request.
   raw_addr &= V8_UINT64_C(0x3ffffffff000);
+#elif V8_TARGET_ARCH_PPC64
+# if V8_TARGET_ARCH_PPC_BE
+  // Big-endian Linux: 44 bits of virtual addressing.
+  raw_addr &= V8_UINT64_C(0x03fffffff000);
+# else
+  // Little-endian Linux: 48 bits of virtual addressing.
+  raw_addr &= V8_UINT64_C(0x3ffffffff000);
+# endif
 #else
   raw_addr &= 0x3ffff000;
 
@@ -292,6 +302,8 @@ void OS::DebugBreak() {
   asm("break");
 #elif V8_HOST_ARCH_MIPS64
   asm("break");
+#elif V8_HOST_ARCH_PPC
+  asm("twge 2,2");
 #elif V8_HOST_ARCH_IA32
 #if defined(__native_client__)
   asm("hlt");
@@ -604,9 +616,13 @@ void Thread::Join() {
 
 
 void Thread::YieldCPU() {
+#if V8_TARGET_ARCH_PPC
+  OS::Sleep(0);
+#else
   int result = sched_yield();
   ASSERT_EQ(0, result);
   USE(result);
+#endif
 }