| Index: src/ppc/macro-assembler-ppc.cc
|
| diff --git a/src/arm/macro-assembler-arm.cc b/src/ppc/macro-assembler-ppc.cc
|
| similarity index 51%
|
| copy from src/arm/macro-assembler-arm.cc
|
| copy to src/ppc/macro-assembler-ppc.cc
|
| index b8cae01bc57d029b7f1a2f45ed88116a92b55b48..ebda91544401d3c60ec694d9a914dc72fd9852b6 100644
|
| --- a/src/arm/macro-assembler-arm.cc
|
| +++ b/src/ppc/macro-assembler-ppc.cc
|
| @@ -1,12 +1,16 @@
|
| // Copyright 2012 the V8 project authors. All rights reserved.
|
| +//
|
| +// Copyright IBM Corp. 2012, 2013. All rights reserved.
|
| +//
|
| // Use of this source code is governed by a BSD-style license that can be
|
| // found in the LICENSE file.
|
|
|
| +#include <assert.h> // For assert
|
| #include <limits.h> // For LONG_MIN, LONG_MAX.
|
|
|
| #include "src/v8.h"
|
|
|
| -#if V8_TARGET_ARCH_ARM
|
| +#if V8_TARGET_ARCH_PPC
|
|
|
| #include "src/bootstrapper.h"
|
| #include "src/codegen.h"
|
| @@ -30,118 +34,111 @@ MacroAssembler::MacroAssembler(Isolate* arg_isolate, void* buffer, int size)
|
|
|
|
|
| void MacroAssembler::Jump(Register target, Condition cond) {
|
| - bx(target, cond);
|
| + ASSERT(cond == al);
|
| + mtctr(target);
|
| + bctr();
|
| }
|
|
|
|
|
| void MacroAssembler::Jump(intptr_t target, RelocInfo::Mode rmode,
|
| - Condition cond) {
|
| - ASSERT(RelocInfo::IsCodeTarget(rmode));
|
| - mov(pc, Operand(target, rmode), LeaveCC, cond);
|
| + Condition cond, CRegister cr) {
|
| + Label skip;
|
| +
|
| + if (cond != al) b(NegateCondition(cond), &skip, cr);
|
| +
|
| + ASSERT(rmode == RelocInfo::CODE_TARGET ||
|
| + rmode == RelocInfo::RUNTIME_ENTRY);
|
| +
|
| + mov(r0, Operand(target, rmode));
|
| + mtctr(r0);
|
| + bctr();
|
| +
|
| + bind(&skip);
|
| + // mov(pc, Operand(target, rmode), LeaveCC, cond);
|
| }
|
|
|
|
|
| void MacroAssembler::Jump(Address target, RelocInfo::Mode rmode,
|
| - Condition cond) {
|
| + Condition cond, CRegister cr) {
|
| ASSERT(!RelocInfo::IsCodeTarget(rmode));
|
| - Jump(reinterpret_cast<intptr_t>(target), rmode, cond);
|
| + Jump(reinterpret_cast<intptr_t>(target), rmode, cond, cr);
|
| }
|
|
|
|
|
| void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode,
|
| Condition cond) {
|
| ASSERT(RelocInfo::IsCodeTarget(rmode));
|
| - // 'code' is always generated ARM code, never THUMB code
|
| + // 'code' is always generated ppc code, never THUMB code
|
| AllowDeferredHandleDereference embedding_raw_address;
|
| Jump(reinterpret_cast<intptr_t>(code.location()), rmode, cond);
|
| }
|
|
|
|
|
| int MacroAssembler::CallSize(Register target, Condition cond) {
|
| - return kInstrSize;
|
| + return 2 * kInstrSize;
|
| }
|
|
|
|
|
| void MacroAssembler::Call(Register target, Condition cond) {
|
| - // Block constant pool for the call instruction sequence.
|
| - BlockConstPoolScope block_const_pool(this);
|
| + BlockTrampolinePoolScope block_trampoline_pool(this);
|
| Label start;
|
| bind(&start);
|
| - blx(target, cond);
|
| + ASSERT(cond == al); // in prep of removal of condition
|
| +
|
| + // Statement positions are expected to be recorded when the target
|
| + // address is loaded.
|
| + positions_recorder()->WriteRecordedPositions();
|
| +
|
| + // branch via link register and set LK bit for return point
|
| + mtlr(target);
|
| + bclr(BA, SetLK);
|
| +
|
| ASSERT_EQ(CallSize(target, cond), SizeOfCodeGeneratedSince(&start));
|
| }
|
|
|
|
|
| int MacroAssembler::CallSize(
|
| Address target, RelocInfo::Mode rmode, Condition cond) {
|
| - Instr mov_instr = cond | MOV | LeaveCC;
|
| Operand mov_operand = Operand(reinterpret_cast<intptr_t>(target), rmode);
|
| - return kInstrSize +
|
| - mov_operand.instructions_required(this, mov_instr) * kInstrSize;
|
| + return (2 + instructions_required_for_mov(mov_operand)) * kInstrSize;
|
| }
|
|
|
|
|
| -int MacroAssembler::CallStubSize(
|
| - CodeStub* stub, TypeFeedbackId ast_id, Condition cond) {
|
| - return CallSize(stub->GetCode(), RelocInfo::CODE_TARGET, ast_id, cond);
|
| -}
|
| -
|
| -
|
| -int MacroAssembler::CallSizeNotPredictableCodeSize(Isolate* isolate,
|
| - Address target,
|
| - RelocInfo::Mode rmode,
|
| - Condition cond) {
|
| - Instr mov_instr = cond | MOV | LeaveCC;
|
| - Operand mov_operand = Operand(reinterpret_cast<intptr_t>(target), rmode);
|
| - return kInstrSize +
|
| - mov_operand.instructions_required(NULL, mov_instr) * kInstrSize;
|
| +int MacroAssembler::CallSizeNotPredictableCodeSize(
|
| + Address target, RelocInfo::Mode rmode, Condition cond) {
|
| + return (2 + kMovInstructionsNoConstantPool) * kInstrSize;
|
| }
|
|
|
|
|
| void MacroAssembler::Call(Address target,
|
| RelocInfo::Mode rmode,
|
| - Condition cond,
|
| - TargetAddressStorageMode mode) {
|
| - // Block constant pool for the call instruction sequence.
|
| - BlockConstPoolScope block_const_pool(this);
|
| - Label start;
|
| - bind(&start);
|
| -
|
| - bool old_predictable_code_size = predictable_code_size();
|
| - if (mode == NEVER_INLINE_TARGET_ADDRESS) {
|
| - set_predictable_code_size(true);
|
| - }
|
| + Condition cond) {
|
| + BlockTrampolinePoolScope block_trampoline_pool(this);
|
| + ASSERT(cond == al);
|
|
|
| #ifdef DEBUG
|
| // Check the expected size before generating code to ensure we assume the same
|
| // constant pool availability (e.g., whether constant pool is full or not).
|
| int expected_size = CallSize(target, rmode, cond);
|
| + Label start;
|
| + bind(&start);
|
| #endif
|
|
|
| - // Call sequence on V7 or later may be :
|
| - // movw ip, #... @ call address low 16
|
| - // movt ip, #... @ call address high 16
|
| - // blx ip
|
| - // @ return address
|
| - // Or for pre-V7 or values that may be back-patched
|
| - // to avoid ICache flushes:
|
| - // ldr ip, [pc, #...] @ call address
|
| - // blx ip
|
| - // @ return address
|
| -
|
| // Statement positions are expected to be recorded when the target
|
| - // address is loaded. The mov method will automatically record
|
| - // positions when pc is the target, since this is not the case here
|
| - // we have to do it explicitly.
|
| + // address is loaded.
|
| positions_recorder()->WriteRecordedPositions();
|
|
|
| - mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode));
|
| - blx(ip, cond);
|
| + // This can likely be optimized to make use of bc() with 24bit relative
|
| + //
|
| + // RecordRelocInfo(x.rmode_, x.imm_);
|
| + // bc( BA, .... offset, LKset);
|
| + //
|
| +
|
| + mov(ip, Operand(reinterpret_cast<intptr_t>(target), rmode));
|
| + mtlr(ip);
|
| + bclr(BA, SetLK);
|
|
|
| ASSERT_EQ(expected_size, SizeOfCodeGeneratedSince(&start));
|
| - if (mode == NEVER_INLINE_TARGET_ADDRESS) {
|
| - set_predictable_code_size(old_predictable_code_size);
|
| - }
|
| }
|
|
|
|
|
| @@ -157,29 +154,38 @@ int MacroAssembler::CallSize(Handle<Code> code,
|
| void MacroAssembler::Call(Handle<Code> code,
|
| RelocInfo::Mode rmode,
|
| TypeFeedbackId ast_id,
|
| - Condition cond,
|
| - TargetAddressStorageMode mode) {
|
| + Condition cond) {
|
| + BlockTrampolinePoolScope block_trampoline_pool(this);
|
| + ASSERT(RelocInfo::IsCodeTarget(rmode));
|
| +
|
| +#ifdef DEBUG
|
| + // Check the expected size before generating code to ensure we assume the same
|
| + // constant pool availability (e.g., whether constant pool is full or not).
|
| + int expected_size = CallSize(code, rmode, ast_id, cond);
|
| Label start;
|
| bind(&start);
|
| - ASSERT(RelocInfo::IsCodeTarget(rmode));
|
| +#endif
|
| +
|
| if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) {
|
| SetRecordedAstId(ast_id);
|
| rmode = RelocInfo::CODE_TARGET_WITH_ID;
|
| }
|
| - // 'code' is always generated ARM code, never THUMB code
|
| - AllowDeferredHandleDereference embedding_raw_address;
|
| - Call(reinterpret_cast<Address>(code.location()), rmode, cond, mode);
|
| + AllowDeferredHandleDereference using_raw_address;
|
| + Call(reinterpret_cast<Address>(code.location()), rmode, cond);
|
| + ASSERT_EQ(expected_size, SizeOfCodeGeneratedSince(&start));
|
| }
|
|
|
|
|
| void MacroAssembler::Ret(Condition cond) {
|
| - bx(lr, cond);
|
| + ASSERT(cond == al);
|
| + blr();
|
| }
|
|
|
|
|
| void MacroAssembler::Drop(int count, Condition cond) {
|
| + ASSERT(cond == al);
|
| if (count > 0) {
|
| - add(sp, sp, Operand(count * kPointerSize), LeaveCC, cond);
|
| + Add(sp, sp, count * kPointerSize, r0);
|
| }
|
| }
|
|
|
| @@ -190,24 +196,8 @@ void MacroAssembler::Ret(int drop, Condition cond) {
|
| }
|
|
|
|
|
| -void MacroAssembler::Swap(Register reg1,
|
| - Register reg2,
|
| - Register scratch,
|
| - Condition cond) {
|
| - if (scratch.is(no_reg)) {
|
| - eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
|
| - eor(reg2, reg2, Operand(reg1), LeaveCC, cond);
|
| - eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
|
| - } else {
|
| - mov(scratch, reg1, LeaveCC, cond);
|
| - mov(reg1, reg2, LeaveCC, cond);
|
| - mov(reg2, scratch, LeaveCC, cond);
|
| - }
|
| -}
|
| -
|
| -
|
| void MacroAssembler::Call(Label* target) {
|
| - bl(target);
|
| + b(target, SetLK);
|
| }
|
|
|
|
|
| @@ -220,13 +210,13 @@ void MacroAssembler::Push(Handle<Object> handle) {
|
| void MacroAssembler::Move(Register dst, Handle<Object> value) {
|
| AllowDeferredHandleDereference smi_check;
|
| if (value->IsSmi()) {
|
| - mov(dst, Operand(value));
|
| + LoadSmiLiteral(dst, reinterpret_cast<Smi *>(*value));
|
| } else {
|
| ASSERT(value->IsHeapObject());
|
| if (isolate()->heap()->InNewSpace(*value)) {
|
| Handle<Cell> cell = isolate()->factory()->NewCell(value);
|
| mov(dst, Operand(cell));
|
| - ldr(dst, FieldMemOperand(dst, Cell::kValueOffset));
|
| + LoadP(dst, FieldMemOperand(dst, Cell::kValueOffset));
|
| } else {
|
| mov(dst, Operand(value));
|
| }
|
| @@ -235,209 +225,61 @@ void MacroAssembler::Move(Register dst, Handle<Object> value) {
|
|
|
|
|
| void MacroAssembler::Move(Register dst, Register src, Condition cond) {
|
| + ASSERT(cond == al);
|
| if (!dst.is(src)) {
|
| - mov(dst, src, LeaveCC, cond);
|
| + mr(dst, src);
|
| }
|
| }
|
|
|
|
|
| -void MacroAssembler::Move(DwVfpRegister dst, DwVfpRegister src) {
|
| +void MacroAssembler::Move(DoubleRegister dst, DoubleRegister src) {
|
| if (!dst.is(src)) {
|
| - vmov(dst, src);
|
| - }
|
| -}
|
| -
|
| -
|
| -void MacroAssembler::Mls(Register dst, Register src1, Register src2,
|
| - Register srcA, Condition cond) {
|
| - if (CpuFeatures::IsSupported(MLS)) {
|
| - CpuFeatureScope scope(this, MLS);
|
| - mls(dst, src1, src2, srcA, cond);
|
| - } else {
|
| - ASSERT(!dst.is(srcA));
|
| - mul(ip, src1, src2, LeaveCC, cond);
|
| - sub(dst, srcA, ip, LeaveCC, cond);
|
| - }
|
| -}
|
| -
|
| -
|
| -void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
|
| - Condition cond) {
|
| - if (!src2.is_reg() &&
|
| - !src2.must_output_reloc_info(this) &&
|
| - src2.immediate() == 0) {
|
| - mov(dst, Operand::Zero(), LeaveCC, cond);
|
| - } else if (!(src2.instructions_required(this) == 1) &&
|
| - !src2.must_output_reloc_info(this) &&
|
| - CpuFeatures::IsSupported(ARMv7) &&
|
| - IsPowerOf2(src2.immediate() + 1)) {
|
| - ubfx(dst, src1, 0,
|
| - WhichPowerOf2(static_cast<uint32_t>(src2.immediate()) + 1), cond);
|
| - } else {
|
| - and_(dst, src1, src2, LeaveCC, cond);
|
| - }
|
| -}
|
| -
|
| -
|
| -void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width,
|
| - Condition cond) {
|
| - ASSERT(lsb < 32);
|
| - if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
|
| - int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
|
| - and_(dst, src1, Operand(mask), LeaveCC, cond);
|
| - if (lsb != 0) {
|
| - mov(dst, Operand(dst, LSR, lsb), LeaveCC, cond);
|
| - }
|
| - } else {
|
| - ubfx(dst, src1, lsb, width, cond);
|
| + fmr(dst, src);
|
| }
|
| }
|
|
|
|
|
| -void MacroAssembler::Sbfx(Register dst, Register src1, int lsb, int width,
|
| - Condition cond) {
|
| - ASSERT(lsb < 32);
|
| - if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
|
| - int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
|
| - and_(dst, src1, Operand(mask), LeaveCC, cond);
|
| - int shift_up = 32 - lsb - width;
|
| - int shift_down = lsb + shift_up;
|
| - if (shift_up != 0) {
|
| - mov(dst, Operand(dst, LSL, shift_up), LeaveCC, cond);
|
| - }
|
| - if (shift_down != 0) {
|
| - mov(dst, Operand(dst, ASR, shift_down), LeaveCC, cond);
|
| - }
|
| - } else {
|
| - sbfx(dst, src1, lsb, width, cond);
|
| - }
|
| -}
|
| -
|
| -
|
| -void MacroAssembler::Bfi(Register dst,
|
| - Register src,
|
| - Register scratch,
|
| - int lsb,
|
| - int width,
|
| - Condition cond) {
|
| - ASSERT(0 <= lsb && lsb < 32);
|
| - ASSERT(0 <= width && width < 32);
|
| - ASSERT(lsb + width < 32);
|
| - ASSERT(!scratch.is(dst));
|
| - if (width == 0) return;
|
| - if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
|
| - int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
|
| - bic(dst, dst, Operand(mask));
|
| - and_(scratch, src, Operand((1 << width) - 1));
|
| - mov(scratch, Operand(scratch, LSL, lsb));
|
| - orr(dst, dst, scratch);
|
| - } else {
|
| - bfi(dst, src, lsb, width, cond);
|
| - }
|
| -}
|
| -
|
| -
|
| -void MacroAssembler::Bfc(Register dst, Register src, int lsb, int width,
|
| - Condition cond) {
|
| - ASSERT(lsb < 32);
|
| - if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
|
| - int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
|
| - bic(dst, src, Operand(mask));
|
| - } else {
|
| - Move(dst, src, cond);
|
| - bfc(dst, lsb, width, cond);
|
| - }
|
| -}
|
| -
|
| -
|
| -void MacroAssembler::Usat(Register dst, int satpos, const Operand& src,
|
| - Condition cond) {
|
| - if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
|
| - ASSERT(!dst.is(pc) && !src.rm().is(pc));
|
| - ASSERT((satpos >= 0) && (satpos <= 31));
|
| -
|
| - // These asserts are required to ensure compatibility with the ARMv7
|
| - // implementation.
|
| - ASSERT((src.shift_op() == ASR) || (src.shift_op() == LSL));
|
| - ASSERT(src.rs().is(no_reg));
|
| +void MacroAssembler::MultiPush(RegList regs) {
|
| + int16_t num_to_push = NumberOfBitsSet(regs);
|
| + int16_t stack_offset = num_to_push * kPointerSize;
|
|
|
| - Label done;
|
| - int satval = (1 << satpos) - 1;
|
| -
|
| - if (cond != al) {
|
| - b(NegateCondition(cond), &done); // Skip saturate if !condition.
|
| - }
|
| - if (!(src.is_reg() && dst.is(src.rm()))) {
|
| - mov(dst, src);
|
| + subi(sp, sp, Operand(stack_offset));
|
| + for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
|
| + if ((regs & (1 << i)) != 0) {
|
| + stack_offset -= kPointerSize;
|
| + StoreP(ToRegister(i), MemOperand(sp, stack_offset));
|
| }
|
| - tst(dst, Operand(~satval));
|
| - b(eq, &done);
|
| - mov(dst, Operand::Zero(), LeaveCC, mi); // 0 if negative.
|
| - mov(dst, Operand(satval), LeaveCC, pl); // satval if positive.
|
| - bind(&done);
|
| - } else {
|
| - usat(dst, satpos, src, cond);
|
| }
|
| }
|
|
|
|
|
| -void MacroAssembler::Load(Register dst,
|
| - const MemOperand& src,
|
| - Representation r) {
|
| - ASSERT(!r.IsDouble());
|
| - if (r.IsInteger8()) {
|
| - ldrsb(dst, src);
|
| - } else if (r.IsUInteger8()) {
|
| - ldrb(dst, src);
|
| - } else if (r.IsInteger16()) {
|
| - ldrsh(dst, src);
|
| - } else if (r.IsUInteger16()) {
|
| - ldrh(dst, src);
|
| - } else {
|
| - ldr(dst, src);
|
| - }
|
| -}
|
| -
|
| +void MacroAssembler::MultiPop(RegList regs) {
|
| + int16_t stack_offset = 0;
|
|
|
| -void MacroAssembler::Store(Register src,
|
| - const MemOperand& dst,
|
| - Representation r) {
|
| - ASSERT(!r.IsDouble());
|
| - if (r.IsInteger8() || r.IsUInteger8()) {
|
| - strb(src, dst);
|
| - } else if (r.IsInteger16() || r.IsUInteger16()) {
|
| - strh(src, dst);
|
| - } else {
|
| - if (r.IsHeapObject()) {
|
| - AssertNotSmi(src);
|
| - } else if (r.IsSmi()) {
|
| - AssertSmi(src);
|
| + for (int16_t i = 0; i < kNumRegisters; i++) {
|
| + if ((regs & (1 << i)) != 0) {
|
| + LoadP(ToRegister(i), MemOperand(sp, stack_offset));
|
| + stack_offset += kPointerSize;
|
| }
|
| - str(src, dst);
|
| }
|
| + addi(sp, sp, Operand(stack_offset));
|
| }
|
|
|
|
|
| void MacroAssembler::LoadRoot(Register destination,
|
| Heap::RootListIndex index,
|
| Condition cond) {
|
| - if (CpuFeatures::IsSupported(MOVW_MOVT_IMMEDIATE_LOADS) &&
|
| - isolate()->heap()->RootCanBeTreatedAsConstant(index) &&
|
| - !predictable_code_size()) {
|
| - // The CPU supports fast immediate values, and this root will never
|
| - // change. We will load it as a relocatable immediate value.
|
| - Handle<Object> root(&isolate()->heap()->roots_array_start()[index]);
|
| - mov(destination, Operand(root), LeaveCC, cond);
|
| - return;
|
| - }
|
| - ldr(destination, MemOperand(kRootRegister, index << kPointerSizeLog2), cond);
|
| + ASSERT(cond == al);
|
| + LoadP(destination, MemOperand(kRootRegister,
|
| + index << kPointerSizeLog2), r0);
|
| }
|
|
|
|
|
| void MacroAssembler::StoreRoot(Register source,
|
| Heap::RootListIndex index,
|
| Condition cond) {
|
| - str(source, MemOperand(kRootRegister, index << kPointerSizeLog2), cond);
|
| + ASSERT(cond == al);
|
| + StoreP(source, MemOperand(kRootRegister, index << kPointerSizeLog2), r0);
|
| }
|
|
|
|
|
| @@ -445,9 +287,12 @@ void MacroAssembler::InNewSpace(Register object,
|
| Register scratch,
|
| Condition cond,
|
| Label* branch) {
|
| + // N.B. scratch may be same register as object
|
| ASSERT(cond == eq || cond == ne);
|
| - and_(scratch, object, Operand(ExternalReference::new_space_mask(isolate())));
|
| - cmp(scratch, Operand(ExternalReference::new_space_start(isolate())));
|
| + mov(r0, Operand(ExternalReference::new_space_mask(isolate())));
|
| + and_(scratch, object, r0);
|
| + mov(r0, Operand(ExternalReference::new_space_start(isolate())));
|
| + cmp(scratch, r0);
|
| b(cond, branch);
|
| }
|
|
|
| @@ -475,11 +320,11 @@ void MacroAssembler::RecordWriteField(
|
| // of the object, so so offset must be a multiple of kPointerSize.
|
| ASSERT(IsAligned(offset, kPointerSize));
|
|
|
| - add(dst, object, Operand(offset - kHeapObjectTag));
|
| + Add(dst, object, offset - kHeapObjectTag, r0);
|
| if (emit_debug_code()) {
|
| Label ok;
|
| - tst(dst, Operand((1 << kPointerSizeLog2) - 1));
|
| - b(eq, &ok);
|
| + andi(r0, dst, Operand((1 << kPointerSizeLog2) - 1));
|
| + beq(&ok, cr0);
|
| stop("Unaligned cell in write barrier");
|
| bind(&ok);
|
| }
|
| @@ -498,8 +343,8 @@ void MacroAssembler::RecordWriteField(
|
| // Clobber clobbered input registers when running with the debug-code flag
|
| // turned on to provoke errors.
|
| if (emit_debug_code()) {
|
| - mov(value, Operand(BitCast<int32_t>(kZapValue + 4)));
|
| - mov(dst, Operand(BitCast<int32_t>(kZapValue + 8)));
|
| + mov(value, Operand(BitCast<intptr_t>(kZapValue + 4)));
|
| + mov(dst, Operand(BitCast<intptr_t>(kZapValue + 8)));
|
| }
|
| }
|
|
|
| @@ -512,8 +357,8 @@ void MacroAssembler::RecordWriteForMap(Register object,
|
| LinkRegisterStatus lr_status,
|
| SaveFPRegsMode fp_mode) {
|
| if (emit_debug_code()) {
|
| - ldr(dst, FieldMemOperand(map, HeapObject::kMapOffset));
|
| - cmp(dst, Operand(isolate()->factory()->meta_map()));
|
| + LoadP(dst, FieldMemOperand(map, HeapObject::kMapOffset));
|
| + Cmpi(dst, Operand(isolate()->factory()->meta_map()), r0);
|
| Check(eq, kWrongAddressOrValuePassedToRecordWrite);
|
| }
|
|
|
| @@ -526,7 +371,7 @@ void MacroAssembler::RecordWriteForMap(Register object,
|
| // TODO(mstarzinger): Dynamic counter missing.
|
|
|
| if (emit_debug_code()) {
|
| - ldr(ip, FieldMemOperand(object, HeapObject::kMapOffset));
|
| + LoadP(ip, FieldMemOperand(object, HeapObject::kMapOffset));
|
| cmp(ip, map);
|
| Check(eq, kWrongAddressOrValuePassedToRecordWrite);
|
| }
|
| @@ -543,24 +388,26 @@ void MacroAssembler::RecordWriteForMap(Register object,
|
| eq,
|
| &done);
|
|
|
| - add(dst, object, Operand(HeapObject::kMapOffset - kHeapObjectTag));
|
| + addi(dst, object, Operand(HeapObject::kMapOffset - kHeapObjectTag));
|
| if (emit_debug_code()) {
|
| Label ok;
|
| - tst(dst, Operand((1 << kPointerSizeLog2) - 1));
|
| - b(eq, &ok);
|
| + andi(r0, dst, Operand((1 << kPointerSizeLog2) - 1));
|
| + beq(&ok, cr0);
|
| stop("Unaligned cell in write barrier");
|
| bind(&ok);
|
| }
|
|
|
| // Record the actual write.
|
| if (lr_status == kLRHasNotBeenSaved) {
|
| - push(lr);
|
| + mflr(r0);
|
| + push(r0);
|
| }
|
| RecordWriteStub stub(isolate(), object, map, dst, OMIT_REMEMBERED_SET,
|
| fp_mode);
|
| CallStub(&stub);
|
| if (lr_status == kLRHasNotBeenSaved) {
|
| - pop(lr);
|
| + pop(r0);
|
| + mtlr(r0);
|
| }
|
|
|
| bind(&done);
|
| @@ -568,8 +415,8 @@ void MacroAssembler::RecordWriteForMap(Register object,
|
| // Clobber clobbered registers when running with the debug-code flag
|
| // turned on to provoke errors.
|
| if (emit_debug_code()) {
|
| - mov(dst, Operand(BitCast<int32_t>(kZapValue + 12)));
|
| - mov(map, Operand(BitCast<int32_t>(kZapValue + 16)));
|
| + mov(dst, Operand(BitCast<intptr_t>(kZapValue + 12)));
|
| + mov(map, Operand(BitCast<intptr_t>(kZapValue + 16)));
|
| }
|
| }
|
|
|
| @@ -588,7 +435,7 @@ void MacroAssembler::RecordWrite(
|
| PointersToHereCheck pointers_to_here_check_for_value) {
|
| ASSERT(!object.is(value));
|
| if (emit_debug_code()) {
|
| - ldr(ip, MemOperand(address));
|
| + LoadP(ip, MemOperand(address));
|
| cmp(ip, value);
|
| Check(eq, kWrongAddressOrValuePassedToRecordWrite);
|
| }
|
| @@ -625,13 +472,15 @@ void MacroAssembler::RecordWrite(
|
|
|
| // Record the actual write.
|
| if (lr_status == kLRHasNotBeenSaved) {
|
| - push(lr);
|
| + mflr(r0);
|
| + push(r0);
|
| }
|
| RecordWriteStub stub(isolate(), object, value, address, remembered_set_action,
|
| fp_mode);
|
| CallStub(&stub);
|
| if (lr_status == kLRHasNotBeenSaved) {
|
| - pop(lr);
|
| + pop(r0);
|
| + mtlr(r0);
|
| }
|
|
|
| bind(&done);
|
| @@ -639,8 +488,8 @@ void MacroAssembler::RecordWrite(
|
| // Clobber clobbered registers when running with the debug-code flag
|
| // turned on to provoke errors.
|
| if (emit_debug_code()) {
|
| - mov(address, Operand(BitCast<int32_t>(kZapValue + 12)));
|
| - mov(value, Operand(BitCast<int32_t>(kZapValue + 16)));
|
| + mov(address, Operand(BitCast<intptr_t>(kZapValue + 12)));
|
| + mov(value, Operand(BitCast<intptr_t>(kZapValue + 16)));
|
| }
|
| }
|
|
|
| @@ -661,25 +510,30 @@ void MacroAssembler::RememberedSetHelper(Register object, // For debug tests.
|
| ExternalReference store_buffer =
|
| ExternalReference::store_buffer_top(isolate());
|
| mov(ip, Operand(store_buffer));
|
| - ldr(scratch, MemOperand(ip));
|
| + LoadP(scratch, MemOperand(ip));
|
| // Store pointer to buffer and increment buffer top.
|
| - str(address, MemOperand(scratch, kPointerSize, PostIndex));
|
| + StoreP(address, MemOperand(scratch));
|
| + addi(scratch, scratch, Operand(kPointerSize));
|
| // Write back new top of buffer.
|
| - str(scratch, MemOperand(ip));
|
| + StoreP(scratch, MemOperand(ip));
|
| // Call stub on end of buffer.
|
| // Check for end of buffer.
|
| - tst(scratch, Operand(StoreBuffer::kStoreBufferOverflowBit));
|
| + mov(r0, Operand(StoreBuffer::kStoreBufferOverflowBit));
|
| + and_(r0, scratch, r0, SetRC);
|
| +
|
| if (and_then == kFallThroughAtEnd) {
|
| - b(eq, &done);
|
| + beq(&done, cr0);
|
| } else {
|
| ASSERT(and_then == kReturnAtEnd);
|
| - Ret(eq);
|
| + beq(&done, cr0);
|
| }
|
| - push(lr);
|
| + mflr(r0);
|
| + push(r0);
|
| StoreBufferOverflowStub store_buffer_overflow =
|
| StoreBufferOverflowStub(isolate(), fp_mode);
|
| CallStub(&store_buffer_overflow);
|
| - pop(lr);
|
| + pop(r0);
|
| + mtlr(r0);
|
| bind(&done);
|
| if (and_then == kReturnAtEnd) {
|
| Ret();
|
| @@ -688,60 +542,88 @@ void MacroAssembler::RememberedSetHelper(Register object, // For debug tests.
|
|
|
|
|
| void MacroAssembler::PushFixedFrame(Register marker_reg) {
|
| - ASSERT(!marker_reg.is_valid() || marker_reg.code() < cp.code());
|
| - stm(db_w, sp, (marker_reg.is_valid() ? marker_reg.bit() : 0) |
|
| - cp.bit() |
|
| - (FLAG_enable_ool_constant_pool ? pp.bit() : 0) |
|
| - fp.bit() |
|
| - lr.bit());
|
| + mflr(r0);
|
| +#if V8_OOL_CONSTANT_POOL
|
| + if (marker_reg.is_valid()) {
|
| + Push(r0, fp, kConstantPoolRegister, cp, marker_reg);
|
| + } else {
|
| + Push(r0, fp, kConstantPoolRegister, cp);
|
| + }
|
| +#else
|
| + if (marker_reg.is_valid()) {
|
| + Push(r0, fp, cp, marker_reg);
|
| + } else {
|
| + Push(r0, fp, cp);
|
| + }
|
| +#endif
|
| }
|
|
|
|
|
| void MacroAssembler::PopFixedFrame(Register marker_reg) {
|
| - ASSERT(!marker_reg.is_valid() || marker_reg.code() < cp.code());
|
| - ldm(ia_w, sp, (marker_reg.is_valid() ? marker_reg.bit() : 0) |
|
| - cp.bit() |
|
| - (FLAG_enable_ool_constant_pool ? pp.bit() : 0) |
|
| - fp.bit() |
|
| - lr.bit());
|
| +#if V8_OOL_CONSTANT_POOL
|
| + if (marker_reg.is_valid()) {
|
| + Pop(r0, fp, kConstantPoolRegister, cp, marker_reg);
|
| + } else {
|
| + Pop(r0, fp, kConstantPoolRegister, cp);
|
| + }
|
| +#else
|
| + if (marker_reg.is_valid()) {
|
| + Pop(r0, fp, cp, marker_reg);
|
| + } else {
|
| + Pop(r0, fp, cp);
|
| + }
|
| +#endif
|
| + mtlr(r0);
|
| }
|
|
|
|
|
| // Push and pop all registers that can hold pointers.
|
| void MacroAssembler::PushSafepointRegisters() {
|
| - // Safepoints expect a block of contiguous register values starting with r0:
|
| - ASSERT(((1 << kNumSafepointSavedRegisters) - 1) == kSafepointSavedRegisters);
|
| // Safepoints expect a block of kNumSafepointRegisters values on the
|
| // stack, so adjust the stack for unsaved registers.
|
| const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
|
| ASSERT(num_unsaved >= 0);
|
| - sub(sp, sp, Operand(num_unsaved * kPointerSize));
|
| - stm(db_w, sp, kSafepointSavedRegisters);
|
| + if (num_unsaved > 0) {
|
| + subi(sp, sp, Operand(num_unsaved * kPointerSize));
|
| + }
|
| + MultiPush(kSafepointSavedRegisters);
|
| }
|
|
|
|
|
| void MacroAssembler::PopSafepointRegisters() {
|
| const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
|
| - ldm(ia_w, sp, kSafepointSavedRegisters);
|
| - add(sp, sp, Operand(num_unsaved * kPointerSize));
|
| + MultiPop(kSafepointSavedRegisters);
|
| + if (num_unsaved > 0) {
|
| + addi(sp, sp, Operand(num_unsaved * kPointerSize));
|
| + }
|
| }
|
|
|
|
|
| void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) {
|
| - str(src, SafepointRegisterSlot(dst));
|
| + StoreP(src, SafepointRegisterSlot(dst));
|
| }
|
|
|
|
|
| void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) {
|
| - ldr(dst, SafepointRegisterSlot(src));
|
| + LoadP(dst, SafepointRegisterSlot(src));
|
| }
|
|
|
|
|
| int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
|
| // The registers are pushed starting with the highest encoding,
|
| // which means that lowest encodings are closest to the stack pointer.
|
| - ASSERT(reg_code >= 0 && reg_code < kNumSafepointRegisters);
|
| - return reg_code;
|
| + RegList regs = kSafepointSavedRegisters;
|
| + int index = 0;
|
| +
|
| + ASSERT(reg_code >= 0 && reg_code < kNumRegisters);
|
| +
|
| + for (int16_t i = 0; i < reg_code; i++) {
|
| + if ((regs & (1 << i)) != 0) {
|
| + index++;
|
| + }
|
| + }
|
| +
|
| + return index;
|
| }
|
|
|
|
|
| @@ -751,337 +633,320 @@ MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) {
|
|
|
|
|
| MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {
|
| - // Number of d-regs not known at snapshot time.
|
| - ASSERT(!serializer_enabled());
|
| // General purpose registers are pushed last on the stack.
|
| - int doubles_size = DwVfpRegister::NumAllocatableRegisters() * kDoubleSize;
|
| + int doubles_size = DoubleRegister::NumAllocatableRegisters() * kDoubleSize;
|
| int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize;
|
| return MemOperand(sp, doubles_size + register_offset);
|
| }
|
|
|
|
|
| -void MacroAssembler::Ldrd(Register dst1, Register dst2,
|
| - const MemOperand& src, Condition cond) {
|
| - ASSERT(src.rm().is(no_reg));
|
| - ASSERT(!dst1.is(lr)); // r14.
|
| +void MacroAssembler::CanonicalizeNaN(const DoubleRegister dst,
|
| + const DoubleRegister src) {
|
| + Label done;
|
|
|
| - // V8 does not use this addressing mode, so the fallback code
|
| - // below doesn't support it yet.
|
| - ASSERT((src.am() != PreIndex) && (src.am() != NegPreIndex));
|
| + // Test for NaN
|
| + fcmpu(src, src);
|
|
|
| - // Generate two ldr instructions if ldrd is not available.
|
| - if (CpuFeatures::IsSupported(ARMv7) && !predictable_code_size() &&
|
| - (dst1.code() % 2 == 0) && (dst1.code() + 1 == dst2.code())) {
|
| - CpuFeatureScope scope(this, ARMv7);
|
| - ldrd(dst1, dst2, src, cond);
|
| + if (dst.is(src)) {
|
| + bordered(&done);
|
| } else {
|
| - if ((src.am() == Offset) || (src.am() == NegOffset)) {
|
| - MemOperand src2(src);
|
| - src2.set_offset(src2.offset() + 4);
|
| - if (dst1.is(src.rn())) {
|
| - ldr(dst2, src2, cond);
|
| - ldr(dst1, src, cond);
|
| - } else {
|
| - ldr(dst1, src, cond);
|
| - ldr(dst2, src2, cond);
|
| - }
|
| - } else { // PostIndex or NegPostIndex.
|
| - ASSERT((src.am() == PostIndex) || (src.am() == NegPostIndex));
|
| - if (dst1.is(src.rn())) {
|
| - ldr(dst2, MemOperand(src.rn(), 4, Offset), cond);
|
| - ldr(dst1, src, cond);
|
| - } else {
|
| - MemOperand src2(src);
|
| - src2.set_offset(src2.offset() - 4);
|
| - ldr(dst1, MemOperand(src.rn(), 4, PostIndex), cond);
|
| - ldr(dst2, src2, cond);
|
| - }
|
| - }
|
| + Label is_nan;
|
| + bunordered(&is_nan);
|
| + fmr(dst, src);
|
| + b(&done);
|
| + bind(&is_nan);
|
| }
|
| -}
|
|
|
| + // Replace with canonical NaN.
|
| + double nan_value = FixedDoubleArray::canonical_not_the_hole_nan_as_double();
|
| + LoadDoubleLiteral(dst, nan_value, r0);
|
|
|
| -void MacroAssembler::Strd(Register src1, Register src2,
|
| - const MemOperand& dst, Condition cond) {
|
| - ASSERT(dst.rm().is(no_reg));
|
| - ASSERT(!src1.is(lr)); // r14.
|
| + bind(&done);
|
| +}
|
|
|
| - // V8 does not use this addressing mode, so the fallback code
|
| - // below doesn't support it yet.
|
| - ASSERT((dst.am() != PreIndex) && (dst.am() != NegPreIndex));
|
|
|
| - // Generate two str instructions if strd is not available.
|
| - if (CpuFeatures::IsSupported(ARMv7) && !predictable_code_size() &&
|
| - (src1.code() % 2 == 0) && (src1.code() + 1 == src2.code())) {
|
| - CpuFeatureScope scope(this, ARMv7);
|
| - strd(src1, src2, dst, cond);
|
| - } else {
|
| - MemOperand dst2(dst);
|
| - if ((dst.am() == Offset) || (dst.am() == NegOffset)) {
|
| - dst2.set_offset(dst2.offset() + 4);
|
| - str(src1, dst, cond);
|
| - str(src2, dst2, cond);
|
| - } else { // PostIndex or NegPostIndex.
|
| - ASSERT((dst.am() == PostIndex) || (dst.am() == NegPostIndex));
|
| - dst2.set_offset(dst2.offset() - 4);
|
| - str(src1, MemOperand(dst.rn(), 4, PostIndex), cond);
|
| - str(src2, dst2, cond);
|
| - }
|
| - }
|
| -}
|
| +void MacroAssembler::ConvertIntToDouble(Register src,
|
| + DoubleRegister double_dst) {
|
| + ASSERT(!src.is(r0));
|
|
|
| + subi(sp, sp, Operand(8)); // reserve one temporary double on the stack
|
|
|
| -void MacroAssembler::VFPEnsureFPSCRState(Register scratch) {
|
| - // If needed, restore wanted bits of FPSCR.
|
| - Label fpscr_done;
|
| - vmrs(scratch);
|
| - if (emit_debug_code()) {
|
| - Label rounding_mode_correct;
|
| - tst(scratch, Operand(kVFPRoundingModeMask));
|
| - b(eq, &rounding_mode_correct);
|
| - // Don't call Assert here, since Runtime_Abort could re-enter here.
|
| - stop("Default rounding mode not set");
|
| - bind(&rounding_mode_correct);
|
| - }
|
| - tst(scratch, Operand(kVFPDefaultNaNModeControlBit));
|
| - b(ne, &fpscr_done);
|
| - orr(scratch, scratch, Operand(kVFPDefaultNaNModeControlBit));
|
| - vmsr(scratch);
|
| - bind(&fpscr_done);
|
| -}
|
| + // sign-extend src to 64-bit and store it to temp double on the stack
|
| +#if V8_TARGET_ARCH_PPC64
|
| + extsw(r0, src);
|
| + std(r0, MemOperand(sp, 0));
|
| +#else
|
| + srawi(r0, src, 31);
|
| + stw(r0, MemOperand(sp, Register::kExponentOffset));
|
| + stw(src, MemOperand(sp, Register::kMantissaOffset));
|
| +#endif
|
| +
|
| + // load into FPR
|
| + nop(); // LHS/RAW optimization
|
| + lfd(double_dst, MemOperand(sp, 0));
|
|
|
| + addi(sp, sp, Operand(8)); // restore stack
|
|
|
| -void MacroAssembler::VFPCanonicalizeNaN(const DwVfpRegister dst,
|
| - const DwVfpRegister src,
|
| - const Condition cond) {
|
| - vsub(dst, src, kDoubleRegZero, cond);
|
| + // convert to double
|
| + fcfid(double_dst, double_dst);
|
| }
|
|
|
|
|
| -void MacroAssembler::VFPCompareAndSetFlags(const DwVfpRegister src1,
|
| - const DwVfpRegister src2,
|
| - const Condition cond) {
|
| - // Compare and move FPSCR flags to the normal condition flags.
|
| - VFPCompareAndLoadFlags(src1, src2, pc, cond);
|
| -}
|
| +void MacroAssembler::ConvertUnsignedIntToDouble(Register src,
|
| + DoubleRegister double_dst) {
|
| + ASSERT(!src.is(r0));
|
|
|
| -void MacroAssembler::VFPCompareAndSetFlags(const DwVfpRegister src1,
|
| - const double src2,
|
| - const Condition cond) {
|
| - // Compare and move FPSCR flags to the normal condition flags.
|
| - VFPCompareAndLoadFlags(src1, src2, pc, cond);
|
| -}
|
| + subi(sp, sp, Operand(8)); // reserve one temporary double on the stack
|
|
|
| + // zero-extend src to 64-bit and store it to temp double on the stack
|
| +#if V8_TARGET_ARCH_PPC64
|
| + clrldi(r0, src, Operand(32));
|
| + std(r0, MemOperand(sp, 0));
|
| +#else
|
| + li(r0, Operand::Zero());
|
| + stw(r0, MemOperand(sp, Register::kExponentOffset));
|
| + stw(src, MemOperand(sp, Register::kMantissaOffset));
|
| +#endif
|
|
|
| -void MacroAssembler::VFPCompareAndLoadFlags(const DwVfpRegister src1,
|
| - const DwVfpRegister src2,
|
| - const Register fpscr_flags,
|
| - const Condition cond) {
|
| - // Compare and load FPSCR.
|
| - vcmp(src1, src2, cond);
|
| - vmrs(fpscr_flags, cond);
|
| -}
|
| + // load into FPR
|
| + nop(); // LHS/RAW optimization
|
| + lfd(double_dst, MemOperand(sp, 0));
|
|
|
| -void MacroAssembler::VFPCompareAndLoadFlags(const DwVfpRegister src1,
|
| - const double src2,
|
| - const Register fpscr_flags,
|
| - const Condition cond) {
|
| - // Compare and load FPSCR.
|
| - vcmp(src1, src2, cond);
|
| - vmrs(fpscr_flags, cond);
|
| -}
|
| + addi(sp, sp, Operand(8)); // restore stack
|
|
|
| -void MacroAssembler::Vmov(const DwVfpRegister dst,
|
| - const double imm,
|
| - const Register scratch) {
|
| - static const DoubleRepresentation minus_zero(-0.0);
|
| - static const DoubleRepresentation zero(0.0);
|
| - DoubleRepresentation value_rep(imm);
|
| - // Handle special values first.
|
| - if (value_rep == zero) {
|
| - vmov(dst, kDoubleRegZero);
|
| - } else if (value_rep == minus_zero) {
|
| - vneg(dst, kDoubleRegZero);
|
| - } else {
|
| - vmov(dst, imm, scratch);
|
| - }
|
| + // convert to double
|
| + fcfid(double_dst, double_dst);
|
| }
|
|
|
|
|
| -void MacroAssembler::VmovHigh(Register dst, DwVfpRegister src) {
|
| - if (src.code() < 16) {
|
| - const LowDwVfpRegister loc = LowDwVfpRegister::from_code(src.code());
|
| - vmov(dst, loc.high());
|
| - } else {
|
| - vmov(dst, VmovIndexHi, src);
|
| - }
|
| -}
|
| +void MacroAssembler::ConvertIntToFloat(const DoubleRegister dst,
|
| + const Register src,
|
| + const Register int_scratch) {
|
| + subi(sp, sp, Operand(8)); // reserve one temporary double on the stack
|
|
|
| + // sign-extend src to 64-bit and store it to temp double on the stack
|
| +#if V8_TARGET_ARCH_PPC64
|
| + extsw(int_scratch, src);
|
| + std(int_scratch, MemOperand(sp, 0));
|
| +#else
|
| + srawi(int_scratch, src, 31);
|
| + stw(int_scratch, MemOperand(sp, Register::kExponentOffset));
|
| + stw(src, MemOperand(sp, Register::kMantissaOffset));
|
| +#endif
|
|
|
| -void MacroAssembler::VmovHigh(DwVfpRegister dst, Register src) {
|
| - if (dst.code() < 16) {
|
| - const LowDwVfpRegister loc = LowDwVfpRegister::from_code(dst.code());
|
| - vmov(loc.high(), src);
|
| - } else {
|
| - vmov(dst, VmovIndexHi, src);
|
| - }
|
| -}
|
| + // load sign-extended src into FPR
|
| + nop(); // LHS/RAW optimization
|
| + lfd(dst, MemOperand(sp, 0));
|
|
|
| + addi(sp, sp, Operand(8)); // restore stack
|
|
|
| -void MacroAssembler::VmovLow(Register dst, DwVfpRegister src) {
|
| - if (src.code() < 16) {
|
| - const LowDwVfpRegister loc = LowDwVfpRegister::from_code(src.code());
|
| - vmov(dst, loc.low());
|
| - } else {
|
| - vmov(dst, VmovIndexLo, src);
|
| - }
|
| + fcfid(dst, dst);
|
| + frsp(dst, dst);
|
| }
|
|
|
|
|
| -void MacroAssembler::VmovLow(DwVfpRegister dst, Register src) {
|
| - if (dst.code() < 16) {
|
| - const LowDwVfpRegister loc = LowDwVfpRegister::from_code(dst.code());
|
| - vmov(loc.low(), src);
|
| +void MacroAssembler::ConvertDoubleToInt64(const DoubleRegister double_input,
|
| + const Register dst,
|
| +#if !V8_TARGET_ARCH_PPC64
|
| + const Register dst_hi,
|
| +#endif
|
| + const DoubleRegister double_dst,
|
| + FPRoundingMode rounding_mode) {
|
| + if (rounding_mode == kRoundToZero) {
|
| + fctidz(double_dst, double_input);
|
| } else {
|
| - vmov(dst, VmovIndexLo, src);
|
| - }
|
| + SetRoundingMode(rounding_mode);
|
| + fctid(double_dst, double_input);
|
| + ResetRoundingMode();
|
| + }
|
| +
|
| + stfdu(double_dst, MemOperand(sp, -kDoubleSize));
|
| + nop(); // LHS/RAW optimization
|
| +#if V8_TARGET_ARCH_PPC64
|
| + ld(dst, MemOperand(sp, 0));
|
| +#else
|
| + lwz(dst_hi, MemOperand(sp, Register::kExponentOffset));
|
| + lwz(dst, MemOperand(sp, Register::kMantissaOffset));
|
| +#endif
|
| + addi(sp, sp, Operand(kDoubleSize));
|
| }
|
|
|
|
|
| +#if V8_OOL_CONSTANT_POOL
|
| void MacroAssembler::LoadConstantPoolPointerRegister() {
|
| - if (FLAG_enable_ool_constant_pool) {
|
| - int constant_pool_offset = Code::kConstantPoolOffset - Code::kHeaderSize -
|
| - pc_offset() - Instruction::kPCReadOffset;
|
| - ASSERT(ImmediateFitsAddrMode2Instruction(constant_pool_offset));
|
| - ldr(pp, MemOperand(pc, constant_pool_offset));
|
| - }
|
| + ConstantPoolUnavailableScope constant_pool_unavailable(this);
|
| + uintptr_t code_start = reinterpret_cast<uintptr_t>(pc_) - pc_offset();
|
| + int constant_pool_offset = Code::kConstantPoolOffset - Code::kHeaderSize;
|
| + mov(kConstantPoolRegister,
|
| + Operand(code_start, RelocInfo::INTERNAL_REFERENCE));
|
| + LoadP(kConstantPoolRegister,
|
| + MemOperand(kConstantPoolRegister, constant_pool_offset));
|
| }
|
| +#endif
|
|
|
|
|
| void MacroAssembler::StubPrologue() {
|
| PushFixedFrame();
|
| Push(Smi::FromInt(StackFrame::STUB));
|
| // Adjust FP to point to saved FP.
|
| - add(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
|
| - if (FLAG_enable_ool_constant_pool) {
|
| - LoadConstantPoolPointerRegister();
|
| - set_constant_pool_available(true);
|
| - }
|
| + addi(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
|
| +#if V8_OOL_CONSTANT_POOL
|
| + LoadConstantPoolPointerRegister();
|
| + set_constant_pool_available(true);
|
| +#endif
|
| }
|
|
|
|
|
| void MacroAssembler::Prologue(bool code_pre_aging) {
|
| { PredictableCodeSizeScope predictible_code_size_scope(
|
| - this, kNoCodeAgeSequenceLength);
|
| - // The following three instructions must remain together and unmodified
|
| + this, kNoCodeAgeSequenceLength);
|
| + Assembler::BlockTrampolinePoolScope block_trampoline_pool(this);
|
| + // The following instructions must remain together and unmodified
|
| // for code aging to work properly.
|
| if (code_pre_aging) {
|
| // Pre-age the code.
|
| + // This matches the code found in PatchPlatformCodeAge()
|
| Code* stub = Code::GetPreAgedCodeAgeStub(isolate());
|
| - add(r0, pc, Operand(-8));
|
| - ldr(pc, MemOperand(pc, -4));
|
| - emit_code_stub_address(stub);
|
| + intptr_t target = reinterpret_cast<intptr_t>(stub->instruction_start());
|
| + mflr(ip);
|
| + mov(r3, Operand(target));
|
| + Call(r3);
|
| + for (int i = 0; i < kCodeAgingSequenceNops; i++) {
|
| + nop();
|
| + }
|
| } else {
|
| - PushFixedFrame(r1);
|
| - nop(ip.code());
|
| - // Adjust FP to point to saved FP.
|
| - add(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
|
| + // This matches the code found in GetNoCodeAgeSequence()
|
| + PushFixedFrame(r4);
|
| + // Adjust fp to point to saved fp.
|
| + addi(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
|
| + for (int i = 0; i < kNoCodeAgeSequenceNops; i++) {
|
| + nop();
|
| + }
|
| }
|
| }
|
| - if (FLAG_enable_ool_constant_pool) {
|
| - LoadConstantPoolPointerRegister();
|
| - set_constant_pool_available(true);
|
| - }
|
| +#if V8_OOL_CONSTANT_POOL
|
| + LoadConstantPoolPointerRegister();
|
| + set_constant_pool_available(true);
|
| +#endif
|
| }
|
|
|
|
|
| void MacroAssembler::EnterFrame(StackFrame::Type type,
|
| bool load_constant_pool) {
|
| - // r0-r3: preserved
|
| PushFixedFrame();
|
| - if (FLAG_enable_ool_constant_pool && load_constant_pool) {
|
| +#if V8_OOL_CONSTANT_POOL
|
| + if (load_constant_pool) {
|
| LoadConstantPoolPointerRegister();
|
| }
|
| - mov(ip, Operand(Smi::FromInt(type)));
|
| - push(ip);
|
| - mov(ip, Operand(CodeObject()));
|
| - push(ip);
|
| +#endif
|
| + LoadSmiLiteral(r0, Smi::FromInt(type));
|
| + push(r0);
|
| + mov(r0, Operand(CodeObject()));
|
| + push(r0);
|
| // Adjust FP to point to saved FP.
|
| - add(fp, sp,
|
| - Operand(StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize));
|
| + addi(fp, sp,
|
| + Operand(StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize));
|
| }
|
|
|
|
|
| int MacroAssembler::LeaveFrame(StackFrame::Type type) {
|
| - // r0: preserved
|
| - // r1: preserved
|
| - // r2: preserved
|
| + // r3: preserved
|
| + // r4: preserved
|
| + // r5: preserved
|
|
|
| // Drop the execution stack down to the frame pointer and restore
|
| - // the caller frame pointer, return address and constant pool pointer
|
| - // (if FLAG_enable_ool_constant_pool).
|
| + // the caller frame pointer, return address and constant pool pointer.
|
| int frame_ends;
|
| - if (FLAG_enable_ool_constant_pool) {
|
| - add(sp, fp, Operand(StandardFrameConstants::kConstantPoolOffset));
|
| - frame_ends = pc_offset();
|
| - ldm(ia_w, sp, pp.bit() | fp.bit() | lr.bit());
|
| - } else {
|
| - mov(sp, fp);
|
| - frame_ends = pc_offset();
|
| - ldm(ia_w, sp, fp.bit() | lr.bit());
|
| - }
|
| +#if V8_OOL_CONSTANT_POOL
|
| + addi(sp, fp, Operand(StandardFrameConstants::kConstantPoolOffset));
|
| + frame_ends = pc_offset();
|
| + Pop(r0, fp, kConstantPoolRegister);
|
| +#else
|
| + mr(sp, fp);
|
| + frame_ends = pc_offset();
|
| + Pop(r0, fp);
|
| +#endif
|
| + mtlr(r0);
|
| return frame_ends;
|
| }
|
|
|
|
|
| +// ExitFrame layout (probably wrongish.. needs updating)
|
| +//
|
| +// SP -> previousSP
|
| +// LK reserved
|
| +// code
|
| +// sp_on_exit (for debug?)
|
| +// oldSP->prev SP
|
| +// LK
|
| +// <parameters on stack>
|
| +
|
| +// Prior to calling EnterExitFrame, we've got a bunch of parameters
|
| +// on the stack that we need to wrap a real frame around.. so first
|
| +// we reserve a slot for LK and push the previous SP which is captured
|
| +// in the fp register (r31)
|
| +// Then - we buy a new frame
|
| +
|
| void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space) {
|
| // Set up the frame structure on the stack.
|
| ASSERT_EQ(2 * kPointerSize, ExitFrameConstants::kCallerSPDisplacement);
|
| ASSERT_EQ(1 * kPointerSize, ExitFrameConstants::kCallerPCOffset);
|
| ASSERT_EQ(0 * kPointerSize, ExitFrameConstants::kCallerFPOffset);
|
| - Push(lr, fp);
|
| - mov(fp, Operand(sp)); // Set up new frame pointer.
|
| + ASSERT(stack_space > 0);
|
| +
|
| + // This is an opportunity to build a frame to wrap
|
| + // all of the pushes that have happened inside of V8
|
| + // since we were called from C code
|
| +
|
| + // replicate ARM frame - TODO make this more closely follow PPC ABI
|
| + mflr(r0);
|
| + Push(r0, fp);
|
| + mr(fp, sp);
|
| // Reserve room for saved entry sp and code object.
|
| - sub(sp, sp, Operand(ExitFrameConstants::kFrameSize));
|
| + subi(sp, sp, Operand(ExitFrameConstants::kFrameSize));
|
| +
|
| if (emit_debug_code()) {
|
| - mov(ip, Operand::Zero());
|
| - str(ip, MemOperand(fp, ExitFrameConstants::kSPOffset));
|
| - }
|
| - if (FLAG_enable_ool_constant_pool) {
|
| - str(pp, MemOperand(fp, ExitFrameConstants::kConstantPoolOffset));
|
| + li(r8, Operand::Zero());
|
| + StoreP(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
|
| }
|
| - mov(ip, Operand(CodeObject()));
|
| - str(ip, MemOperand(fp, ExitFrameConstants::kCodeOffset));
|
| +#if V8_OOL_CONSTANT_POOL
|
| + StoreP(kConstantPoolRegister,
|
| + MemOperand(fp, ExitFrameConstants::kConstantPoolOffset));
|
| +#endif
|
| + mov(r8, Operand(CodeObject()));
|
| + StoreP(r8, MemOperand(fp, ExitFrameConstants::kCodeOffset));
|
|
|
| // Save the frame pointer and the context in top.
|
| - mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
|
| - str(fp, MemOperand(ip));
|
| - mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
|
| - str(cp, MemOperand(ip));
|
| + mov(r8, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
|
| + StoreP(fp, MemOperand(r8));
|
| + mov(r8, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
|
| + StoreP(cp, MemOperand(r8));
|
|
|
| - // Optionally save all double registers.
|
| + // Optionally save all volatile double registers.
|
| if (save_doubles) {
|
| - SaveFPRegs(sp, ip);
|
| + SaveFPRegs(sp, 0, DoubleRegister::kNumVolatileRegisters);
|
| // Note that d0 will be accessible at
|
| // fp - ExitFrameConstants::kFrameSize -
|
| - // DwVfpRegister::kMaxNumRegisters * kDoubleSize,
|
| - // since the sp slot, code slot and constant pool slot (if
|
| - // FLAG_enable_ool_constant_pool) were pushed after the fp.
|
| + // kNumVolatileRegisters * kDoubleSize,
|
| + // since the sp slot and code slot were pushed after the fp.
|
| }
|
|
|
| - // Reserve place for the return address and stack space and align the frame
|
| - // preparing for calling the runtime function.
|
| - const int frame_alignment = MacroAssembler::ActivationFrameAlignment();
|
| - sub(sp, sp, Operand((stack_space + 1) * kPointerSize));
|
| - if (frame_alignment > 0) {
|
| + addi(sp, sp, Operand(-stack_space * kPointerSize));
|
| +
|
| + // Allocate and align the frame preparing for calling the runtime
|
| + // function.
|
| + const int frame_alignment = ActivationFrameAlignment();
|
| + if (frame_alignment > kPointerSize) {
|
| ASSERT(IsPowerOf2(frame_alignment));
|
| - and_(sp, sp, Operand(-frame_alignment));
|
| + ClearRightImm(sp, sp, Operand(WhichPowerOf2(frame_alignment)));
|
| }
|
| + li(r0, Operand::Zero());
|
| + StorePU(r0, MemOperand(sp, -kNumRequiredStackFrameSlots * kPointerSize));
|
|
|
| // Set the exit frame sp value to point just before the return address
|
| // location.
|
| - add(ip, sp, Operand(kPointerSize));
|
| - str(ip, MemOperand(fp, ExitFrameConstants::kSPOffset));
|
| + addi(r8, sp, Operand((kStackFrameExtraParamSlot + 1) * kPointerSize));
|
| + StoreP(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
|
| }
|
|
|
|
|
| @@ -1092,83 +957,85 @@ void MacroAssembler::InitializeNewString(Register string,
|
| Register scratch2) {
|
| SmiTag(scratch1, length);
|
| LoadRoot(scratch2, map_index);
|
| - str(scratch1, FieldMemOperand(string, String::kLengthOffset));
|
| - mov(scratch1, Operand(String::kEmptyHashField));
|
| - str(scratch2, FieldMemOperand(string, HeapObject::kMapOffset));
|
| - str(scratch1, FieldMemOperand(string, String::kHashFieldOffset));
|
| + StoreP(scratch1, FieldMemOperand(string, String::kLengthOffset), r0);
|
| + li(scratch1, Operand(String::kEmptyHashField));
|
| + StoreP(scratch2, FieldMemOperand(string, HeapObject::kMapOffset), r0);
|
| + StoreP(scratch1, FieldMemOperand(string, String::kHashFieldSlot), r0);
|
| }
|
|
|
|
|
| int MacroAssembler::ActivationFrameAlignment() {
|
| -#if V8_HOST_ARCH_ARM
|
| +#if !defined(USE_SIMULATOR)
|
| // Running on the real platform. Use the alignment as mandated by the local
|
| // environment.
|
| - // Note: This will break if we ever start generating snapshots on one ARM
|
| - // platform for another ARM platform with a different alignment.
|
| + // Note: This will break if we ever start generating snapshots on one PPC
|
| + // platform for another PPC platform with a different alignment.
|
| return base::OS::ActivationFrameAlignment();
|
| -#else // V8_HOST_ARCH_ARM
|
| +#else // Simulated
|
| // If we are using the simulator then we should always align to the expected
|
| // alignment. As the simulator is used to generate snapshots we do not know
|
| // if the target platform will need alignment, so this is controlled from a
|
| // flag.
|
| return FLAG_sim_stack_alignment;
|
| -#endif // V8_HOST_ARCH_ARM
|
| +#endif
|
| }
|
|
|
|
|
| void MacroAssembler::LeaveExitFrame(bool save_doubles,
|
| Register argument_count,
|
| bool restore_context) {
|
| +#if V8_OOL_CONSTANT_POOL
|
| ConstantPoolUnavailableScope constant_pool_unavailable(this);
|
| -
|
| +#endif
|
| // Optionally restore all double registers.
|
| if (save_doubles) {
|
| // Calculate the stack location of the saved doubles and restore them.
|
| - const int offset = ExitFrameConstants::kFrameSize;
|
| - sub(r3, fp,
|
| - Operand(offset + DwVfpRegister::kMaxNumRegisters * kDoubleSize));
|
| - RestoreFPRegs(r3, ip);
|
| + const int kNumRegs = DoubleRegister::kNumVolatileRegisters;
|
| + const int offset = (ExitFrameConstants::kFrameSize +
|
| + kNumRegs * kDoubleSize);
|
| + addi(r6, fp, Operand(-offset));
|
| + RestoreFPRegs(r6, 0, kNumRegs);
|
| }
|
|
|
| // Clear top frame.
|
| - mov(r3, Operand::Zero());
|
| + li(r6, Operand::Zero());
|
| mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
|
| - str(r3, MemOperand(ip));
|
| + StoreP(r6, MemOperand(ip));
|
|
|
| // Restore current context from top and clear it in debug mode.
|
| if (restore_context) {
|
| mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
|
| - ldr(cp, MemOperand(ip));
|
| + LoadP(cp, MemOperand(ip));
|
| }
|
| #ifdef DEBUG
|
| mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
|
| - str(r3, MemOperand(ip));
|
| + StoreP(r6, MemOperand(ip));
|
| #endif
|
|
|
| // Tear down the exit frame, pop the arguments, and return.
|
| - if (FLAG_enable_ool_constant_pool) {
|
| - ldr(pp, MemOperand(fp, ExitFrameConstants::kConstantPoolOffset));
|
| - }
|
| - mov(sp, Operand(fp));
|
| - ldm(ia_w, sp, fp.bit() | lr.bit());
|
| +#if V8_OOL_CONSTANT_POOL
|
| + LoadP(kConstantPoolRegister,
|
| + MemOperand(fp, ExitFrameConstants::kConstantPoolOffset));
|
| +#endif
|
| + mr(sp, fp);
|
| + pop(fp);
|
| + pop(r0);
|
| + mtlr(r0);
|
| +
|
| if (argument_count.is_valid()) {
|
| - add(sp, sp, Operand(argument_count, LSL, kPointerSizeLog2));
|
| + ShiftLeftImm(argument_count, argument_count, Operand(kPointerSizeLog2));
|
| + add(sp, sp, argument_count);
|
| }
|
| }
|
|
|
|
|
| -void MacroAssembler::MovFromFloatResult(const DwVfpRegister dst) {
|
| - if (use_eabi_hardfloat()) {
|
| - Move(dst, d0);
|
| - } else {
|
| - vmov(dst, r0, r1);
|
| - }
|
| +void MacroAssembler::MovFromFloatResult(const DoubleRegister dst) {
|
| + Move(dst, d1);
|
| }
|
|
|
|
|
| -// On ARM this is just a synonym to make the purpose clear.
|
| -void MacroAssembler::MovFromFloatParameter(DwVfpRegister dst) {
|
| - MovFromFloatResult(dst);
|
| +void MacroAssembler::MovFromFloatParameter(const DoubleRegister dst) {
|
| + Move(dst, d1);
|
| }
|
|
|
|
|
| @@ -1186,23 +1053,26 @@ void MacroAssembler::InvokePrologue(const ParameterCount& expected,
|
|
|
| // Check whether the expected and actual arguments count match. If not,
|
| // setup registers according to contract with ArgumentsAdaptorTrampoline:
|
| - // r0: actual arguments count
|
| - // r1: function (passed through to callee)
|
| - // r2: expected arguments count
|
| + // r3: actual arguments count
|
| + // r4: function (passed through to callee)
|
| + // r5: expected arguments count
|
|
|
| // The code below is made a lot easier because the calling code already sets
|
| // up actual and expected registers according to the contract if values are
|
| // passed in registers.
|
| - ASSERT(actual.is_immediate() || actual.reg().is(r0));
|
| - ASSERT(expected.is_immediate() || expected.reg().is(r2));
|
| - ASSERT((!code_constant.is_null() && code_reg.is(no_reg)) || code_reg.is(r3));
|
| +
|
| + // roohack - remove these 3 checks temporarily
|
| + // ASSERT(actual.is_immediate() || actual.reg().is(r3));
|
| + // ASSERT(expected.is_immediate() || expected.reg().is(r5));
|
| + // ASSERT((!code_constant.is_null() && code_reg.is(no_reg))
|
| + // || code_reg.is(r6));
|
|
|
| if (expected.is_immediate()) {
|
| ASSERT(actual.is_immediate());
|
| if (expected.immediate() == actual.immediate()) {
|
| definitely_matches = true;
|
| } else {
|
| - mov(r0, Operand(actual.immediate()));
|
| + mov(r3, Operand(actual.immediate()));
|
| const int sentinel = SharedFunctionInfo::kDontAdaptArgumentsSentinel;
|
| if (expected.immediate() == sentinel) {
|
| // Don't worry about adapting arguments for builtins that
|
| @@ -1212,24 +1082,24 @@ void MacroAssembler::InvokePrologue(const ParameterCount& expected,
|
| definitely_matches = true;
|
| } else {
|
| *definitely_mismatches = true;
|
| - mov(r2, Operand(expected.immediate()));
|
| + mov(r5, Operand(expected.immediate()));
|
| }
|
| }
|
| } else {
|
| if (actual.is_immediate()) {
|
| - cmp(expected.reg(), Operand(actual.immediate()));
|
| - b(eq, ®ular_invoke);
|
| - mov(r0, Operand(actual.immediate()));
|
| + cmpi(expected.reg(), Operand(actual.immediate()));
|
| + beq(®ular_invoke);
|
| + mov(r3, Operand(actual.immediate()));
|
| } else {
|
| - cmp(expected.reg(), Operand(actual.reg()));
|
| - b(eq, ®ular_invoke);
|
| + cmp(expected.reg(), actual.reg());
|
| + beq(®ular_invoke);
|
| }
|
| }
|
|
|
| if (!definitely_matches) {
|
| if (!code_constant.is_null()) {
|
| - mov(r3, Operand(code_constant));
|
| - add(r3, r3, Operand(Code::kHeaderSize - kHeapObjectTag));
|
| + mov(r6, Operand(code_constant));
|
| + addi(r6, r6, Operand(Code::kHeaderSize - kHeapObjectTag));
|
| }
|
|
|
| Handle<Code> adaptor =
|
| @@ -1286,20 +1156,22 @@ void MacroAssembler::InvokeFunction(Register fun,
|
| // You can't call a function without a valid frame.
|
| ASSERT(flag == JUMP_FUNCTION || has_frame());
|
|
|
| - // Contract with called JS functions requires that function is passed in r1.
|
| - ASSERT(fun.is(r1));
|
| + // Contract with called JS functions requires that function is passed in r4.
|
| + ASSERT(fun.is(r4));
|
|
|
| - Register expected_reg = r2;
|
| - Register code_reg = r3;
|
| + Register expected_reg = r5;
|
| + Register code_reg = r6;
|
|
|
| - ldr(code_reg, FieldMemOperand(r1, JSFunction::kSharedFunctionInfoOffset));
|
| - ldr(cp, FieldMemOperand(r1, JSFunction::kContextOffset));
|
| - ldr(expected_reg,
|
| + LoadP(code_reg, FieldMemOperand(r4, JSFunction::kSharedFunctionInfoOffset));
|
| + LoadP(cp, FieldMemOperand(r4, JSFunction::kContextOffset));
|
| + LoadWordArith(expected_reg,
|
| FieldMemOperand(code_reg,
|
| SharedFunctionInfo::kFormalParameterCountOffset));
|
| +#if !defined(V8_TARGET_ARCH_PPC64)
|
| SmiUntag(expected_reg);
|
| - ldr(code_reg,
|
| - FieldMemOperand(r1, JSFunction::kCodeEntryOffset));
|
| +#endif
|
| + LoadP(code_reg,
|
| + FieldMemOperand(r4, JSFunction::kCodeEntryOffset));
|
|
|
| ParameterCount expected(expected_reg);
|
| InvokeCode(code_reg, expected, actual, flag, call_wrapper);
|
| @@ -1314,17 +1186,17 @@ void MacroAssembler::InvokeFunction(Register function,
|
| // You can't call a function without a valid frame.
|
| ASSERT(flag == JUMP_FUNCTION || has_frame());
|
|
|
| - // Contract with called JS functions requires that function is passed in r1.
|
| - ASSERT(function.is(r1));
|
| + // Contract with called JS functions requires that function is passed in r4.
|
| + ASSERT(function.is(r4));
|
|
|
| // Get the function and setup the context.
|
| - ldr(cp, FieldMemOperand(r1, JSFunction::kContextOffset));
|
| + LoadP(cp, FieldMemOperand(r4, JSFunction::kContextOffset));
|
|
|
| // We call indirectly through the code field in the function to
|
| // allow recompilation to take effect without changing any of the
|
| // call sites.
|
| - ldr(r3, FieldMemOperand(r1, JSFunction::kCodeEntryOffset));
|
| - InvokeCode(r3, expected, actual, flag, call_wrapper);
|
| + LoadP(r6, FieldMemOperand(r4, JSFunction::kCodeEntryOffset));
|
| + InvokeCode(r6, expected, actual, flag, call_wrapper);
|
| }
|
|
|
|
|
| @@ -1333,8 +1205,8 @@ void MacroAssembler::InvokeFunction(Handle<JSFunction> function,
|
| const ParameterCount& actual,
|
| InvokeFlag flag,
|
| const CallWrapper& call_wrapper) {
|
| - Move(r1, function);
|
| - InvokeFunction(r1, expected, actual, flag, call_wrapper);
|
| + Move(r4, function);
|
| + InvokeFunction(r4, expected, actual, flag, call_wrapper);
|
| }
|
|
|
|
|
| @@ -1342,7 +1214,7 @@ void MacroAssembler::IsObjectJSObjectType(Register heap_object,
|
| Register map,
|
| Register scratch,
|
| Label* fail) {
|
| - ldr(map, FieldMemOperand(heap_object, HeapObject::kMapOffset));
|
| + LoadP(map, FieldMemOperand(heap_object, HeapObject::kMapOffset));
|
| IsInstanceJSObjectType(map, scratch, fail);
|
| }
|
|
|
| @@ -1350,11 +1222,11 @@ void MacroAssembler::IsObjectJSObjectType(Register heap_object,
|
| void MacroAssembler::IsInstanceJSObjectType(Register map,
|
| Register scratch,
|
| Label* fail) {
|
| - ldrb(scratch, FieldMemOperand(map, Map::kInstanceTypeOffset));
|
| - cmp(scratch, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
|
| - b(lt, fail);
|
| - cmp(scratch, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE));
|
| - b(gt, fail);
|
| + lbz(scratch, FieldMemOperand(map, Map::kInstanceTypeOffset));
|
| + cmpi(scratch, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
|
| + blt(fail);
|
| + cmpi(scratch, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE));
|
| + bgt(fail);
|
| }
|
|
|
|
|
| @@ -1363,26 +1235,26 @@ void MacroAssembler::IsObjectJSStringType(Register object,
|
| Label* fail) {
|
| ASSERT(kNotStringTag != 0);
|
|
|
| - ldr(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
|
| - ldrb(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
|
| - tst(scratch, Operand(kIsNotStringMask));
|
| - b(ne, fail);
|
| + LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
|
| + lbz(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
|
| + andi(r0, scratch, Operand(kIsNotStringMask));
|
| + bne(fail, cr0);
|
| }
|
|
|
|
|
| void MacroAssembler::IsObjectNameType(Register object,
|
| Register scratch,
|
| Label* fail) {
|
| - ldr(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
|
| - ldrb(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
|
| - cmp(scratch, Operand(LAST_NAME_TYPE));
|
| - b(hi, fail);
|
| + LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
|
| + lbz(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
|
| + cmpi(scratch, Operand(LAST_NAME_TYPE));
|
| + bgt(fail);
|
| }
|
|
|
|
|
| void MacroAssembler::DebugBreak() {
|
| - mov(r0, Operand::Zero());
|
| - mov(r1, Operand(ExternalReference(Runtime::kDebugBreak, isolate())));
|
| + li(r3, Operand::Zero());
|
| + mov(r4, Operand(ExternalReference(Runtime::kDebugBreak, isolate())));
|
| CEntryStub ces(isolate(), 1);
|
| ASSERT(AllowThisStubCall(&ces));
|
| Call(ces.GetCode(), RelocInfo::DEBUG_BREAK);
|
| @@ -1399,57 +1271,70 @@ void MacroAssembler::PushTryHandler(StackHandler::Kind kind,
|
| STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
|
| STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
|
|
|
| - // For the JSEntry handler, we must preserve r0-r4, r5-r6 are available.
|
| - // We will build up the handler from the bottom by pushing on the stack.
|
| - // Set up the code object (r5) and the state (r6) for pushing.
|
| - unsigned state =
|
| - StackHandler::IndexField::encode(handler_index) |
|
| - StackHandler::KindField::encode(kind);
|
| - mov(r5, Operand(CodeObject()));
|
| - mov(r6, Operand(state));
|
| + // For the JSEntry handler, we must preserve r1-r7, r0,r8-r15 are available.
|
| + // We want the stack to look like
|
| + // sp -> NextOffset
|
| + // CodeObject
|
| + // state
|
| + // context
|
| + // frame pointer
|
| +
|
| + // Link the current handler as the next handler.
|
| + mov(r8, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
|
| + LoadP(r0, MemOperand(r8));
|
| + StorePU(r0, MemOperand(sp, -StackHandlerConstants::kSize));
|
| + // Set this new handler as the current one.
|
| + StoreP(sp, MemOperand(r8));
|
|
|
| - // Push the frame pointer, context, state, and code object.
|
| if (kind == StackHandler::JS_ENTRY) {
|
| - mov(cp, Operand(Smi::FromInt(0))); // Indicates no context.
|
| - mov(ip, Operand::Zero()); // NULL frame pointer.
|
| - stm(db_w, sp, r5.bit() | r6.bit() | cp.bit() | ip.bit());
|
| + li(r8, Operand::Zero()); // NULL frame pointer.
|
| + StoreP(r8, MemOperand(sp, StackHandlerConstants::kFPOffset));
|
| + LoadSmiLiteral(r8, Smi::FromInt(0)); // Indicates no context.
|
| + StoreP(r8, MemOperand(sp, StackHandlerConstants::kContextOffset));
|
| } else {
|
| - stm(db_w, sp, r5.bit() | r6.bit() | cp.bit() | fp.bit());
|
| + // still not sure if fp is right
|
| + StoreP(fp, MemOperand(sp, StackHandlerConstants::kFPOffset));
|
| + StoreP(cp, MemOperand(sp, StackHandlerConstants::kContextOffset));
|
| }
|
| -
|
| - // Link the current handler as the next handler.
|
| - mov(r6, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
|
| - ldr(r5, MemOperand(r6));
|
| - push(r5);
|
| - // Set this new handler as the current one.
|
| - str(sp, MemOperand(r6));
|
| + unsigned state =
|
| + StackHandler::IndexField::encode(handler_index) |
|
| + StackHandler::KindField::encode(kind);
|
| + LoadIntLiteral(r8, state);
|
| + StoreP(r8, MemOperand(sp, StackHandlerConstants::kStateOffset));
|
| + mov(r8, Operand(CodeObject()));
|
| + StoreP(r8, MemOperand(sp, StackHandlerConstants::kCodeOffset));
|
| }
|
|
|
|
|
| void MacroAssembler::PopTryHandler() {
|
| STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
|
| - pop(r1);
|
| + pop(r4);
|
| mov(ip, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
|
| - add(sp, sp, Operand(StackHandlerConstants::kSize - kPointerSize));
|
| - str(r1, MemOperand(ip));
|
| + addi(sp, sp, Operand(StackHandlerConstants::kSize - kPointerSize));
|
| + StoreP(r4, MemOperand(ip));
|
| }
|
|
|
|
|
| +// PPC - make use of ip as a temporary register
|
| void MacroAssembler::JumpToHandlerEntry() {
|
| // Compute the handler entry address and jump to it. The handler table is
|
| // a fixed array of (smi-tagged) code offsets.
|
| - // r0 = exception, r1 = code object, r2 = state.
|
| -
|
| + // r3 = exception, r4 = code object, r5 = state.
|
| +#if V8_OOL_CONSTANT_POOL
|
| ConstantPoolUnavailableScope constant_pool_unavailable(this);
|
| - if (FLAG_enable_ool_constant_pool) {
|
| - ldr(pp, FieldMemOperand(r1, Code::kConstantPoolOffset)); // Constant pool.
|
| - }
|
| - ldr(r3, FieldMemOperand(r1, Code::kHandlerTableOffset)); // Handler table.
|
| - add(r3, r3, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
|
| - mov(r2, Operand(r2, LSR, StackHandler::kKindWidth)); // Handler index.
|
| - ldr(r2, MemOperand(r3, r2, LSL, kPointerSizeLog2)); // Smi-tagged offset.
|
| - add(r1, r1, Operand(Code::kHeaderSize - kHeapObjectTag)); // Code start.
|
| - add(pc, r1, Operand::SmiUntag(r2)); // Jump
|
| + LoadP(kConstantPoolRegister, FieldMemOperand(r4, Code::kConstantPoolOffset));
|
| +#endif
|
| + LoadP(r6, FieldMemOperand(r4, Code::kHandlerTableOffset)); // Handler table.
|
| + addi(r6, r6, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
|
| + srwi(r5, r5, Operand(StackHandler::kKindWidth)); // Handler index.
|
| + slwi(ip, r5, Operand(kPointerSizeLog2));
|
| + add(ip, r6, ip);
|
| + LoadP(r5, MemOperand(ip)); // Smi-tagged offset.
|
| + addi(r4, r4, Operand(Code::kHeaderSize - kHeapObjectTag)); // Code start.
|
| + SmiUntag(ip, r5);
|
| + add(r0, r4, ip);
|
| + mtctr(r0);
|
| + bctr();
|
| }
|
|
|
|
|
| @@ -1461,27 +1346,33 @@ void MacroAssembler::Throw(Register value) {
|
| STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
|
| STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
|
| STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
|
| + Label skip;
|
|
|
| - // The exception is expected in r0.
|
| - if (!value.is(r0)) {
|
| - mov(r0, value);
|
| + // The exception is expected in r3.
|
| + if (!value.is(r3)) {
|
| + mr(r3, value);
|
| }
|
| // Drop the stack pointer to the top of the top handler.
|
| - mov(r3, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
|
| - ldr(sp, MemOperand(r3));
|
| + mov(r6, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
|
| + LoadP(sp, MemOperand(r6));
|
| // Restore the next handler.
|
| - pop(r2);
|
| - str(r2, MemOperand(r3));
|
| + pop(r5);
|
| + StoreP(r5, MemOperand(r6));
|
|
|
| - // Get the code object (r1) and state (r2). Restore the context and frame
|
| + // Get the code object (r4) and state (r5). Restore the context and frame
|
| // pointer.
|
| - ldm(ia_w, sp, r1.bit() | r2.bit() | cp.bit() | fp.bit());
|
| + pop(r4);
|
| + pop(r5);
|
| + pop(cp);
|
| + pop(fp);
|
|
|
| // If the handler is a JS frame, restore the context to the frame.
|
| // (kind == ENTRY) == (fp == 0) == (cp == 0), so we could test either fp
|
| // or cp.
|
| - tst(cp, cp);
|
| - str(cp, MemOperand(fp, StandardFrameConstants::kContextOffset), ne);
|
| + cmpi(cp, Operand::Zero());
|
| + beq(&skip);
|
| + StoreP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
|
| + bind(&skip);
|
|
|
| JumpToHandlerEntry();
|
| }
|
| @@ -1496,32 +1387,35 @@ void MacroAssembler::ThrowUncatchable(Register value) {
|
| STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
|
| STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
|
|
|
| - // The exception is expected in r0.
|
| - if (!value.is(r0)) {
|
| - mov(r0, value);
|
| + // The exception is expected in r3.
|
| + if (!value.is(r3)) {
|
| + mr(r3, value);
|
| }
|
| // Drop the stack pointer to the top of the top stack handler.
|
| - mov(r3, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
|
| - ldr(sp, MemOperand(r3));
|
| + mov(r6, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
|
| + LoadP(sp, MemOperand(r6));
|
|
|
| // Unwind the handlers until the ENTRY handler is found.
|
| Label fetch_next, check_kind;
|
| - jmp(&check_kind);
|
| + b(&check_kind);
|
| bind(&fetch_next);
|
| - ldr(sp, MemOperand(sp, StackHandlerConstants::kNextOffset));
|
| + LoadP(sp, MemOperand(sp, StackHandlerConstants::kNextOffset));
|
|
|
| bind(&check_kind);
|
| STATIC_ASSERT(StackHandler::JS_ENTRY == 0);
|
| - ldr(r2, MemOperand(sp, StackHandlerConstants::kStateOffset));
|
| - tst(r2, Operand(StackHandler::KindField::kMask));
|
| - b(ne, &fetch_next);
|
| + LoadP(r5, MemOperand(sp, StackHandlerConstants::kStateOffset));
|
| + andi(r0, r5, Operand(StackHandler::KindField::kMask));
|
| + bne(&fetch_next, cr0);
|
|
|
| // Set the top handler address to next handler past the top ENTRY handler.
|
| - pop(r2);
|
| - str(r2, MemOperand(r3));
|
| - // Get the code object (r1) and state (r2). Clear the context and frame
|
| + pop(r5);
|
| + StoreP(r5, MemOperand(r6));
|
| + // Get the code object (r4) and state (r5). Clear the context and frame
|
| // pointer (0 was saved in the handler).
|
| - ldm(ia_w, sp, r1.bit() | r2.bit() | cp.bit() | fp.bit());
|
| + pop(r4);
|
| + pop(r5);
|
| + pop(cp);
|
| + pop(fp);
|
|
|
| JumpToHandlerEntry();
|
| }
|
| @@ -1537,18 +1431,18 @@ void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
|
| ASSERT(!scratch.is(ip));
|
|
|
| // Load current lexical context from the stack frame.
|
| - ldr(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
|
| + LoadP(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
|
| // In debug mode, make sure the lexical context is set.
|
| #ifdef DEBUG
|
| - cmp(scratch, Operand::Zero());
|
| + cmpi(scratch, Operand::Zero());
|
| Check(ne, kWeShouldNotHaveAnEmptyLexicalContext);
|
| #endif
|
|
|
| // Load the native context of the current context.
|
| int offset =
|
| Context::kHeaderSize + Context::GLOBAL_OBJECT_INDEX * kPointerSize;
|
| - ldr(scratch, FieldMemOperand(scratch, offset));
|
| - ldr(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
|
| + LoadP(scratch, FieldMemOperand(scratch, offset));
|
| + LoadP(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
|
|
|
| // Check the context is a native context.
|
| if (emit_debug_code()) {
|
| @@ -1556,7 +1450,7 @@ void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
|
| // that ip is clobbered as part of cmp with an object Operand.
|
| push(holder_reg); // Temporarily save holder on the stack.
|
| // Read the first word and compare to the native_context_map.
|
| - ldr(holder_reg, FieldMemOperand(scratch, HeapObject::kMapOffset));
|
| + LoadP(holder_reg, FieldMemOperand(scratch, HeapObject::kMapOffset));
|
| LoadRoot(ip, Heap::kNativeContextMapRootIndex);
|
| cmp(holder_reg, ip);
|
| Check(eq, kJSGlobalObjectNativeContextShouldBeANativeContext);
|
| @@ -1564,28 +1458,28 @@ void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
|
| }
|
|
|
| // Check if both contexts are the same.
|
| - ldr(ip, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
|
| - cmp(scratch, Operand(ip));
|
| - b(eq, &same_contexts);
|
| + LoadP(ip, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
|
| + cmp(scratch, ip);
|
| + beq(&same_contexts);
|
|
|
| // Check the context is a native context.
|
| if (emit_debug_code()) {
|
| // Cannot use ip as a temporary in this verification code. Due to the fact
|
| // that ip is clobbered as part of cmp with an object Operand.
|
| push(holder_reg); // Temporarily save holder on the stack.
|
| - mov(holder_reg, ip); // Move ip to its holding place.
|
| + mr(holder_reg, ip); // Move ip to its holding place.
|
| LoadRoot(ip, Heap::kNullValueRootIndex);
|
| cmp(holder_reg, ip);
|
| Check(ne, kJSGlobalProxyContextShouldNotBeNull);
|
|
|
| - ldr(holder_reg, FieldMemOperand(holder_reg, HeapObject::kMapOffset));
|
| + LoadP(holder_reg, FieldMemOperand(holder_reg, HeapObject::kMapOffset));
|
| LoadRoot(ip, Heap::kNativeContextMapRootIndex);
|
| cmp(holder_reg, ip);
|
| Check(eq, kJSGlobalObjectNativeContextShouldBeANativeContext);
|
| // Restore ip is not needed. ip is reloaded below.
|
| pop(holder_reg); // Restore holder.
|
| // Restore ip to holder's context.
|
| - ldr(ip, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
|
| + LoadP(ip, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
|
| }
|
|
|
| // Check that the security token in the calling global object is
|
| @@ -1594,10 +1488,10 @@ void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
|
| int token_offset = Context::kHeaderSize +
|
| Context::SECURITY_TOKEN_INDEX * kPointerSize;
|
|
|
| - ldr(scratch, FieldMemOperand(scratch, token_offset));
|
| - ldr(ip, FieldMemOperand(ip, token_offset));
|
| - cmp(scratch, Operand(ip));
|
| - b(ne, miss);
|
| + LoadP(scratch, FieldMemOperand(scratch, token_offset));
|
| + LoadP(ip, FieldMemOperand(ip, token_offset));
|
| + cmp(scratch, ip);
|
| + bne(miss);
|
|
|
| bind(&same_contexts);
|
| }
|
| @@ -1612,26 +1506,33 @@ void MacroAssembler::GetNumberHash(Register t0, Register scratch) {
|
| SmiUntag(scratch);
|
|
|
| // Xor original key with a seed.
|
| - eor(t0, t0, Operand(scratch));
|
| + xor_(t0, t0, scratch);
|
|
|
| // Compute the hash code from the untagged key. This must be kept in sync
|
| // with ComputeIntegerHash in utils.h.
|
| //
|
| // hash = ~hash + (hash << 15);
|
| - mvn(scratch, Operand(t0));
|
| - add(t0, scratch, Operand(t0, LSL, 15));
|
| + notx(scratch, t0);
|
| + slwi(t0, t0, Operand(15));
|
| + add(t0, scratch, t0);
|
| // hash = hash ^ (hash >> 12);
|
| - eor(t0, t0, Operand(t0, LSR, 12));
|
| + srwi(scratch, t0, Operand(12));
|
| + xor_(t0, t0, scratch);
|
| // hash = hash + (hash << 2);
|
| - add(t0, t0, Operand(t0, LSL, 2));
|
| + slwi(scratch, t0, Operand(2));
|
| + add(t0, t0, scratch);
|
| // hash = hash ^ (hash >> 4);
|
| - eor(t0, t0, Operand(t0, LSR, 4));
|
| + srwi(scratch, t0, Operand(4));
|
| + xor_(t0, t0, scratch);
|
| // hash = hash * 2057;
|
| - mov(scratch, Operand(t0, LSL, 11));
|
| - add(t0, t0, Operand(t0, LSL, 3));
|
| + mr(r0, t0);
|
| + slwi(scratch, t0, Operand(3));
|
| + add(t0, t0, scratch);
|
| + slwi(scratch, r0, Operand(11));
|
| add(t0, t0, scratch);
|
| // hash = hash ^ (hash >> 16);
|
| - eor(t0, t0, Operand(t0, LSR, 16));
|
| + srwi(scratch, t0, Operand(16));
|
| + xor_(t0, t0, scratch);
|
| }
|
|
|
|
|
| @@ -1667,32 +1568,35 @@ void MacroAssembler::LoadFromNumberDictionary(Label* miss,
|
| GetNumberHash(t0, t1);
|
|
|
| // Compute the capacity mask.
|
| - ldr(t1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset));
|
| + LoadP(t1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset));
|
| SmiUntag(t1);
|
| - sub(t1, t1, Operand(1));
|
| + subi(t1, t1, Operand(1));
|
|
|
| // Generate an unrolled loop that performs a few probes before giving up.
|
| for (int i = 0; i < kNumberDictionaryProbes; i++) {
|
| // Use t2 for index calculations and keep the hash intact in t0.
|
| - mov(t2, t0);
|
| + mr(t2, t0);
|
| // Compute the masked index: (hash + i + i * i) & mask.
|
| if (i > 0) {
|
| - add(t2, t2, Operand(SeededNumberDictionary::GetProbeOffset(i)));
|
| + addi(t2, t2, Operand(SeededNumberDictionary::GetProbeOffset(i)));
|
| }
|
| - and_(t2, t2, Operand(t1));
|
| + and_(t2, t2, t1);
|
|
|
| // Scale the index by multiplying by the element size.
|
| ASSERT(SeededNumberDictionary::kEntrySize == 3);
|
| - add(t2, t2, Operand(t2, LSL, 1)); // t2 = t2 * 3
|
| + slwi(ip, t2, Operand(1));
|
| + add(t2, t2, ip); // t2 = t2 * 3
|
|
|
| // Check if the key is identical to the name.
|
| - add(t2, elements, Operand(t2, LSL, kPointerSizeLog2));
|
| - ldr(ip, FieldMemOperand(t2, SeededNumberDictionary::kElementsStartOffset));
|
| - cmp(key, Operand(ip));
|
| + slwi(t2, t2, Operand(kPointerSizeLog2));
|
| + add(t2, elements, t2);
|
| + LoadP(ip,
|
| + FieldMemOperand(t2, SeededNumberDictionary::kElementsStartOffset));
|
| + cmp(key, ip);
|
| if (i != kNumberDictionaryProbes - 1) {
|
| - b(eq, &done);
|
| + beq(&done);
|
| } else {
|
| - b(ne, miss);
|
| + bne(miss);
|
| }
|
| }
|
|
|
| @@ -1701,14 +1605,15 @@ void MacroAssembler::LoadFromNumberDictionary(Label* miss,
|
| // t2: elements + (index * kPointerSize)
|
| const int kDetailsOffset =
|
| SeededNumberDictionary::kElementsStartOffset + 2 * kPointerSize;
|
| - ldr(t1, FieldMemOperand(t2, kDetailsOffset));
|
| - tst(t1, Operand(Smi::FromInt(PropertyDetails::TypeField::kMask)));
|
| - b(ne, miss);
|
| + LoadP(t1, FieldMemOperand(t2, kDetailsOffset));
|
| + LoadSmiLiteral(ip, Smi::FromInt(PropertyDetails::TypeField::kMask));
|
| + and_(r0, t1, ip, SetRC);
|
| + bne(miss, cr0);
|
|
|
| // Get the value at the masked, scaled index and return.
|
| const int kValueOffset =
|
| SeededNumberDictionary::kElementsStartOffset + kPointerSize;
|
| - ldr(result, FieldMemOperand(t2, kValueOffset));
|
| + LoadP(result, FieldMemOperand(t2, kValueOffset));
|
| }
|
|
|
|
|
| @@ -1722,11 +1627,11 @@ void MacroAssembler::Allocate(int object_size,
|
| if (!FLAG_inline_new) {
|
| if (emit_debug_code()) {
|
| // Trash the registers to simulate an allocation failure.
|
| - mov(result, Operand(0x7091));
|
| - mov(scratch1, Operand(0x7191));
|
| - mov(scratch2, Operand(0x7291));
|
| + li(result, Operand(0x7091));
|
| + li(scratch1, Operand(0x7191));
|
| + li(scratch2, Operand(0x7291));
|
| }
|
| - jmp(gc_required);
|
| + b(gc_required);
|
| return;
|
| }
|
|
|
| @@ -1740,12 +1645,9 @@ void MacroAssembler::Allocate(int object_size,
|
| if ((flags & SIZE_IN_WORDS) != 0) {
|
| object_size *= kPointerSize;
|
| }
|
| - ASSERT_EQ(0, object_size & kObjectAlignmentMask);
|
| + ASSERT_EQ(0, static_cast<int>(object_size & kObjectAlignmentMask));
|
|
|
| // Check relative positions of allocation top and limit addresses.
|
| - // The values must be adjacent in memory to allow the use of LDM.
|
| - // Also, assert that the registers are numbered such that the values
|
| - // are loaded in the correct order.
|
| ExternalReference allocation_top =
|
| AllocationUtils::GetAllocationTopReference(isolate(), flags);
|
| ExternalReference allocation_limit =
|
| @@ -1756,7 +1658,6 @@ void MacroAssembler::Allocate(int object_size,
|
| intptr_t limit =
|
| reinterpret_cast<intptr_t>(allocation_limit.address());
|
| ASSERT((limit - top) == kPointerSize);
|
| - ASSERT(result.code() < ip.code());
|
|
|
| // Set up allocation top address register.
|
| Register topaddr = scratch1;
|
| @@ -1766,66 +1667,61 @@ void MacroAssembler::Allocate(int object_size,
|
| // does not need ip for implicit literal generation.
|
| if ((flags & RESULT_CONTAINS_TOP) == 0) {
|
| // Load allocation top into result and allocation limit into ip.
|
| - ldm(ia, topaddr, result.bit() | ip.bit());
|
| + LoadP(result, MemOperand(topaddr));
|
| + LoadP(ip, MemOperand(topaddr, kPointerSize));
|
| } else {
|
| if (emit_debug_code()) {
|
| // Assert that result actually contains top on entry. ip is used
|
| // immediately below so this use of ip does not cause difference with
|
| // respect to register content between debug and release mode.
|
| - ldr(ip, MemOperand(topaddr));
|
| + LoadP(ip, MemOperand(topaddr));
|
| cmp(result, ip);
|
| Check(eq, kUnexpectedAllocationTop);
|
| }
|
| // Load allocation limit into ip. Result already contains allocation top.
|
| - ldr(ip, MemOperand(topaddr, limit - top));
|
| + LoadP(ip, MemOperand(topaddr, limit - top), r0);
|
| }
|
|
|
| if ((flags & DOUBLE_ALIGNMENT) != 0) {
|
| // Align the next allocation. Storing the filler map without checking top is
|
| // safe in new-space because the limit of the heap is aligned there.
|
| ASSERT((flags & PRETENURE_OLD_POINTER_SPACE) == 0);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
|
| +#else
|
| STATIC_ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
|
| - and_(scratch2, result, Operand(kDoubleAlignmentMask), SetCC);
|
| + andi(scratch2, result, Operand(kDoubleAlignmentMask));
|
| Label aligned;
|
| - b(eq, &aligned);
|
| + beq(&aligned, cr0);
|
| if ((flags & PRETENURE_OLD_DATA_SPACE) != 0) {
|
| - cmp(result, Operand(ip));
|
| - b(hs, gc_required);
|
| + cmpl(result, ip);
|
| + bge(gc_required);
|
| }
|
| mov(scratch2, Operand(isolate()->factory()->one_pointer_filler_map()));
|
| - str(scratch2, MemOperand(result, kDoubleSize / 2, PostIndex));
|
| + stw(scratch2, MemOperand(result));
|
| + addi(result, result, Operand(kDoubleSize / 2));
|
| bind(&aligned);
|
| +#endif
|
| }
|
|
|
| // Calculate new top and bail out if new space is exhausted. Use result
|
| - // to calculate the new top. We must preserve the ip register at this
|
| - // point, so we cannot just use add().
|
| - ASSERT(object_size > 0);
|
| - Register source = result;
|
| - Condition cond = al;
|
| - int shift = 0;
|
| - while (object_size != 0) {
|
| - if (((object_size >> shift) & 0x03) == 0) {
|
| - shift += 2;
|
| - } else {
|
| - int bits = object_size & (0xff << shift);
|
| - object_size -= bits;
|
| - shift += 8;
|
| - Operand bits_operand(bits);
|
| - ASSERT(bits_operand.instructions_required(this) == 1);
|
| - add(scratch2, source, bits_operand, SetCC, cond);
|
| - source = scratch2;
|
| - cond = cc;
|
| - }
|
| + // to calculate the new top.
|
| + li(r0, Operand(-1));
|
| + if (is_int16(object_size)) {
|
| + addic(scratch2, result, Operand(object_size));
|
| + } else {
|
| + mov(scratch2, Operand(object_size));
|
| + addc(scratch2, result, scratch2);
|
| }
|
| - b(cs, gc_required);
|
| - cmp(scratch2, Operand(ip));
|
| - b(hi, gc_required);
|
| - str(scratch2, MemOperand(topaddr));
|
| + addze(r0, r0, LeaveOE, SetRC);
|
| + beq(gc_required, cr0);
|
| + cmpl(scratch2, ip);
|
| + bgt(gc_required);
|
| + StoreP(scratch2, MemOperand(topaddr));
|
|
|
| // Tag object if requested.
|
| if ((flags & TAG_OBJECT) != 0) {
|
| - add(result, result, Operand(kHeapObjectTag));
|
| + addi(result, result, Operand(kHeapObjectTag));
|
| }
|
| }
|
|
|
| @@ -1839,11 +1735,11 @@ void MacroAssembler::Allocate(Register object_size,
|
| if (!FLAG_inline_new) {
|
| if (emit_debug_code()) {
|
| // Trash the registers to simulate an allocation failure.
|
| - mov(result, Operand(0x7091));
|
| - mov(scratch1, Operand(0x7191));
|
| - mov(scratch2, Operand(0x7291));
|
| + li(result, Operand(0x7091));
|
| + li(scratch1, Operand(0x7191));
|
| + li(scratch2, Operand(0x7291));
|
| }
|
| - jmp(gc_required);
|
| + b(gc_required);
|
| return;
|
| }
|
|
|
| @@ -1858,9 +1754,6 @@ void MacroAssembler::Allocate(Register object_size,
|
| ASSERT(!scratch2.is(ip));
|
|
|
| // Check relative positions of allocation top and limit addresses.
|
| - // The values must be adjacent in memory to allow the use of LDM.
|
| - // Also, assert that the registers are numbered such that the values
|
| - // are loaded in the correct order.
|
| ExternalReference allocation_top =
|
| AllocationUtils::GetAllocationTopReference(isolate(), flags);
|
| ExternalReference allocation_limit =
|
| @@ -1870,7 +1763,6 @@ void MacroAssembler::Allocate(Register object_size,
|
| intptr_t limit =
|
| reinterpret_cast<intptr_t>(allocation_limit.address());
|
| ASSERT((limit - top) == kPointerSize);
|
| - ASSERT(result.code() < ip.code());
|
|
|
| // Set up allocation top address.
|
| Register topaddr = scratch1;
|
| @@ -1880,59 +1772,68 @@ void MacroAssembler::Allocate(Register object_size,
|
| // does not need ip for implicit literal generation.
|
| if ((flags & RESULT_CONTAINS_TOP) == 0) {
|
| // Load allocation top into result and allocation limit into ip.
|
| - ldm(ia, topaddr, result.bit() | ip.bit());
|
| + LoadP(result, MemOperand(topaddr));
|
| + LoadP(ip, MemOperand(topaddr, kPointerSize));
|
| } else {
|
| if (emit_debug_code()) {
|
| // Assert that result actually contains top on entry. ip is used
|
| // immediately below so this use of ip does not cause difference with
|
| // respect to register content between debug and release mode.
|
| - ldr(ip, MemOperand(topaddr));
|
| + LoadP(ip, MemOperand(topaddr));
|
| cmp(result, ip);
|
| Check(eq, kUnexpectedAllocationTop);
|
| }
|
| // Load allocation limit into ip. Result already contains allocation top.
|
| - ldr(ip, MemOperand(topaddr, limit - top));
|
| + LoadP(ip, MemOperand(topaddr, limit - top));
|
| }
|
|
|
| if ((flags & DOUBLE_ALIGNMENT) != 0) {
|
| // Align the next allocation. Storing the filler map without checking top is
|
| // safe in new-space because the limit of the heap is aligned there.
|
| ASSERT((flags & PRETENURE_OLD_POINTER_SPACE) == 0);
|
| - ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
|
| - and_(scratch2, result, Operand(kDoubleAlignmentMask), SetCC);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
|
| +#else
|
| + STATIC_ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
|
| + andi(scratch2, result, Operand(kDoubleAlignmentMask));
|
| Label aligned;
|
| - b(eq, &aligned);
|
| + beq(&aligned, cr0);
|
| if ((flags & PRETENURE_OLD_DATA_SPACE) != 0) {
|
| - cmp(result, Operand(ip));
|
| - b(hs, gc_required);
|
| + cmpl(result, ip);
|
| + bge(gc_required);
|
| }
|
| mov(scratch2, Operand(isolate()->factory()->one_pointer_filler_map()));
|
| - str(scratch2, MemOperand(result, kDoubleSize / 2, PostIndex));
|
| + stw(scratch2, MemOperand(result));
|
| + addi(result, result, Operand(kDoubleSize / 2));
|
| bind(&aligned);
|
| +#endif
|
| }
|
|
|
| // Calculate new top and bail out if new space is exhausted. Use result
|
| // to calculate the new top. Object size may be in words so a shift is
|
| // required to get the number of bytes.
|
| + li(r0, Operand(-1));
|
| if ((flags & SIZE_IN_WORDS) != 0) {
|
| - add(scratch2, result, Operand(object_size, LSL, kPointerSizeLog2), SetCC);
|
| + ShiftLeftImm(scratch2, object_size, Operand(kPointerSizeLog2));
|
| + addc(scratch2, result, scratch2);
|
| } else {
|
| - add(scratch2, result, Operand(object_size), SetCC);
|
| + addc(scratch2, result, object_size);
|
| }
|
| - b(cs, gc_required);
|
| - cmp(scratch2, Operand(ip));
|
| - b(hi, gc_required);
|
| + addze(r0, r0, LeaveOE, SetRC);
|
| + beq(gc_required, cr0);
|
| + cmpl(scratch2, ip);
|
| + bgt(gc_required);
|
|
|
| // Update allocation top. result temporarily holds the new top.
|
| if (emit_debug_code()) {
|
| - tst(scratch2, Operand(kObjectAlignmentMask));
|
| - Check(eq, kUnalignedAllocationInNewSpace);
|
| + andi(r0, scratch2, Operand(kObjectAlignmentMask));
|
| + Check(eq, kUnalignedAllocationInNewSpace, cr0);
|
| }
|
| - str(scratch2, MemOperand(topaddr));
|
| + StoreP(scratch2, MemOperand(topaddr));
|
|
|
| // Tag object if requested.
|
| if ((flags & TAG_OBJECT) != 0) {
|
| - add(result, result, Operand(kHeapObjectTag));
|
| + addi(result, result, Operand(kHeapObjectTag));
|
| }
|
| }
|
|
|
| @@ -1943,17 +1844,19 @@ void MacroAssembler::UndoAllocationInNewSpace(Register object,
|
| ExternalReference::new_space_allocation_top_address(isolate());
|
|
|
| // Make sure the object has no tag before resetting top.
|
| - and_(object, object, Operand(~kHeapObjectTagMask));
|
| + mov(r0, Operand(~kHeapObjectTagMask));
|
| + and_(object, object, r0);
|
| + // was.. and_(object, object, Operand(~kHeapObjectTagMask));
|
| #ifdef DEBUG
|
| // Check that the object un-allocated is below the current top.
|
| mov(scratch, Operand(new_space_allocation_top));
|
| - ldr(scratch, MemOperand(scratch));
|
| + LoadP(scratch, MemOperand(scratch));
|
| cmp(object, scratch);
|
| Check(lt, kUndoAllocationOfNonAllocatedMemory);
|
| #endif
|
| // Write the address of the object to un-allocate as the current top.
|
| mov(scratch, Operand(new_space_allocation_top));
|
| - str(object, MemOperand(scratch));
|
| + StoreP(object, MemOperand(scratch));
|
| }
|
|
|
|
|
| @@ -1966,10 +1869,11 @@ void MacroAssembler::AllocateTwoByteString(Register result,
|
| // Calculate the number of bytes needed for the characters in the string while
|
| // observing object alignment.
|
| ASSERT((SeqTwoByteString::kHeaderSize & kObjectAlignmentMask) == 0);
|
| - mov(scratch1, Operand(length, LSL, 1)); // Length in bytes, not chars.
|
| - add(scratch1, scratch1,
|
| - Operand(kObjectAlignmentMask + SeqTwoByteString::kHeaderSize));
|
| - and_(scratch1, scratch1, Operand(~kObjectAlignmentMask));
|
| + slwi(scratch1, length, Operand(1)); // Length in bytes, not chars.
|
| + addi(scratch1, scratch1,
|
| + Operand(kObjectAlignmentMask + SeqTwoByteString::kHeaderSize));
|
| + mov(r0, Operand(~kObjectAlignmentMask));
|
| + and_(scratch1, scratch1, r0);
|
|
|
| // Allocate two-byte string in new space.
|
| Allocate(scratch1,
|
| @@ -1998,9 +1902,10 @@ void MacroAssembler::AllocateAsciiString(Register result,
|
| // observing object alignment.
|
| ASSERT((SeqOneByteString::kHeaderSize & kObjectAlignmentMask) == 0);
|
| ASSERT(kCharSize == 1);
|
| - add(scratch1, length,
|
| - Operand(kObjectAlignmentMask + SeqOneByteString::kHeaderSize));
|
| - and_(scratch1, scratch1, Operand(~kObjectAlignmentMask));
|
| + addi(scratch1, length,
|
| + Operand(kObjectAlignmentMask + SeqOneByteString::kHeaderSize));
|
| + li(r0, Operand(~kObjectAlignmentMask));
|
| + and_(scratch1, scratch1, r0);
|
|
|
| // Allocate ASCII string in new space.
|
| Allocate(scratch1,
|
| @@ -2093,7 +1998,7 @@ void MacroAssembler::CompareObjectType(Register object,
|
| InstanceType type) {
|
| const Register temp = type_reg.is(no_reg) ? ip : type_reg;
|
|
|
| - ldr(map, FieldMemOperand(object, HeapObject::kMapOffset));
|
| + LoadP(map, FieldMemOperand(object, HeapObject::kMapOffset));
|
| CompareInstanceType(map, temp, type);
|
| }
|
|
|
| @@ -2105,24 +2010,21 @@ void MacroAssembler::CheckObjectTypeRange(Register object,
|
| Label* false_label) {
|
| STATIC_ASSERT(Map::kInstanceTypeOffset < 4096);
|
| STATIC_ASSERT(LAST_TYPE < 256);
|
| - ldr(map, FieldMemOperand(object, HeapObject::kMapOffset));
|
| - ldrb(ip, FieldMemOperand(map, Map::kInstanceTypeOffset));
|
| - sub(ip, ip, Operand(min_type));
|
| - cmp(ip, Operand(max_type - min_type));
|
| - b(hi, false_label);
|
| + LoadP(map, FieldMemOperand(object, HeapObject::kMapOffset));
|
| + lbz(ip, FieldMemOperand(map, Map::kInstanceTypeOffset));
|
| + subi(ip, ip, Operand(min_type));
|
| + cmpli(ip, Operand(max_type - min_type));
|
| + bgt(false_label);
|
| }
|
|
|
|
|
| void MacroAssembler::CompareInstanceType(Register map,
|
| Register type_reg,
|
| InstanceType type) {
|
| - // Registers map and type_reg can be ip. These two lines assert
|
| - // that ip can be used with the two instructions (the constants
|
| - // will never need ip).
|
| STATIC_ASSERT(Map::kInstanceTypeOffset < 4096);
|
| STATIC_ASSERT(LAST_TYPE < 256);
|
| - ldrb(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
|
| - cmp(type_reg, Operand(type));
|
| + lbz(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
|
| + cmpi(type_reg, Operand(type));
|
| }
|
|
|
|
|
| @@ -2141,9 +2043,10 @@ void MacroAssembler::CheckFastElements(Register map,
|
| STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
|
| STATIC_ASSERT(FAST_ELEMENTS == 2);
|
| STATIC_ASSERT(FAST_HOLEY_ELEMENTS == 3);
|
| - ldrb(scratch, FieldMemOperand(map, Map::kBitField2Offset));
|
| - cmp(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
|
| - b(hi, fail);
|
| + lbz(scratch, FieldMemOperand(map, Map::kBitField2Offset));
|
| + STATIC_ASSERT(Map::kMaximumBitField2FastHoleyElementValue < 0x8000);
|
| + cmpli(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
|
| + bgt(fail);
|
| }
|
|
|
|
|
| @@ -2154,11 +2057,11 @@ void MacroAssembler::CheckFastObjectElements(Register map,
|
| STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
|
| STATIC_ASSERT(FAST_ELEMENTS == 2);
|
| STATIC_ASSERT(FAST_HOLEY_ELEMENTS == 3);
|
| - ldrb(scratch, FieldMemOperand(map, Map::kBitField2Offset));
|
| - cmp(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
|
| - b(ls, fail);
|
| - cmp(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
|
| - b(hi, fail);
|
| + lbz(scratch, FieldMemOperand(map, Map::kBitField2Offset));
|
| + cmpli(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
|
| + ble(fail);
|
| + cmpli(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
|
| + bgt(fail);
|
| }
|
|
|
|
|
| @@ -2167,18 +2070,19 @@ void MacroAssembler::CheckFastSmiElements(Register map,
|
| Label* fail) {
|
| STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
|
| STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
|
| - ldrb(scratch, FieldMemOperand(map, Map::kBitField2Offset));
|
| - cmp(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
|
| - b(hi, fail);
|
| + lbz(scratch, FieldMemOperand(map, Map::kBitField2Offset));
|
| + cmpli(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
|
| + bgt(fail);
|
| }
|
|
|
|
|
| +
|
| void MacroAssembler::StoreNumberToDoubleElements(
|
| Register value_reg,
|
| Register key_reg,
|
| Register elements_reg,
|
| Register scratch1,
|
| - LowDwVfpRegister double_scratch,
|
| + DoubleRegister double_scratch,
|
| Label* fail,
|
| int elements_offset) {
|
| Label smi_value, store;
|
| @@ -2193,32 +2097,93 @@ void MacroAssembler::StoreNumberToDoubleElements(
|
| fail,
|
| DONT_DO_SMI_CHECK);
|
|
|
| - vldr(double_scratch, FieldMemOperand(value_reg, HeapNumber::kValueOffset));
|
| + lfd(double_scratch, FieldMemOperand(value_reg, HeapNumber::kValueOffset));
|
| // Force a canonical NaN.
|
| - if (emit_debug_code()) {
|
| - vmrs(ip);
|
| - tst(ip, Operand(kVFPDefaultNaNModeControlBit));
|
| - Assert(ne, kDefaultNaNModeNotSet);
|
| - }
|
| - VFPCanonicalizeNaN(double_scratch);
|
| + CanonicalizeNaN(double_scratch);
|
| b(&store);
|
|
|
| bind(&smi_value);
|
| SmiToDouble(double_scratch, value_reg);
|
|
|
| bind(&store);
|
| - add(scratch1, elements_reg, Operand::DoubleOffsetFromSmiKey(key_reg));
|
| - vstr(double_scratch,
|
| + SmiToDoubleArrayOffset(scratch1, key_reg);
|
| + add(scratch1, elements_reg, scratch1);
|
| + stfd(double_scratch,
|
| FieldMemOperand(scratch1,
|
| FixedDoubleArray::kHeaderSize - elements_offset));
|
| }
|
|
|
|
|
| +void MacroAssembler::AddAndCheckForOverflow(Register dst,
|
| + Register left,
|
| + Register right,
|
| + Register overflow_dst,
|
| + Register scratch) {
|
| + ASSERT(!dst.is(overflow_dst));
|
| + ASSERT(!dst.is(scratch));
|
| + ASSERT(!overflow_dst.is(scratch));
|
| + ASSERT(!overflow_dst.is(left));
|
| + ASSERT(!overflow_dst.is(right));
|
| +
|
| + // C = A+B; C overflows if A/B have same sign and C has diff sign than A
|
| + if (dst.is(left)) {
|
| + mr(scratch, left); // Preserve left.
|
| + add(dst, left, right); // Left is overwritten.
|
| + xor_(scratch, dst, scratch); // Original left.
|
| + xor_(overflow_dst, dst, right);
|
| + and_(overflow_dst, overflow_dst, scratch, SetRC);
|
| + } else if (dst.is(right)) {
|
| + mr(scratch, right); // Preserve right.
|
| + add(dst, left, right); // Right is overwritten.
|
| + xor_(scratch, dst, scratch); // Original right.
|
| + xor_(overflow_dst, dst, left);
|
| + and_(overflow_dst, overflow_dst, scratch, SetRC);
|
| + } else {
|
| + add(dst, left, right);
|
| + xor_(overflow_dst, dst, left);
|
| + xor_(scratch, dst, right);
|
| + and_(overflow_dst, scratch, overflow_dst, SetRC);
|
| + }
|
| +}
|
| +
|
| +void MacroAssembler::SubAndCheckForOverflow(Register dst,
|
| + Register left,
|
| + Register right,
|
| + Register overflow_dst,
|
| + Register scratch) {
|
| + ASSERT(!dst.is(overflow_dst));
|
| + ASSERT(!dst.is(scratch));
|
| + ASSERT(!overflow_dst.is(scratch));
|
| + ASSERT(!overflow_dst.is(left));
|
| + ASSERT(!overflow_dst.is(right));
|
| +
|
| + // C = A-B; C overflows if A/B have diff signs and C has diff sign than A
|
| + if (dst.is(left)) {
|
| + mr(scratch, left); // Preserve left.
|
| + sub(dst, left, right); // Left is overwritten.
|
| + xor_(overflow_dst, dst, scratch);
|
| + xor_(scratch, scratch, right);
|
| + and_(overflow_dst, overflow_dst, scratch, SetRC);
|
| + } else if (dst.is(right)) {
|
| + mr(scratch, right); // Preserve right.
|
| + sub(dst, left, right); // Right is overwritten.
|
| + xor_(overflow_dst, dst, left);
|
| + xor_(scratch, left, scratch);
|
| + and_(overflow_dst, overflow_dst, scratch, SetRC);
|
| + } else {
|
| + sub(dst, left, right);
|
| + xor_(overflow_dst, dst, left);
|
| + xor_(scratch, left, right);
|
| + and_(overflow_dst, scratch, overflow_dst, SetRC);
|
| + }
|
| +}
|
| +
|
| +
|
| void MacroAssembler::CompareMap(Register obj,
|
| Register scratch,
|
| Handle<Map> map,
|
| Label* early_success) {
|
| - ldr(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
|
| + LoadP(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
|
| CompareMap(scratch, map, early_success);
|
| }
|
|
|
| @@ -2226,7 +2191,8 @@ void MacroAssembler::CompareMap(Register obj,
|
| void MacroAssembler::CompareMap(Register obj_map,
|
| Handle<Map> map,
|
| Label* early_success) {
|
| - cmp(obj_map, Operand(map));
|
| + mov(r0, Operand(map));
|
| + cmp(obj_map, r0);
|
| }
|
|
|
|
|
| @@ -2241,7 +2207,7 @@ void MacroAssembler::CheckMap(Register obj,
|
|
|
| Label success;
|
| CompareMap(obj, scratch, map, &success);
|
| - b(ne, fail);
|
| + bne(fail);
|
| bind(&success);
|
| }
|
|
|
| @@ -2254,10 +2220,10 @@ void MacroAssembler::CheckMap(Register obj,
|
| if (smi_check_type == DO_SMI_CHECK) {
|
| JumpIfSmi(obj, fail);
|
| }
|
| - ldr(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
|
| + LoadP(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
|
| LoadRoot(ip, index);
|
| cmp(scratch, ip);
|
| - b(ne, fail);
|
| + bne(fail);
|
| }
|
|
|
|
|
| @@ -2270,10 +2236,11 @@ void MacroAssembler::DispatchMap(Register obj,
|
| if (smi_check_type == DO_SMI_CHECK) {
|
| JumpIfSmi(obj, &fail);
|
| }
|
| - ldr(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
|
| + LoadP(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
|
| mov(ip, Operand(map));
|
| cmp(scratch, ip);
|
| - Jump(success, RelocInfo::CODE_TARGET, eq);
|
| + bne(&fail);
|
| + Jump(success, RelocInfo::CODE_TARGET, al);
|
| bind(&fail);
|
| }
|
|
|
| @@ -2290,48 +2257,53 @@ void MacroAssembler::TryGetFunctionPrototype(Register function,
|
|
|
| // Check that the function really is a function. Load map into result reg.
|
| CompareObjectType(function, result, scratch, JS_FUNCTION_TYPE);
|
| - b(ne, miss);
|
| + bne(miss);
|
|
|
| - ldr(scratch,
|
| - FieldMemOperand(function, JSFunction::kSharedFunctionInfoOffset));
|
| - ldr(scratch,
|
| + LoadP(scratch,
|
| + FieldMemOperand(function, JSFunction::kSharedFunctionInfoOffset));
|
| + lwz(scratch,
|
| FieldMemOperand(scratch, SharedFunctionInfo::kCompilerHintsOffset));
|
| - tst(scratch,
|
| - Operand(Smi::FromInt(1 << SharedFunctionInfo::kBoundFunction)));
|
| - b(ne, miss);
|
| + TestBit(scratch,
|
| +#if V8_TARGET_ARCH_PPC64
|
| + SharedFunctionInfo::kBoundFunction,
|
| +#else
|
| + SharedFunctionInfo::kBoundFunction + kSmiTagSize,
|
| +#endif
|
| + r0);
|
| + bne(miss, cr0);
|
|
|
| // Make sure that the function has an instance prototype.
|
| - ldrb(scratch, FieldMemOperand(result, Map::kBitFieldOffset));
|
| - tst(scratch, Operand(1 << Map::kHasNonInstancePrototype));
|
| - b(ne, &non_instance);
|
| + lbz(scratch, FieldMemOperand(result, Map::kBitFieldOffset));
|
| + andi(r0, scratch, Operand(1 << Map::kHasNonInstancePrototype));
|
| + bne(&non_instance, cr0);
|
| }
|
|
|
| // Get the prototype or initial map from the function.
|
| - ldr(result,
|
| - FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
|
| + LoadP(result,
|
| + FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
|
|
|
| // If the prototype or initial map is the hole, don't return it and
|
| // simply miss the cache instead. This will allow us to allocate a
|
| // prototype object on-demand in the runtime system.
|
| LoadRoot(ip, Heap::kTheHoleValueRootIndex);
|
| cmp(result, ip);
|
| - b(eq, miss);
|
| + beq(miss);
|
|
|
| // If the function does not have an initial map, we're done.
|
| Label done;
|
| CompareObjectType(result, scratch, scratch, MAP_TYPE);
|
| - b(ne, &done);
|
| + bne(&done);
|
|
|
| // Get the prototype from the initial map.
|
| - ldr(result, FieldMemOperand(result, Map::kPrototypeOffset));
|
| + LoadP(result, FieldMemOperand(result, Map::kPrototypeOffset));
|
|
|
| if (miss_on_bound_function) {
|
| - jmp(&done);
|
| + b(&done);
|
|
|
| // Non-instance prototype: Fetch prototype from constructor field
|
| // in initial map.
|
| bind(&non_instance);
|
| - ldr(result, FieldMemOperand(result, Map::kConstructorOffset));
|
| + LoadP(result, FieldMemOperand(result, Map::kConstructorOffset));
|
| }
|
|
|
| // All done.
|
| @@ -2364,45 +2336,50 @@ void MacroAssembler::CallApiFunctionAndReturn(
|
| MemOperand return_value_operand,
|
| MemOperand* context_restore_operand) {
|
| ExternalReference next_address =
|
| - ExternalReference::handle_scope_next_address(isolate());
|
| + ExternalReference::handle_scope_next_address(isolate());
|
| const int kNextOffset = 0;
|
| const int kLimitOffset = AddressOffset(
|
| - ExternalReference::handle_scope_limit_address(isolate()),
|
| - next_address);
|
| + ExternalReference::handle_scope_limit_address(isolate()),
|
| + next_address);
|
| const int kLevelOffset = AddressOffset(
|
| - ExternalReference::handle_scope_level_address(isolate()),
|
| - next_address);
|
| + ExternalReference::handle_scope_level_address(isolate()),
|
| + next_address);
|
|
|
| - ASSERT(function_address.is(r1) || function_address.is(r2));
|
| + ASSERT(function_address.is(r4) || function_address.is(r5));
|
| + Register scratch = r6;
|
|
|
| Label profiler_disabled;
|
| Label end_profiler_check;
|
| - mov(r9, Operand(ExternalReference::is_profiling_address(isolate())));
|
| - ldrb(r9, MemOperand(r9, 0));
|
| - cmp(r9, Operand(0));
|
| - b(eq, &profiler_disabled);
|
| + mov(scratch, Operand(ExternalReference::is_profiling_address(isolate())));
|
| + lbz(scratch, MemOperand(scratch, 0));
|
| + cmpi(scratch, Operand::Zero());
|
| + beq(&profiler_disabled);
|
|
|
| // Additional parameter is the address of the actual callback.
|
| - mov(r3, Operand(thunk_ref));
|
| + mov(scratch, Operand(thunk_ref));
|
| jmp(&end_profiler_check);
|
|
|
| bind(&profiler_disabled);
|
| - Move(r3, function_address);
|
| + mr(scratch, function_address);
|
| bind(&end_profiler_check);
|
|
|
| // Allocate HandleScope in callee-save registers.
|
| - mov(r9, Operand(next_address));
|
| - ldr(r4, MemOperand(r9, kNextOffset));
|
| - ldr(r5, MemOperand(r9, kLimitOffset));
|
| - ldr(r6, MemOperand(r9, kLevelOffset));
|
| - add(r6, r6, Operand(1));
|
| - str(r6, MemOperand(r9, kLevelOffset));
|
| + // r17 - next_address
|
| + // r14 - next_address->kNextOffset
|
| + // r15 - next_address->kLimitOffset
|
| + // r16 - next_address->kLevelOffset
|
| + mov(r17, Operand(next_address));
|
| + LoadP(r14, MemOperand(r17, kNextOffset));
|
| + LoadP(r15, MemOperand(r17, kLimitOffset));
|
| + lwz(r16, MemOperand(r17, kLevelOffset));
|
| + addi(r16, r16, Operand(1));
|
| + stw(r16, MemOperand(r17, kLevelOffset));
|
|
|
| if (FLAG_log_timer_events) {
|
| FrameScope frame(this, StackFrame::MANUAL);
|
| PushSafepointRegisters();
|
| - PrepareCallCFunction(1, r0);
|
| - mov(r0, Operand(ExternalReference::isolate_address(isolate())));
|
| + PrepareCallCFunction(1, r3);
|
| + mov(r3, Operand(ExternalReference::isolate_address(isolate())));
|
| CallCFunction(ExternalReference::log_enter_external_function(isolate()), 1);
|
| PopSafepointRegisters();
|
| }
|
| @@ -2411,13 +2388,13 @@ void MacroAssembler::CallApiFunctionAndReturn(
|
| // return address pushed on stack (could have moved after GC).
|
| // DirectCEntry stub itself is generated early and never moves.
|
| DirectCEntryStub stub(isolate());
|
| - stub.GenerateCall(this, r3);
|
| + stub.GenerateCall(this, scratch);
|
|
|
| if (FLAG_log_timer_events) {
|
| FrameScope frame(this, StackFrame::MANUAL);
|
| PushSafepointRegisters();
|
| - PrepareCallCFunction(1, r0);
|
| - mov(r0, Operand(ExternalReference::isolate_address(isolate())));
|
| + PrepareCallCFunction(1, r3);
|
| + mov(r3, Operand(ExternalReference::isolate_address(isolate())));
|
| CallCFunction(ExternalReference::log_leave_external_function(isolate()), 1);
|
| PopSafepointRegisters();
|
| }
|
| @@ -2429,39 +2406,39 @@ void MacroAssembler::CallApiFunctionAndReturn(
|
| Label return_value_loaded;
|
|
|
| // load value from ReturnValue
|
| - ldr(r0, return_value_operand);
|
| + LoadP(r3, return_value_operand);
|
| bind(&return_value_loaded);
|
| // No more valid handles (the result handle was the last one). Restore
|
| // previous handle scope.
|
| - str(r4, MemOperand(r9, kNextOffset));
|
| + StoreP(r14, MemOperand(r17, kNextOffset));
|
| if (emit_debug_code()) {
|
| - ldr(r1, MemOperand(r9, kLevelOffset));
|
| - cmp(r1, r6);
|
| + lwz(r4, MemOperand(r17, kLevelOffset));
|
| + cmp(r4, r16);
|
| Check(eq, kUnexpectedLevelAfterReturnFromApiCall);
|
| }
|
| - sub(r6, r6, Operand(1));
|
| - str(r6, MemOperand(r9, kLevelOffset));
|
| - ldr(ip, MemOperand(r9, kLimitOffset));
|
| - cmp(r5, ip);
|
| - b(ne, &delete_allocated_handles);
|
| + subi(r16, r16, Operand(1));
|
| + stw(r16, MemOperand(r17, kLevelOffset));
|
| + LoadP(ip, MemOperand(r17, kLimitOffset));
|
| + cmp(r15, ip);
|
| + bne(&delete_allocated_handles);
|
|
|
| // Check if the function scheduled an exception.
|
| bind(&leave_exit_frame);
|
| - LoadRoot(r4, Heap::kTheHoleValueRootIndex);
|
| + LoadRoot(r14, Heap::kTheHoleValueRootIndex);
|
| mov(ip, Operand(ExternalReference::scheduled_exception_address(isolate())));
|
| - ldr(r5, MemOperand(ip));
|
| - cmp(r4, r5);
|
| - b(ne, &promote_scheduled_exception);
|
| + LoadP(r15, MemOperand(ip));
|
| + cmp(r14, r15);
|
| + bne(&promote_scheduled_exception);
|
| bind(&exception_handled);
|
|
|
| bool restore_context = context_restore_operand != NULL;
|
| if (restore_context) {
|
| - ldr(cp, *context_restore_operand);
|
| + LoadP(cp, *context_restore_operand);
|
| }
|
| // LeaveExitFrame expects unwind space to be in a register.
|
| - mov(r4, Operand(stack_space));
|
| - LeaveExitFrame(false, r4, !restore_context);
|
| - mov(pc, lr);
|
| + mov(r14, Operand(stack_space));
|
| + LeaveExitFrame(false, r14, !restore_context);
|
| + blr();
|
|
|
| bind(&promote_scheduled_exception);
|
| {
|
| @@ -2474,14 +2451,14 @@ void MacroAssembler::CallApiFunctionAndReturn(
|
|
|
| // HandleScope limit has changed. Delete allocated extensions.
|
| bind(&delete_allocated_handles);
|
| - str(r5, MemOperand(r9, kLimitOffset));
|
| - mov(r4, r0);
|
| - PrepareCallCFunction(1, r5);
|
| - mov(r0, Operand(ExternalReference::isolate_address(isolate())));
|
| + StoreP(r15, MemOperand(r17, kLimitOffset));
|
| + mr(r14, r3);
|
| + PrepareCallCFunction(1, r15);
|
| + mov(r3, Operand(ExternalReference::isolate_address(isolate())));
|
| CallCFunction(
|
| ExternalReference::delete_handle_scope_extensions(isolate()), 1);
|
| - mov(r0, r4);
|
| - jmp(&leave_exit_frame);
|
| + mr(r3, r14);
|
| + b(&leave_exit_frame);
|
| }
|
|
|
|
|
| @@ -2501,114 +2478,135 @@ void MacroAssembler::IndexFromHash(Register hash, Register index) {
|
| }
|
|
|
|
|
| -void MacroAssembler::SmiToDouble(LowDwVfpRegister value, Register smi) {
|
| - if (CpuFeatures::IsSupported(VFP3)) {
|
| - vmov(value.low(), smi);
|
| - vcvt_f64_s32(value, 1);
|
| - } else {
|
| - SmiUntag(ip, smi);
|
| - vmov(value.low(), ip);
|
| - vcvt_f64_s32(value, value.low());
|
| - }
|
| +void MacroAssembler::SmiToDouble(DoubleRegister value, Register smi) {
|
| + SmiUntag(ip, smi);
|
| + ConvertIntToDouble(ip, value);
|
| }
|
|
|
|
|
| -void MacroAssembler::TestDoubleIsInt32(DwVfpRegister double_input,
|
| - LowDwVfpRegister double_scratch) {
|
| - ASSERT(!double_input.is(double_scratch));
|
| - vcvt_s32_f64(double_scratch.low(), double_input);
|
| - vcvt_f64_s32(double_scratch, double_scratch.low());
|
| - VFPCompareAndSetFlags(double_input, double_scratch);
|
| +void MacroAssembler::TestDoubleIsInt32(DoubleRegister double_input,
|
| + Register scratch1,
|
| + Register scratch2,
|
| + DoubleRegister double_scratch) {
|
| + TryDoubleToInt32Exact(scratch1, double_input, scratch2, double_scratch);
|
| }
|
|
|
|
|
| void MacroAssembler::TryDoubleToInt32Exact(Register result,
|
| - DwVfpRegister double_input,
|
| - LowDwVfpRegister double_scratch) {
|
| + DoubleRegister double_input,
|
| + Register scratch,
|
| + DoubleRegister double_scratch) {
|
| + Label done;
|
| ASSERT(!double_input.is(double_scratch));
|
| - vcvt_s32_f64(double_scratch.low(), double_input);
|
| - vmov(result, double_scratch.low());
|
| - vcvt_f64_s32(double_scratch, double_scratch.low());
|
| - VFPCompareAndSetFlags(double_input, double_scratch);
|
| +
|
| + ConvertDoubleToInt64(double_input, result,
|
| +#if !V8_TARGET_ARCH_PPC64
|
| + scratch,
|
| +#endif
|
| + double_scratch);
|
| +
|
| +#if V8_TARGET_ARCH_PPC64
|
| + TestIfInt32(result, scratch, r0);
|
| +#else
|
| + TestIfInt32(scratch, result, r0);
|
| +#endif
|
| + bne(&done);
|
| +
|
| + // convert back and compare
|
| + fcfid(double_scratch, double_scratch);
|
| + fcmpu(double_scratch, double_input);
|
| + bind(&done);
|
| }
|
|
|
|
|
| void MacroAssembler::TryInt32Floor(Register result,
|
| - DwVfpRegister double_input,
|
| + DoubleRegister double_input,
|
| Register input_high,
|
| - LowDwVfpRegister double_scratch,
|
| + Register scratch,
|
| + DoubleRegister double_scratch,
|
| Label* done,
|
| Label* exact) {
|
| ASSERT(!result.is(input_high));
|
| ASSERT(!double_input.is(double_scratch));
|
| - Label negative, exception;
|
| -
|
| - VmovHigh(input_high, double_input);
|
| -
|
| - // Test for NaN and infinities.
|
| - Sbfx(result, input_high,
|
| - HeapNumber::kExponentShift, HeapNumber::kExponentBits);
|
| - cmp(result, Operand(-1));
|
| - b(eq, &exception);
|
| - // Test for values that can be exactly represented as a
|
| - // signed 32-bit integer.
|
| - TryDoubleToInt32Exact(result, double_input, double_scratch);
|
| - // If exact, return (result already fetched).
|
| - b(eq, exact);
|
| - cmp(input_high, Operand::Zero());
|
| - b(mi, &negative);
|
| -
|
| - // Input is in ]+0, +inf[.
|
| - // If result equals 0x7fffffff input was out of range or
|
| - // in ]0x7fffffff, 0x80000000[. We ignore this last case which
|
| - // could fits into an int32, that means we always think input was
|
| - // out of range and always go to exception.
|
| - // If result < 0x7fffffff, go to done, result fetched.
|
| - cmn(result, Operand(1));
|
| - b(mi, &exception);
|
| + Label exception;
|
| +
|
| + // Move high word into input_high
|
| + stfdu(double_input, MemOperand(sp, -kDoubleSize));
|
| + nop(); // LHS/RAW optimization
|
| + lwz(input_high, MemOperand(sp, Register::kExponentOffset));
|
| + addi(sp, sp, Operand(kDoubleSize));
|
| +
|
| + // Test for NaN/Inf
|
| + ExtractBitMask(result, input_high, HeapNumber::kExponentMask);
|
| + cmpli(result, Operand(0x7ff));
|
| + beq(&exception);
|
| +
|
| + // Convert (rounding to -Inf)
|
| + ConvertDoubleToInt64(double_input, result,
|
| +#if !V8_TARGET_ARCH_PPC64
|
| + scratch,
|
| +#endif
|
| + double_scratch,
|
| + kRoundToMinusInf);
|
| +
|
| + // Test for overflow
|
| +#if V8_TARGET_ARCH_PPC64
|
| + TestIfInt32(result, scratch, r0);
|
| +#else
|
| + TestIfInt32(scratch, result, r0);
|
| +#endif
|
| + bne(&exception);
|
| +
|
| + // Test for exactness
|
| + fcfid(double_scratch, double_scratch);
|
| + fcmpu(double_scratch, double_input);
|
| + beq(exact);
|
| b(done);
|
|
|
| - // Input is in ]-inf, -0[.
|
| - // If x is a non integer negative number,
|
| - // floor(x) <=> round_to_zero(x) - 1.
|
| - bind(&negative);
|
| - sub(result, result, Operand(1), SetCC);
|
| - // If result is still negative, go to done, result fetched.
|
| - // Else, we had an overflow and we fall through exception.
|
| - b(mi, done);
|
| bind(&exception);
|
| }
|
|
|
| +
|
| void MacroAssembler::TryInlineTruncateDoubleToI(Register result,
|
| - DwVfpRegister double_input,
|
| + DoubleRegister double_input,
|
| Label* done) {
|
| - LowDwVfpRegister double_scratch = kScratchDoubleReg;
|
| - vcvt_s32_f64(double_scratch.low(), double_input);
|
| - vmov(result, double_scratch.low());
|
| + DoubleRegister double_scratch = kScratchDoubleReg;
|
| + Register scratch = ip;
|
|
|
| - // If result is not saturated (0x7fffffff or 0x80000000), we are done.
|
| - sub(ip, result, Operand(1));
|
| - cmp(ip, Operand(0x7ffffffe));
|
| - b(lt, done);
|
| + ConvertDoubleToInt64(double_input, result,
|
| +#if !V8_TARGET_ARCH_PPC64
|
| + scratch,
|
| +#endif
|
| + double_scratch);
|
| +
|
| + // Test for overflow
|
| +#if V8_TARGET_ARCH_PPC64
|
| + TestIfInt32(result, scratch, r0);
|
| +#else
|
| + TestIfInt32(scratch, result, r0);
|
| +#endif
|
| + beq(done);
|
| }
|
|
|
|
|
| void MacroAssembler::TruncateDoubleToI(Register result,
|
| - DwVfpRegister double_input) {
|
| + DoubleRegister double_input) {
|
| Label done;
|
|
|
| TryInlineTruncateDoubleToI(result, double_input, &done);
|
|
|
| // If we fell through then inline version didn't succeed - call stub instead.
|
| - push(lr);
|
| - sub(sp, sp, Operand(kDoubleSize)); // Put input on stack.
|
| - vstr(double_input, MemOperand(sp, 0));
|
| + mflr(r0);
|
| + push(r0);
|
| + // Put input on stack.
|
| + stfdu(double_input, MemOperand(sp, -kDoubleSize));
|
|
|
| DoubleToIStub stub(isolate(), sp, result, 0, true, true);
|
| CallStub(&stub);
|
|
|
| - add(sp, sp, Operand(kDoubleSize));
|
| - pop(lr);
|
| + addi(sp, sp, Operand(kDoubleSize));
|
| + pop(r0);
|
| + mtlr(r0);
|
|
|
| bind(&done);
|
| }
|
| @@ -2617,15 +2615,15 @@ void MacroAssembler::TruncateDoubleToI(Register result,
|
| void MacroAssembler::TruncateHeapNumberToI(Register result,
|
| Register object) {
|
| Label done;
|
| - LowDwVfpRegister double_scratch = kScratchDoubleReg;
|
| + DoubleRegister double_scratch = kScratchDoubleReg;
|
| ASSERT(!result.is(object));
|
|
|
| - vldr(double_scratch,
|
| - MemOperand(object, HeapNumber::kValueOffset - kHeapObjectTag));
|
| + lfd(double_scratch, FieldMemOperand(object, HeapNumber::kValueOffset));
|
| TryInlineTruncateDoubleToI(result, double_scratch, &done);
|
|
|
| // If we fell through then inline version didn't succeed - call stub instead.
|
| - push(lr);
|
| + mflr(r0);
|
| + push(r0);
|
| DoubleToIStub stub(isolate(),
|
| object,
|
| result,
|
| @@ -2633,7 +2631,8 @@ void MacroAssembler::TruncateHeapNumberToI(Register result,
|
| true,
|
| true);
|
| CallStub(&stub);
|
| - pop(lr);
|
| + pop(r0);
|
| + mtlr(r0);
|
|
|
| bind(&done);
|
| }
|
| @@ -2658,26 +2657,27 @@ void MacroAssembler::TruncateNumberToI(Register object,
|
| void MacroAssembler::GetLeastBitsFromSmi(Register dst,
|
| Register src,
|
| int num_least_bits) {
|
| - if (CpuFeatures::IsSupported(ARMv7) && !predictable_code_size()) {
|
| - ubfx(dst, src, kSmiTagSize, num_least_bits);
|
| - } else {
|
| - SmiUntag(dst, src);
|
| - and_(dst, dst, Operand((1 << num_least_bits) - 1));
|
| - }
|
| +#if V8_TARGET_ARCH_PPC64
|
| + rldicl(dst, src, kBitsPerPointer - kSmiShift,
|
| + kBitsPerPointer - num_least_bits);
|
| +#else
|
| + rlwinm(dst, src, kBitsPerPointer - kSmiShift,
|
| + kBitsPerPointer - num_least_bits, 31);
|
| +#endif
|
| }
|
|
|
|
|
| void MacroAssembler::GetLeastBitsFromInt32(Register dst,
|
| Register src,
|
| int num_least_bits) {
|
| - and_(dst, src, Operand((1 << num_least_bits) - 1));
|
| + rlwinm(dst, src, 0, 32 - num_least_bits, 31);
|
| }
|
|
|
|
|
| void MacroAssembler::CallRuntime(const Runtime::Function* f,
|
| int num_arguments,
|
| SaveFPRegsMode save_doubles) {
|
| - // All parameters are on the stack. r0 has the return value after call.
|
| + // All parameters are on the stack. r3 has the return value after call.
|
|
|
| // If the expected number of arguments of the runtime function is
|
| // constant, we check that the actual number of arguments match the
|
| @@ -2688,17 +2688,23 @@ void MacroAssembler::CallRuntime(const Runtime::Function* f,
|
| // arguments passed in because it is constant. At some point we
|
| // should remove this need and make the runtime routine entry code
|
| // smarter.
|
| - mov(r0, Operand(num_arguments));
|
| - mov(r1, Operand(ExternalReference(f, isolate())));
|
| - CEntryStub stub(isolate(), 1, save_doubles);
|
| + mov(r3, Operand(num_arguments));
|
| + mov(r4, Operand(ExternalReference(f, isolate())));
|
| + CEntryStub stub(isolate(),
|
| +#if V8_TARGET_ARCH_PPC64
|
| + f->result_size,
|
| +#else
|
| + 1,
|
| +#endif
|
| + save_doubles);
|
| CallStub(&stub);
|
| }
|
|
|
|
|
| void MacroAssembler::CallExternalReference(const ExternalReference& ext,
|
| int num_arguments) {
|
| - mov(r0, Operand(num_arguments));
|
| - mov(r1, Operand(ext));
|
| + mov(r3, Operand(num_arguments));
|
| + mov(r4, Operand(ext));
|
|
|
| CEntryStub stub(isolate(), 1);
|
| CallStub(&stub);
|
| @@ -2712,7 +2718,7 @@ void MacroAssembler::TailCallExternalReference(const ExternalReference& ext,
|
| // arguments passed in because it is constant. At some point we
|
| // should remove this need and make the runtime routine entry code
|
| // smarter.
|
| - mov(r0, Operand(num_arguments));
|
| + mov(r3, Operand(num_arguments));
|
| JumpToExternalReference(ext);
|
| }
|
|
|
| @@ -2727,11 +2733,7 @@ void MacroAssembler::TailCallRuntime(Runtime::FunctionId fid,
|
|
|
|
|
| void MacroAssembler::JumpToExternalReference(const ExternalReference& builtin) {
|
| -#if defined(__thumb__)
|
| - // Thumb mode builtin.
|
| - ASSERT((reinterpret_cast<intptr_t>(builtin.address()) & 1) == 1);
|
| -#endif
|
| - mov(r1, Operand(builtin));
|
| + mov(r4, Operand(builtin));
|
| CEntryStub stub(isolate(), 1);
|
| Jump(stub.GetCode(), RelocInfo::CODE_TARGET);
|
| }
|
| @@ -2743,14 +2745,14 @@ void MacroAssembler::InvokeBuiltin(Builtins::JavaScript id,
|
| // You can't call a builtin without a valid frame.
|
| ASSERT(flag == JUMP_FUNCTION || has_frame());
|
|
|
| - GetBuiltinEntry(r2, id);
|
| + GetBuiltinEntry(r5, id);
|
| if (flag == CALL_FUNCTION) {
|
| - call_wrapper.BeforeCall(CallSize(r2));
|
| - Call(r2);
|
| + call_wrapper.BeforeCall(CallSize(r5));
|
| + Call(r5);
|
| call_wrapper.AfterCall();
|
| } else {
|
| ASSERT(flag == JUMP_FUNCTION);
|
| - Jump(r2);
|
| + Jump(r5);
|
| }
|
| }
|
|
|
| @@ -2758,20 +2760,21 @@ void MacroAssembler::InvokeBuiltin(Builtins::JavaScript id,
|
| void MacroAssembler::GetBuiltinFunction(Register target,
|
| Builtins::JavaScript id) {
|
| // Load the builtins object into target register.
|
| - ldr(target,
|
| - MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
|
| - ldr(target, FieldMemOperand(target, GlobalObject::kBuiltinsOffset));
|
| + LoadP(target,
|
| + MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
|
| + LoadP(target, FieldMemOperand(target, GlobalObject::kBuiltinsOffset));
|
| // Load the JavaScript builtin function from the builtins object.
|
| - ldr(target, FieldMemOperand(target,
|
| - JSBuiltinsObject::OffsetOfFunctionWithId(id)));
|
| + LoadP(target,
|
| + FieldMemOperand(target,
|
| + JSBuiltinsObject::OffsetOfFunctionWithId(id)), r0);
|
| }
|
|
|
|
|
| void MacroAssembler::GetBuiltinEntry(Register target, Builtins::JavaScript id) {
|
| - ASSERT(!target.is(r1));
|
| - GetBuiltinFunction(r1, id);
|
| + ASSERT(!target.is(r4));
|
| + GetBuiltinFunction(r4, id);
|
| // Load the code entry point from the builtins object.
|
| - ldr(target, FieldMemOperand(r1, JSFunction::kCodeEntryOffset));
|
| + LoadP(target, FieldMemOperand(r4, JSFunction::kCodeEntryOffset));
|
| }
|
|
|
|
|
| @@ -2780,7 +2783,7 @@ void MacroAssembler::SetCounter(StatsCounter* counter, int value,
|
| if (FLAG_native_code_counters && counter->Enabled()) {
|
| mov(scratch1, Operand(value));
|
| mov(scratch2, Operand(ExternalReference(counter)));
|
| - str(scratch1, MemOperand(scratch2));
|
| + stw(scratch1, MemOperand(scratch2));
|
| }
|
| }
|
|
|
| @@ -2790,9 +2793,9 @@ void MacroAssembler::IncrementCounter(StatsCounter* counter, int value,
|
| ASSERT(value > 0);
|
| if (FLAG_native_code_counters && counter->Enabled()) {
|
| mov(scratch2, Operand(ExternalReference(counter)));
|
| - ldr(scratch1, MemOperand(scratch2));
|
| - add(scratch1, scratch1, Operand(value));
|
| - str(scratch1, MemOperand(scratch2));
|
| + lwz(scratch1, MemOperand(scratch2));
|
| + addi(scratch1, scratch1, Operand(value));
|
| + stw(scratch1, MemOperand(scratch2));
|
| }
|
| }
|
|
|
| @@ -2802,16 +2805,17 @@ void MacroAssembler::DecrementCounter(StatsCounter* counter, int value,
|
| ASSERT(value > 0);
|
| if (FLAG_native_code_counters && counter->Enabled()) {
|
| mov(scratch2, Operand(ExternalReference(counter)));
|
| - ldr(scratch1, MemOperand(scratch2));
|
| - sub(scratch1, scratch1, Operand(value));
|
| - str(scratch1, MemOperand(scratch2));
|
| + lwz(scratch1, MemOperand(scratch2));
|
| + subi(scratch1, scratch1, Operand(value));
|
| + stw(scratch1, MemOperand(scratch2));
|
| }
|
| }
|
|
|
|
|
| -void MacroAssembler::Assert(Condition cond, BailoutReason reason) {
|
| +void MacroAssembler::Assert(Condition cond, BailoutReason reason,
|
| + CRegister cr) {
|
| if (emit_debug_code())
|
| - Check(cond, reason);
|
| + Check(cond, reason, cr);
|
| }
|
|
|
|
|
| @@ -2820,16 +2824,16 @@ void MacroAssembler::AssertFastElements(Register elements) {
|
| ASSERT(!elements.is(ip));
|
| Label ok;
|
| push(elements);
|
| - ldr(elements, FieldMemOperand(elements, HeapObject::kMapOffset));
|
| + LoadP(elements, FieldMemOperand(elements, HeapObject::kMapOffset));
|
| LoadRoot(ip, Heap::kFixedArrayMapRootIndex);
|
| cmp(elements, ip);
|
| - b(eq, &ok);
|
| + beq(&ok);
|
| LoadRoot(ip, Heap::kFixedDoubleArrayMapRootIndex);
|
| cmp(elements, ip);
|
| - b(eq, &ok);
|
| + beq(&ok);
|
| LoadRoot(ip, Heap::kFixedCOWArrayMapRootIndex);
|
| cmp(elements, ip);
|
| - b(eq, &ok);
|
| + beq(&ok);
|
| Abort(kJSObjectWithFastElementsMapHasSlowElements);
|
| bind(&ok);
|
| pop(elements);
|
| @@ -2837,9 +2841,9 @@ void MacroAssembler::AssertFastElements(Register elements) {
|
| }
|
|
|
|
|
| -void MacroAssembler::Check(Condition cond, BailoutReason reason) {
|
| +void MacroAssembler::Check(Condition cond, BailoutReason reason, CRegister cr) {
|
| Label L;
|
| - b(cond, &L);
|
| + b(cond, &L, cr);
|
| Abort(reason);
|
| // will not return here
|
| bind(&L);
|
| @@ -2862,9 +2866,8 @@ void MacroAssembler::Abort(BailoutReason reason) {
|
| }
|
| #endif
|
|
|
| - mov(r0, Operand(Smi::FromInt(reason)));
|
| + LoadSmiLiteral(r0, Smi::FromInt(reason));
|
| push(r0);
|
| -
|
| // Disable stub call restrictions to always allow calls to abort.
|
| if (!has_frame_) {
|
| // We don't actually want to generate a pile of code for this, so just
|
| @@ -2875,32 +2878,21 @@ void MacroAssembler::Abort(BailoutReason reason) {
|
| CallRuntime(Runtime::kAbort, 1);
|
| }
|
| // will not return here
|
| - if (is_const_pool_blocked()) {
|
| - // If the calling code cares about the exact number of
|
| - // instructions generated, we insert padding here to keep the size
|
| - // of the Abort macro constant.
|
| - static const int kExpectedAbortInstructions = 7;
|
| - int abort_instructions = InstructionsGeneratedSince(&abort_start);
|
| - ASSERT(abort_instructions <= kExpectedAbortInstructions);
|
| - while (abort_instructions++ < kExpectedAbortInstructions) {
|
| - nop();
|
| - }
|
| - }
|
| }
|
|
|
|
|
| void MacroAssembler::LoadContext(Register dst, int context_chain_length) {
|
| if (context_chain_length > 0) {
|
| // Move up the chain of contexts to the context containing the slot.
|
| - ldr(dst, MemOperand(cp, Context::SlotOffset(Context::PREVIOUS_INDEX)));
|
| + LoadP(dst, MemOperand(cp, Context::SlotOffset(Context::PREVIOUS_INDEX)));
|
| for (int i = 1; i < context_chain_length; i++) {
|
| - ldr(dst, MemOperand(dst, Context::SlotOffset(Context::PREVIOUS_INDEX)));
|
| + LoadP(dst, MemOperand(dst, Context::SlotOffset(Context::PREVIOUS_INDEX)));
|
| }
|
| } else {
|
| // Slot is in the current function context. Move it into the
|
| // destination register in case we store into it (the write barrier
|
| // cannot be allowed to destroy the context in esi).
|
| - mov(dst, cp);
|
| + mr(dst, cp);
|
| }
|
| }
|
|
|
| @@ -2912,36 +2904,36 @@ void MacroAssembler::LoadTransitionedArrayMapConditional(
|
| Register scratch,
|
| Label* no_map_match) {
|
| // Load the global or builtins object from the current context.
|
| - ldr(scratch,
|
| + LoadP(scratch,
|
| MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
|
| - ldr(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
|
| + LoadP(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
|
|
|
| // Check that the function's map is the same as the expected cached map.
|
| - ldr(scratch,
|
| + LoadP(scratch,
|
| MemOperand(scratch,
|
| Context::SlotOffset(Context::JS_ARRAY_MAPS_INDEX)));
|
| size_t offset = expected_kind * kPointerSize +
|
| FixedArrayBase::kHeaderSize;
|
| - ldr(ip, FieldMemOperand(scratch, offset));
|
| + LoadP(ip, FieldMemOperand(scratch, offset));
|
| cmp(map_in_out, ip);
|
| - b(ne, no_map_match);
|
| + bne(no_map_match);
|
|
|
| // Use the transitioned cached map.
|
| offset = transitioned_kind * kPointerSize +
|
| FixedArrayBase::kHeaderSize;
|
| - ldr(map_in_out, FieldMemOperand(scratch, offset));
|
| + LoadP(map_in_out, FieldMemOperand(scratch, offset));
|
| }
|
|
|
|
|
| void MacroAssembler::LoadGlobalFunction(int index, Register function) {
|
| // Load the global or builtins object from the current context.
|
| - ldr(function,
|
| - MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
|
| + LoadP(function,
|
| + MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
|
| // Load the native context from the global or builtins object.
|
| - ldr(function, FieldMemOperand(function,
|
| - GlobalObject::kNativeContextOffset));
|
| + LoadP(function, FieldMemOperand(function,
|
| + GlobalObject::kNativeContextOffset));
|
| // Load the function from the native context.
|
| - ldr(function, MemOperand(function, Context::SlotOffset(index)));
|
| + LoadP(function, MemOperand(function, Context::SlotOffset(index)), r0);
|
| }
|
|
|
|
|
| @@ -2949,7 +2941,8 @@ void MacroAssembler::LoadGlobalFunctionInitialMap(Register function,
|
| Register map,
|
| Register scratch) {
|
| // Load the initial map. The global functions all have initial maps.
|
| - ldr(map, FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
|
| + LoadP(map,
|
| + FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
|
| if (emit_debug_code()) {
|
| Label ok, fail;
|
| CheckMap(map, scratch, Heap::kMetaMapRootIndex, &fail, DO_SMI_CHECK);
|
| @@ -2965,10 +2958,11 @@ void MacroAssembler::JumpIfNotPowerOfTwoOrZero(
|
| Register reg,
|
| Register scratch,
|
| Label* not_power_of_two_or_zero) {
|
| - sub(scratch, reg, Operand(1), SetCC);
|
| - b(mi, not_power_of_two_or_zero);
|
| - tst(scratch, reg);
|
| - b(ne, not_power_of_two_or_zero);
|
| + subi(scratch, reg, Operand(1));
|
| + cmpi(scratch, Operand::Zero());
|
| + blt(not_power_of_two_or_zero);
|
| + and_(r0, scratch, reg, SetRC);
|
| + bne(not_power_of_two_or_zero, cr0);
|
| }
|
|
|
|
|
| @@ -2977,36 +2971,65 @@ void MacroAssembler::JumpIfNotPowerOfTwoOrZeroAndNeg(
|
| Register scratch,
|
| Label* zero_and_neg,
|
| Label* not_power_of_two) {
|
| - sub(scratch, reg, Operand(1), SetCC);
|
| - b(mi, zero_and_neg);
|
| - tst(scratch, reg);
|
| - b(ne, not_power_of_two);
|
| + subi(scratch, reg, Operand(1));
|
| + cmpi(scratch, Operand::Zero());
|
| + blt(zero_and_neg);
|
| + and_(r0, scratch, reg, SetRC);
|
| + bne(not_power_of_two, cr0);
|
| +}
|
| +
|
| +#if !V8_TARGET_ARCH_PPC64
|
| +void MacroAssembler::SmiTagCheckOverflow(Register reg, Register overflow) {
|
| + ASSERT(!reg.is(overflow));
|
| + mr(overflow, reg); // Save original value.
|
| + SmiTag(reg);
|
| + xor_(overflow, overflow, reg, SetRC); // Overflow if (value ^ 2 * value) < 0.
|
| }
|
|
|
|
|
| +void MacroAssembler::SmiTagCheckOverflow(Register dst,
|
| + Register src,
|
| + Register overflow) {
|
| + if (dst.is(src)) {
|
| + // Fall back to slower case.
|
| + SmiTagCheckOverflow(dst, overflow);
|
| + } else {
|
| + ASSERT(!dst.is(src));
|
| + ASSERT(!dst.is(overflow));
|
| + ASSERT(!src.is(overflow));
|
| + SmiTag(dst, src);
|
| + xor_(overflow, dst, src, SetRC); // Overflow if (value ^ 2 * value) < 0.
|
| + }
|
| +}
|
| +#endif
|
| +
|
| void MacroAssembler::JumpIfNotBothSmi(Register reg1,
|
| Register reg2,
|
| Label* on_not_both_smi) {
|
| STATIC_ASSERT(kSmiTag == 0);
|
| - tst(reg1, Operand(kSmiTagMask));
|
| - tst(reg2, Operand(kSmiTagMask), eq);
|
| - b(ne, on_not_both_smi);
|
| + ASSERT_EQ(1, static_cast<int>(kSmiTagMask));
|
| + orx(r0, reg1, reg2, LeaveRC);
|
| + JumpIfNotSmi(r0, on_not_both_smi);
|
| }
|
|
|
|
|
| void MacroAssembler::UntagAndJumpIfSmi(
|
| Register dst, Register src, Label* smi_case) {
|
| STATIC_ASSERT(kSmiTag == 0);
|
| - SmiUntag(dst, src, SetCC);
|
| - b(cc, smi_case); // Shifter carry is not set for a smi.
|
| + STATIC_ASSERT(kSmiTagSize == 1);
|
| + TestBit(src, 0, r0);
|
| + SmiUntag(dst, src);
|
| + beq(smi_case, cr0);
|
| }
|
|
|
|
|
| void MacroAssembler::UntagAndJumpIfNotSmi(
|
| Register dst, Register src, Label* non_smi_case) {
|
| STATIC_ASSERT(kSmiTag == 0);
|
| - SmiUntag(dst, src, SetCC);
|
| - b(cs, non_smi_case); // Shifter carry is set for a non-smi.
|
| + STATIC_ASSERT(kSmiTagSize == 1);
|
| + TestBit(src, 0, r0);
|
| + SmiUntag(dst, src);
|
| + bne(non_smi_case, cr0);
|
| }
|
|
|
|
|
| @@ -3014,17 +3037,16 @@ void MacroAssembler::JumpIfEitherSmi(Register reg1,
|
| Register reg2,
|
| Label* on_either_smi) {
|
| STATIC_ASSERT(kSmiTag == 0);
|
| - tst(reg1, Operand(kSmiTagMask));
|
| - tst(reg2, Operand(kSmiTagMask), ne);
|
| - b(eq, on_either_smi);
|
| + JumpIfSmi(reg1, on_either_smi);
|
| + JumpIfSmi(reg2, on_either_smi);
|
| }
|
|
|
|
|
| void MacroAssembler::AssertNotSmi(Register object) {
|
| if (emit_debug_code()) {
|
| STATIC_ASSERT(kSmiTag == 0);
|
| - tst(object, Operand(kSmiTagMask));
|
| - Check(ne, kOperandIsASmi);
|
| + TestIfSmi(object, r0);
|
| + Check(ne, kOperandIsASmi, cr0);
|
| }
|
| }
|
|
|
| @@ -3032,8 +3054,8 @@ void MacroAssembler::AssertNotSmi(Register object) {
|
| void MacroAssembler::AssertSmi(Register object) {
|
| if (emit_debug_code()) {
|
| STATIC_ASSERT(kSmiTag == 0);
|
| - tst(object, Operand(kSmiTagMask));
|
| - Check(eq, kOperandIsNotSmi);
|
| + TestIfSmi(object, r0);
|
| + Check(eq, kOperandIsNotSmi, cr0);
|
| }
|
| }
|
|
|
| @@ -3041,13 +3063,13 @@ void MacroAssembler::AssertSmi(Register object) {
|
| void MacroAssembler::AssertString(Register object) {
|
| if (emit_debug_code()) {
|
| STATIC_ASSERT(kSmiTag == 0);
|
| - tst(object, Operand(kSmiTagMask));
|
| - Check(ne, kOperandIsASmiAndNotAString);
|
| + TestIfSmi(object, r0);
|
| + Check(ne, kOperandIsASmiAndNotAString, cr0);
|
| push(object);
|
| - ldr(object, FieldMemOperand(object, HeapObject::kMapOffset));
|
| + LoadP(object, FieldMemOperand(object, HeapObject::kMapOffset));
|
| CompareInstanceType(object, object, FIRST_NONSTRING_TYPE);
|
| pop(object);
|
| - Check(lo, kOperandIsNotAString);
|
| + Check(lt, kOperandIsNotAString);
|
| }
|
| }
|
|
|
| @@ -3055,10 +3077,10 @@ void MacroAssembler::AssertString(Register object) {
|
| void MacroAssembler::AssertName(Register object) {
|
| if (emit_debug_code()) {
|
| STATIC_ASSERT(kSmiTag == 0);
|
| - tst(object, Operand(kSmiTagMask));
|
| - Check(ne, kOperandIsASmiAndNotAName);
|
| + TestIfSmi(object, r0);
|
| + Check(ne, kOperandIsASmiAndNotAName, cr0);
|
| push(object);
|
| - ldr(object, FieldMemOperand(object, HeapObject::kMapOffset));
|
| + LoadP(object, FieldMemOperand(object, HeapObject::kMapOffset));
|
| CompareInstanceType(object, object, LAST_NAME_TYPE);
|
| pop(object);
|
| Check(le, kOperandIsNotAName);
|
| @@ -3072,8 +3094,8 @@ void MacroAssembler::AssertUndefinedOrAllocationSite(Register object,
|
| Label done_checking;
|
| AssertNotSmi(object);
|
| CompareRoot(object, Heap::kUndefinedValueRootIndex);
|
| - b(eq, &done_checking);
|
| - ldr(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
|
| + beq(&done_checking);
|
| + LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
|
| CompareRoot(scratch, Heap::kAllocationSiteMapRootIndex);
|
| Assert(eq, kExpectedUndefinedOrCell);
|
| bind(&done_checking);
|
| @@ -3093,10 +3115,10 @@ void MacroAssembler::JumpIfNotHeapNumber(Register object,
|
| Register heap_number_map,
|
| Register scratch,
|
| Label* on_not_heap_number) {
|
| - ldr(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
|
| + LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
|
| AssertIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
|
| cmp(scratch, heap_number_map);
|
| - b(ne, on_not_heap_number);
|
| + bne(on_not_heap_number);
|
| }
|
|
|
|
|
| @@ -3115,10 +3137,11 @@ void MacroAssembler::LookupNumberStringCache(Register object,
|
|
|
| // Make the hash mask from the length of the number string cache. It
|
| // contains two elements (number and string) for each cache entry.
|
| - ldr(mask, FieldMemOperand(number_string_cache, FixedArray::kLengthOffset));
|
| + LoadP(mask, FieldMemOperand(number_string_cache,
|
| + FixedArray::kLengthOffset));
|
| // Divide length by two (length is a smi).
|
| - mov(mask, Operand(mask, ASR, kSmiTagSize + 1));
|
| - sub(mask, mask, Operand(1)); // Make mask.
|
| + ShiftRightArithImm(mask, mask, kSmiTagSize + kSmiShiftSize + 1);
|
| + subi(mask, mask, Operand(1)); // Make mask.
|
|
|
| // Calculate the entry in the number string cache. The hash value in the
|
| // number string cache for smis is just the smi value, and the hash for
|
| @@ -3134,47 +3157,43 @@ void MacroAssembler::LookupNumberStringCache(Register object,
|
| DONT_DO_SMI_CHECK);
|
|
|
| STATIC_ASSERT(8 == kDoubleSize);
|
| - add(scratch1,
|
| - object,
|
| - Operand(HeapNumber::kValueOffset - kHeapObjectTag));
|
| - ldm(ia, scratch1, scratch1.bit() | scratch2.bit());
|
| - eor(scratch1, scratch1, Operand(scratch2));
|
| - and_(scratch1, scratch1, Operand(mask));
|
| + lwz(scratch1, FieldMemOperand(object, HeapNumber::kExponentOffset));
|
| + lwz(scratch2, FieldMemOperand(object, HeapNumber::kMantissaOffset));
|
| + xor_(scratch1, scratch1, scratch2);
|
| + and_(scratch1, scratch1, mask);
|
|
|
| // Calculate address of entry in string cache: each entry consists
|
| // of two pointer sized fields.
|
| - add(scratch1,
|
| - number_string_cache,
|
| - Operand(scratch1, LSL, kPointerSizeLog2 + 1));
|
| + ShiftLeftImm(scratch1, scratch1, Operand(kPointerSizeLog2 + 1));
|
| + add(scratch1, number_string_cache, scratch1);
|
|
|
| Register probe = mask;
|
| - ldr(probe, FieldMemOperand(scratch1, FixedArray::kHeaderSize));
|
| + LoadP(probe, FieldMemOperand(scratch1, FixedArray::kHeaderSize));
|
| JumpIfSmi(probe, not_found);
|
| - sub(scratch2, object, Operand(kHeapObjectTag));
|
| - vldr(d0, scratch2, HeapNumber::kValueOffset);
|
| - sub(probe, probe, Operand(kHeapObjectTag));
|
| - vldr(d1, probe, HeapNumber::kValueOffset);
|
| - VFPCompareAndSetFlags(d0, d1);
|
| - b(ne, not_found); // The cache did not contain this value.
|
| + lfd(d0, FieldMemOperand(object, HeapNumber::kValueOffset));
|
| + lfd(d1, FieldMemOperand(probe, HeapNumber::kValueOffset));
|
| + fcmpu(d0, d1);
|
| + bne(not_found); // The cache did not contain this value.
|
| b(&load_result_from_cache);
|
|
|
| bind(&is_smi);
|
| Register scratch = scratch1;
|
| - and_(scratch, mask, Operand(object, ASR, 1));
|
| + SmiUntag(scratch, object);
|
| + and_(scratch, mask, scratch);
|
| // Calculate address of entry in string cache: each entry consists
|
| // of two pointer sized fields.
|
| - add(scratch,
|
| - number_string_cache,
|
| - Operand(scratch, LSL, kPointerSizeLog2 + 1));
|
| + ShiftLeftImm(scratch, scratch, Operand(kPointerSizeLog2 + 1));
|
| + add(scratch, number_string_cache, scratch);
|
|
|
| // Check if the entry is the smi we are looking for.
|
| - ldr(probe, FieldMemOperand(scratch, FixedArray::kHeaderSize));
|
| + LoadP(probe, FieldMemOperand(scratch, FixedArray::kHeaderSize));
|
| cmp(object, probe);
|
| - b(ne, not_found);
|
| + bne(not_found);
|
|
|
| // Get the result from the cache.
|
| bind(&load_result_from_cache);
|
| - ldr(result, FieldMemOperand(scratch, FixedArray::kHeaderSize + kPointerSize));
|
| + LoadP(result,
|
| + FieldMemOperand(scratch, FixedArray::kHeaderSize + kPointerSize));
|
| IncrementCounter(isolate()->counters()->number_to_string_native(),
|
| 1,
|
| scratch1,
|
| @@ -3190,10 +3209,10 @@ void MacroAssembler::JumpIfNonSmisNotBothSequentialAsciiStrings(
|
| Label* failure) {
|
| // Test that both first and second are sequential ASCII strings.
|
| // Assume that they are non-smis.
|
| - ldr(scratch1, FieldMemOperand(first, HeapObject::kMapOffset));
|
| - ldr(scratch2, FieldMemOperand(second, HeapObject::kMapOffset));
|
| - ldrb(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
|
| - ldrb(scratch2, FieldMemOperand(scratch2, Map::kInstanceTypeOffset));
|
| + LoadP(scratch1, FieldMemOperand(first, HeapObject::kMapOffset));
|
| + LoadP(scratch2, FieldMemOperand(second, HeapObject::kMapOffset));
|
| + lbz(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
|
| + lbz(scratch2, FieldMemOperand(scratch2, Map::kInstanceTypeOffset));
|
|
|
| JumpIfBothInstanceTypesAreNotSequentialAscii(scratch1,
|
| scratch2,
|
| @@ -3208,7 +3227,7 @@ void MacroAssembler::JumpIfNotBothSequentialAsciiStrings(Register first,
|
| Register scratch2,
|
| Label* failure) {
|
| // Check that neither is a smi.
|
| - and_(scratch1, first, Operand(second));
|
| + and_(scratch1, first, second);
|
| JumpIfSmi(scratch1, failure);
|
| JumpIfNonSmisNotBothSequentialAsciiStrings(first,
|
| second,
|
| @@ -3222,10 +3241,10 @@ void MacroAssembler::JumpIfNotUniqueName(Register reg,
|
| Label* not_unique_name) {
|
| STATIC_ASSERT(kInternalizedTag == 0 && kStringTag == 0);
|
| Label succeed;
|
| - tst(reg, Operand(kIsNotStringMask | kIsNotInternalizedMask));
|
| - b(eq, &succeed);
|
| - cmp(reg, Operand(SYMBOL_TYPE));
|
| - b(ne, not_unique_name);
|
| + andi(r0, reg, Operand(kIsNotStringMask | kIsNotInternalizedMask));
|
| + beq(&succeed, cr0);
|
| + cmpi(reg, Operand(SYMBOL_TYPE));
|
| + bne(not_unique_name);
|
|
|
| bind(&succeed);
|
| }
|
| @@ -3252,45 +3271,49 @@ void MacroAssembler::AllocateHeapNumber(Register result,
|
|
|
| // Store heap number map in the allocated object.
|
| if (tagging_mode == TAG_RESULT) {
|
| - str(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
|
| + StoreP(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset),
|
| + r0);
|
| } else {
|
| - str(heap_number_map, MemOperand(result, HeapObject::kMapOffset));
|
| + StoreP(heap_number_map, MemOperand(result, HeapObject::kMapOffset));
|
| }
|
| }
|
|
|
|
|
| void MacroAssembler::AllocateHeapNumberWithValue(Register result,
|
| - DwVfpRegister value,
|
| + DoubleRegister value,
|
| Register scratch1,
|
| Register scratch2,
|
| Register heap_number_map,
|
| Label* gc_required) {
|
| AllocateHeapNumber(result, scratch1, scratch2, heap_number_map, gc_required);
|
| - sub(scratch1, result, Operand(kHeapObjectTag));
|
| - vstr(value, scratch1, HeapNumber::kValueOffset);
|
| + stfd(value, FieldMemOperand(result, HeapNumber::kValueOffset));
|
| }
|
|
|
|
|
| // Copies a fixed number of fields of heap objects from src to dst.
|
| void MacroAssembler::CopyFields(Register dst,
|
| Register src,
|
| - LowDwVfpRegister double_scratch,
|
| + RegList temps,
|
| int field_count) {
|
| - int double_count = field_count / (DwVfpRegister::kSizeInBytes / kPointerSize);
|
| - for (int i = 0; i < double_count; i++) {
|
| - vldr(double_scratch, FieldMemOperand(src, i * DwVfpRegister::kSizeInBytes));
|
| - vstr(double_scratch, FieldMemOperand(dst, i * DwVfpRegister::kSizeInBytes));
|
| + // At least one bit set in the first 15 registers.
|
| + ASSERT((temps & ((1 << 15) - 1)) != 0);
|
| + ASSERT((temps & dst.bit()) == 0);
|
| + ASSERT((temps & src.bit()) == 0);
|
| + // Primitive implementation using only one temporary register.
|
| +
|
| + Register tmp = no_reg;
|
| + // Find a temp register in temps list.
|
| + for (int i = 0; i < 15; i++) {
|
| + if ((temps & (1 << i)) != 0) {
|
| + tmp.set_code(i);
|
| + break;
|
| + }
|
| }
|
| + ASSERT(!tmp.is(no_reg));
|
|
|
| - STATIC_ASSERT(SwVfpRegister::kSizeInBytes == kPointerSize);
|
| - STATIC_ASSERT(2 * SwVfpRegister::kSizeInBytes == DwVfpRegister::kSizeInBytes);
|
| -
|
| - int remain = field_count % (DwVfpRegister::kSizeInBytes / kPointerSize);
|
| - if (remain != 0) {
|
| - vldr(double_scratch.low(),
|
| - FieldMemOperand(src, (field_count - 1) * kPointerSize));
|
| - vstr(double_scratch.low(),
|
| - FieldMemOperand(dst, (field_count - 1) * kPointerSize));
|
| + for (int i = 0; i < field_count; i++) {
|
| + LoadP(tmp, FieldMemOperand(src, i * kPointerSize), r0);
|
| + StoreP(tmp, FieldMemOperand(dst, i * kPointerSize), r0);
|
| }
|
| }
|
|
|
| @@ -3299,88 +3322,153 @@ void MacroAssembler::CopyBytes(Register src,
|
| Register dst,
|
| Register length,
|
| Register scratch) {
|
| - Label align_loop_1, word_loop, byte_loop, byte_loop_1, done;
|
| + Label align_loop, aligned, word_loop, byte_loop, byte_loop_1, done;
|
| +
|
| + ASSERT(!scratch.is(r0));
|
| +
|
| + cmpi(length, Operand::Zero());
|
| + beq(&done);
|
| +
|
| + // Check src alignment and length to see whether word_loop is possible
|
| + andi(scratch, src, Operand(kPointerSize - 1));
|
| + beq(&aligned, cr0);
|
| + subfic(scratch, scratch, Operand(kPointerSize * 2));
|
| + cmp(length, scratch);
|
| + blt(&byte_loop);
|
|
|
| // Align src before copying in word size chunks.
|
| - cmp(length, Operand(kPointerSize));
|
| - b(le, &byte_loop);
|
| -
|
| - bind(&align_loop_1);
|
| - tst(src, Operand(kPointerSize - 1));
|
| - b(eq, &word_loop);
|
| - ldrb(scratch, MemOperand(src, 1, PostIndex));
|
| - strb(scratch, MemOperand(dst, 1, PostIndex));
|
| - sub(length, length, Operand(1), SetCC);
|
| - b(&align_loop_1);
|
| + subi(scratch, scratch, Operand(kPointerSize));
|
| + mtctr(scratch);
|
| + bind(&align_loop);
|
| + lbz(scratch, MemOperand(src));
|
| + addi(src, src, Operand(1));
|
| + subi(length, length, Operand(1));
|
| + stb(scratch, MemOperand(dst));
|
| + addi(dst, dst, Operand(1));
|
| + bdnz(&align_loop);
|
| +
|
| + bind(&aligned);
|
| +
|
| // Copy bytes in word size chunks.
|
| - bind(&word_loop);
|
| if (emit_debug_code()) {
|
| - tst(src, Operand(kPointerSize - 1));
|
| - Assert(eq, kExpectingAlignmentForCopyBytes);
|
| + andi(r0, src, Operand(kPointerSize - 1));
|
| + Assert(eq, kExpectingAlignmentForCopyBytes, cr0);
|
| }
|
| - cmp(length, Operand(kPointerSize));
|
| - b(lt, &byte_loop);
|
| - ldr(scratch, MemOperand(src, kPointerSize, PostIndex));
|
| +
|
| + ShiftRightImm(scratch, length, Operand(kPointerSizeLog2));
|
| + cmpi(scratch, Operand::Zero());
|
| + beq(&byte_loop);
|
| +
|
| + mtctr(scratch);
|
| + bind(&word_loop);
|
| + LoadP(scratch, MemOperand(src));
|
| + addi(src, src, Operand(kPointerSize));
|
| + subi(length, length, Operand(kPointerSize));
|
| if (CpuFeatures::IsSupported(UNALIGNED_ACCESSES)) {
|
| - str(scratch, MemOperand(dst, kPointerSize, PostIndex));
|
| + // currently false for PPC - but possible future opt
|
| + StoreP(scratch, MemOperand(dst));
|
| + addi(dst, dst, Operand(kPointerSize));
|
| } else {
|
| - strb(scratch, MemOperand(dst, 1, PostIndex));
|
| - mov(scratch, Operand(scratch, LSR, 8));
|
| - strb(scratch, MemOperand(dst, 1, PostIndex));
|
| - mov(scratch, Operand(scratch, LSR, 8));
|
| - strb(scratch, MemOperand(dst, 1, PostIndex));
|
| - mov(scratch, Operand(scratch, LSR, 8));
|
| - strb(scratch, MemOperand(dst, 1, PostIndex));
|
| +#if V8_TARGET_LITTLE_ENDIAN
|
| + stb(scratch, MemOperand(dst, 0));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 1));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 2));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 3));
|
| +#if V8_TARGET_ARCH_PPC64
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 4));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 5));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 6));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 7));
|
| +#endif
|
| +#else
|
| +#if V8_TARGET_ARCH_PPC64
|
| + stb(scratch, MemOperand(dst, 7));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 6));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 5));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 4));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| +#endif
|
| + stb(scratch, MemOperand(dst, 3));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 2));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 1));
|
| + ShiftRightImm(scratch, scratch, Operand(8));
|
| + stb(scratch, MemOperand(dst, 0));
|
| +#endif
|
| + addi(dst, dst, Operand(kPointerSize));
|
| }
|
| - sub(length, length, Operand(kPointerSize));
|
| - b(&word_loop);
|
| + bdnz(&word_loop);
|
|
|
| // Copy the last bytes if any left.
|
| + cmpi(length, Operand::Zero());
|
| + beq(&done);
|
| +
|
| bind(&byte_loop);
|
| - cmp(length, Operand::Zero());
|
| - b(eq, &done);
|
| + mtctr(length);
|
| bind(&byte_loop_1);
|
| - ldrb(scratch, MemOperand(src, 1, PostIndex));
|
| - strb(scratch, MemOperand(dst, 1, PostIndex));
|
| - sub(length, length, Operand(1), SetCC);
|
| - b(ne, &byte_loop_1);
|
| + lbz(scratch, MemOperand(src));
|
| + addi(src, src, Operand(1));
|
| + stb(scratch, MemOperand(dst));
|
| + addi(dst, dst, Operand(1));
|
| + bdnz(&byte_loop_1);
|
| +
|
| bind(&done);
|
| }
|
|
|
|
|
| -void MacroAssembler::InitializeFieldsWithFiller(Register start_offset,
|
| - Register end_offset,
|
| - Register filler) {
|
| - Label loop, entry;
|
| - b(&entry);
|
| +void MacroAssembler::InitializeNFieldsWithFiller(Register start_offset,
|
| + Register count,
|
| + Register filler) {
|
| + Label loop;
|
| + mtctr(count);
|
| bind(&loop);
|
| - str(filler, MemOperand(start_offset, kPointerSize, PostIndex));
|
| - bind(&entry);
|
| - cmp(start_offset, end_offset);
|
| - b(lt, &loop);
|
| + StoreP(filler, MemOperand(start_offset));
|
| + addi(start_offset, start_offset, Operand(kPointerSize));
|
| + bdnz(&loop);
|
| }
|
|
|
| -
|
| -void MacroAssembler::CheckFor32DRegs(Register scratch) {
|
| - mov(scratch, Operand(ExternalReference::cpu_features()));
|
| - ldr(scratch, MemOperand(scratch));
|
| - tst(scratch, Operand(1u << VFP32DREGS));
|
| +void MacroAssembler::InitializeFieldsWithFiller(Register start_offset,
|
| + Register end_offset,
|
| + Register filler) {
|
| + Label done;
|
| + sub(r0, end_offset, start_offset, LeaveOE, SetRC);
|
| + beq(&done, cr0);
|
| + ShiftRightImm(r0, r0, Operand(kPointerSizeLog2));
|
| + InitializeNFieldsWithFiller(start_offset, r0, filler);
|
| + bind(&done);
|
| }
|
|
|
|
|
| -void MacroAssembler::SaveFPRegs(Register location, Register scratch) {
|
| - CheckFor32DRegs(scratch);
|
| - vstm(db_w, location, d16, d31, ne);
|
| - sub(location, location, Operand(16 * kDoubleSize), LeaveCC, eq);
|
| - vstm(db_w, location, d0, d15);
|
| +void MacroAssembler::SaveFPRegs(Register location, int first, int count) {
|
| + ASSERT(count > 0);
|
| + int cur = first;
|
| + subi(location, location, Operand(count * kDoubleSize));
|
| + for (int i = 0; i < count; i++) {
|
| + DoubleRegister reg = DoubleRegister::from_code(cur++);
|
| + stfd(reg, MemOperand(location, i * kDoubleSize));
|
| + }
|
| }
|
|
|
|
|
| -void MacroAssembler::RestoreFPRegs(Register location, Register scratch) {
|
| - CheckFor32DRegs(scratch);
|
| - vldm(ia_w, location, d0, d15);
|
| - vldm(ia_w, location, d16, d31, ne);
|
| - add(location, location, Operand(16 * kDoubleSize), LeaveCC, eq);
|
| +void MacroAssembler::RestoreFPRegs(Register location, int first, int count) {
|
| + ASSERT(count > 0);
|
| + int cur = first + count - 1;
|
| + for (int i = count - 1; i >= 0; i--) {
|
| + DoubleRegister reg = DoubleRegister::from_code(cur--);
|
| + lfd(reg, MemOperand(location, i * kDoubleSize));
|
| + }
|
| + addi(location, location, Operand(count * kDoubleSize));
|
| }
|
|
|
|
|
| @@ -3394,12 +3482,12 @@ void MacroAssembler::JumpIfBothInstanceTypesAreNotSequentialAscii(
|
| kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
|
| const int kFlatAsciiStringTag =
|
| kStringTag | kOneByteStringTag | kSeqStringTag;
|
| - and_(scratch1, first, Operand(kFlatAsciiStringMask));
|
| - and_(scratch2, second, Operand(kFlatAsciiStringMask));
|
| - cmp(scratch1, Operand(kFlatAsciiStringTag));
|
| - // Ignore second test if first test failed.
|
| - cmp(scratch2, Operand(kFlatAsciiStringTag), eq);
|
| - b(ne, failure);
|
| + andi(scratch1, first, Operand(kFlatAsciiStringMask));
|
| + andi(scratch2, second, Operand(kFlatAsciiStringMask));
|
| + cmpi(scratch1, Operand(kFlatAsciiStringTag));
|
| + bne(failure);
|
| + cmpi(scratch2, Operand(kFlatAsciiStringTag));
|
| + bne(failure);
|
| }
|
|
|
|
|
| @@ -3410,30 +3498,22 @@ void MacroAssembler::JumpIfInstanceTypeIsNotSequentialAscii(Register type,
|
| kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
|
| const int kFlatAsciiStringTag =
|
| kStringTag | kOneByteStringTag | kSeqStringTag;
|
| - and_(scratch, type, Operand(kFlatAsciiStringMask));
|
| - cmp(scratch, Operand(kFlatAsciiStringTag));
|
| - b(ne, failure);
|
| + andi(scratch, type, Operand(kFlatAsciiStringMask));
|
| + cmpi(scratch, Operand(kFlatAsciiStringTag));
|
| + bne(failure);
|
| }
|
|
|
| -static const int kRegisterPassedArguments = 4;
|
| +static const int kRegisterPassedArguments = 8;
|
|
|
|
|
| int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments,
|
| int num_double_arguments) {
|
| int stack_passed_words = 0;
|
| - if (use_eabi_hardfloat()) {
|
| - // In the hard floating point calling convention, we can use
|
| - // all double registers to pass doubles.
|
| - if (num_double_arguments > DoubleRegister::NumRegisters()) {
|
| + if (num_double_arguments > DoubleRegister::NumRegisters()) {
|
| stack_passed_words +=
|
| - 2 * (num_double_arguments - DoubleRegister::NumRegisters());
|
| - }
|
| - } else {
|
| - // In the soft floating point calling convention, every double
|
| - // argument is passed using two registers.
|
| - num_reg_arguments += 2 * num_double_arguments;
|
| + 2 * (num_double_arguments - DoubleRegister::NumRegisters());
|
| }
|
| - // Up to four simple arguments are passed in registers r0..r3.
|
| + // Up to 8 simple arguments are passed in registers r3..r10.
|
| if (num_reg_arguments > kRegisterPassedArguments) {
|
| stack_passed_words += num_reg_arguments - kRegisterPassedArguments;
|
| }
|
| @@ -3446,31 +3526,37 @@ void MacroAssembler::EmitSeqStringSetCharCheck(Register string,
|
| Register value,
|
| uint32_t encoding_mask) {
|
| Label is_object;
|
| - SmiTst(string);
|
| - Check(ne, kNonObject);
|
| + TestIfSmi(string, r0);
|
| + Check(ne, kNonObject, cr0);
|
|
|
| - ldr(ip, FieldMemOperand(string, HeapObject::kMapOffset));
|
| - ldrb(ip, FieldMemOperand(ip, Map::kInstanceTypeOffset));
|
| + LoadP(ip, FieldMemOperand(string, HeapObject::kMapOffset));
|
| + lbz(ip, FieldMemOperand(ip, Map::kInstanceTypeOffset));
|
|
|
| - and_(ip, ip, Operand(kStringRepresentationMask | kStringEncodingMask));
|
| - cmp(ip, Operand(encoding_mask));
|
| + andi(ip, ip, Operand(kStringRepresentationMask | kStringEncodingMask));
|
| + cmpi(ip, Operand(encoding_mask));
|
| Check(eq, kUnexpectedStringType);
|
|
|
| // The index is assumed to be untagged coming in, tag it to compare with the
|
| // string length without using a temp register, it is restored at the end of
|
| // this function.
|
| +#if !V8_TARGET_ARCH_PPC64
|
| Label index_tag_ok, index_tag_bad;
|
| - TrySmiTag(index, index, &index_tag_bad);
|
| + JumpIfNotSmiCandidate(index, r0, &index_tag_bad);
|
| +#endif
|
| + SmiTag(index, index);
|
| +#if !V8_TARGET_ARCH_PPC64
|
| b(&index_tag_ok);
|
| bind(&index_tag_bad);
|
| Abort(kIndexIsTooLarge);
|
| bind(&index_tag_ok);
|
| +#endif
|
|
|
| - ldr(ip, FieldMemOperand(string, String::kLengthOffset));
|
| + LoadP(ip, FieldMemOperand(string, String::kLengthOffset));
|
| cmp(index, ip);
|
| Check(lt, kIndexIsTooLarge);
|
|
|
| - cmp(index, Operand(Smi::FromInt(0)));
|
| + ASSERT(Smi::FromInt(0) == 0);
|
| + cmpi(index, Operand::Zero());
|
| Check(ge, kIndexIsNegative);
|
|
|
| SmiUntag(index, index);
|
| @@ -3483,17 +3569,24 @@ void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
|
| int frame_alignment = ActivationFrameAlignment();
|
| int stack_passed_arguments = CalculateStackPassedWords(
|
| num_reg_arguments, num_double_arguments);
|
| + int stack_space = kNumRequiredStackFrameSlots;
|
| +
|
| if (frame_alignment > kPointerSize) {
|
| - // Make stack end at alignment and make room for num_arguments - 4 words
|
| - // and the original value of sp.
|
| - mov(scratch, sp);
|
| - sub(sp, sp, Operand((stack_passed_arguments + 1) * kPointerSize));
|
| + // Make stack end at alignment and make room for stack arguments
|
| + // -- preserving original value of sp.
|
| + mr(scratch, sp);
|
| + addi(sp, sp, Operand(-(stack_passed_arguments + 1) * kPointerSize));
|
| ASSERT(IsPowerOf2(frame_alignment));
|
| - and_(sp, sp, Operand(-frame_alignment));
|
| - str(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
|
| + ClearRightImm(sp, sp, Operand(WhichPowerOf2(frame_alignment)));
|
| + StoreP(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
|
| } else {
|
| - sub(sp, sp, Operand(stack_passed_arguments * kPointerSize));
|
| + // Make room for stack arguments
|
| + stack_space += stack_passed_arguments;
|
| }
|
| +
|
| + // Allocate frame with required slots to make ABI work.
|
| + li(r0, Operand::Zero());
|
| + StorePU(r0, MemOperand(sp, -stack_space * kPointerSize));
|
| }
|
|
|
|
|
| @@ -3503,27 +3596,25 @@ void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
|
| }
|
|
|
|
|
| -void MacroAssembler::MovToFloatParameter(DwVfpRegister src) {
|
| - ASSERT(src.is(d0));
|
| - if (!use_eabi_hardfloat()) {
|
| - vmov(r0, r1, src);
|
| - }
|
| +void MacroAssembler::MovToFloatParameter(DoubleRegister src) {
|
| + Move(d1, src);
|
| }
|
|
|
|
|
| -// On ARM this is just a synonym to make the purpose clear.
|
| -void MacroAssembler::MovToFloatResult(DwVfpRegister src) {
|
| - MovToFloatParameter(src);
|
| +void MacroAssembler::MovToFloatResult(DoubleRegister src) {
|
| + Move(d1, src);
|
| }
|
|
|
|
|
| -void MacroAssembler::MovToFloatParameters(DwVfpRegister src1,
|
| - DwVfpRegister src2) {
|
| - ASSERT(src1.is(d0));
|
| - ASSERT(src2.is(d1));
|
| - if (!use_eabi_hardfloat()) {
|
| - vmov(r0, r1, src1);
|
| - vmov(r2, r3, src2);
|
| +void MacroAssembler::MovToFloatParameters(DoubleRegister src1,
|
| + DoubleRegister src2) {
|
| + if (src2.is(d1)) {
|
| + ASSERT(!src1.is(d2));
|
| + Move(d2, src2);
|
| + Move(d1, src1);
|
| + } else {
|
| + Move(d1, src1);
|
| + Move(d2, src2);
|
| }
|
| }
|
|
|
| @@ -3559,119 +3650,265 @@ void MacroAssembler::CallCFunctionHelper(Register function,
|
| int num_reg_arguments,
|
| int num_double_arguments) {
|
| ASSERT(has_frame());
|
| - // Make sure that the stack is aligned before calling a C function unless
|
| - // running in the simulator. The simulator has its own alignment check which
|
| - // provides more information.
|
| -#if V8_HOST_ARCH_ARM
|
| - if (emit_debug_code()) {
|
| - int frame_alignment = base::OS::ActivationFrameAlignment();
|
| - int frame_alignment_mask = frame_alignment - 1;
|
| - if (frame_alignment > kPointerSize) {
|
| - ASSERT(IsPowerOf2(frame_alignment));
|
| - Label alignment_as_expected;
|
| - tst(sp, Operand(frame_alignment_mask));
|
| - b(eq, &alignment_as_expected);
|
| - // Don't use Check here, as it will call Runtime_Abort possibly
|
| - // re-entering here.
|
| - stop("Unexpected alignment");
|
| - bind(&alignment_as_expected);
|
| - }
|
| - }
|
| -#endif
|
| -
|
| // Just call directly. The function called cannot cause a GC, or
|
| // allow preemption, so the return address in the link register
|
| // stays correct.
|
| - Call(function);
|
| +#if ABI_USES_FUNCTION_DESCRIPTORS && !defined(USE_SIMULATOR)
|
| + // AIX uses a function descriptor. When calling C code be aware
|
| + // of this descriptor and pick up values from it
|
| + LoadP(ToRegister(ABI_TOC_REGISTER), MemOperand(function, kPointerSize));
|
| + LoadP(ip, MemOperand(function, 0));
|
| + Register dest = ip;
|
| +#elif ABI_TOC_ADDRESSABILITY_VIA_IP
|
| + Move(ip, function);
|
| + Register dest = ip;
|
| +#else
|
| + Register dest = function;
|
| +#endif
|
| +
|
| + Call(dest);
|
| +
|
| + // Remove frame bought in PrepareCallCFunction
|
| int stack_passed_arguments = CalculateStackPassedWords(
|
| num_reg_arguments, num_double_arguments);
|
| + int stack_space = kNumRequiredStackFrameSlots + stack_passed_arguments;
|
| if (ActivationFrameAlignment() > kPointerSize) {
|
| - ldr(sp, MemOperand(sp, stack_passed_arguments * kPointerSize));
|
| + LoadP(sp, MemOperand(sp, stack_space * kPointerSize));
|
| } else {
|
| - add(sp, sp, Operand(stack_passed_arguments * sizeof(kPointerSize)));
|
| + addi(sp, sp, Operand(stack_space * kPointerSize));
|
| }
|
| }
|
|
|
|
|
| -void MacroAssembler::GetRelocatedValueLocation(Register ldr_location,
|
| - Register result,
|
| - Register scratch) {
|
| - Label small_constant_pool_load, load_result;
|
| - ldr(result, MemOperand(ldr_location));
|
| +void MacroAssembler::FlushICache(Register address, size_t size,
|
| + Register scratch) {
|
| + Label done;
|
| +
|
| + dcbf(r0, address);
|
| + sync();
|
| + icbi(r0, address);
|
| + isync();
|
| +
|
| + // This code handles ranges which cross a single cacheline boundary.
|
| + // scratch is last cacheline which intersects range.
|
| + const int kCacheLineSizeLog2 = WhichPowerOf2(CpuFeatures::cache_line_size());
|
| +
|
| + ASSERT(size > 0 && size <= (size_t)(1 << kCacheLineSizeLog2));
|
| + addi(scratch, address, Operand(size - 1));
|
| + ClearRightImm(scratch, scratch, Operand(kCacheLineSizeLog2));
|
| + cmpl(scratch, address);
|
| + ble(&done);
|
| +
|
| + dcbf(r0, scratch);
|
| + sync();
|
| + icbi(r0, scratch);
|
| + isync();
|
| +
|
| + bind(&done);
|
| +}
|
|
|
| - if (FLAG_enable_ool_constant_pool) {
|
| - // Check if this is an extended constant pool load.
|
| - and_(scratch, result, Operand(GetConsantPoolLoadMask()));
|
| - teq(scratch, Operand(GetConsantPoolLoadPattern()));
|
| - b(eq, &small_constant_pool_load);
|
| - if (emit_debug_code()) {
|
| - // Check that the instruction sequence is:
|
| - // movw reg, #offset_low
|
| - // movt reg, #offset_high
|
| - // ldr reg, [pp, reg]
|
| - Instr patterns[] = {GetMovWPattern(), GetMovTPattern(),
|
| - GetLdrPpRegOffsetPattern()};
|
| - for (int i = 0; i < 3; i++) {
|
| - ldr(result, MemOperand(ldr_location, i * kInstrSize));
|
| - and_(result, result, Operand(patterns[i]));
|
| - cmp(result, Operand(patterns[i]));
|
| - Check(eq, kTheInstructionToPatchShouldBeALoadFromConstantPool);
|
| - }
|
| - // Result was clobbered. Restore it.
|
| - ldr(result, MemOperand(ldr_location));
|
| - }
|
|
|
| - // Get the offset into the constant pool. First extract movw immediate into
|
| - // result.
|
| - and_(scratch, result, Operand(0xfff));
|
| - mov(ip, Operand(result, LSR, 4));
|
| - and_(ip, ip, Operand(0xf000));
|
| - orr(result, scratch, Operand(ip));
|
| - // Then extract movt immediate and or into result.
|
| - ldr(scratch, MemOperand(ldr_location, kInstrSize));
|
| - and_(ip, scratch, Operand(0xf0000));
|
| - orr(result, result, Operand(ip, LSL, 12));
|
| - and_(scratch, scratch, Operand(0xfff));
|
| - orr(result, result, Operand(scratch, LSL, 16));
|
| +void MacroAssembler::SetRelocatedValue(Register location,
|
| + Register scratch,
|
| + Register new_value) {
|
| + lwz(scratch, MemOperand(location));
|
|
|
| - b(&load_result);
|
| +#if V8_OOL_CONSTANT_POOL
|
| + if (emit_debug_code()) {
|
| + // Check that the instruction sequence is a load from the constant pool
|
| +#if V8_TARGET_ARCH_PPC64
|
| + And(scratch, scratch, Operand(kOpcodeMask | (0x1f * B16)));
|
| + Cmpi(scratch, Operand(ADDI), r0);
|
| + Check(eq, kTheInstructionShouldBeALi);
|
| + lwz(scratch, MemOperand(location, kInstrSize));
|
| +#endif
|
| + ExtractBitMask(scratch, scratch, 0x1f * B16);
|
| + cmpi(scratch, Operand(kConstantPoolRegister.code()));
|
| + Check(eq, kTheInstructionToPatchShouldBeALoadFromConstantPool);
|
| + // Scratch was clobbered. Restore it.
|
| + lwz(scratch, MemOperand(location));
|
| }
|
| + // Get the address of the constant and patch it.
|
| + andi(scratch, scratch, Operand(kImm16Mask));
|
| + StorePX(new_value, MemOperand(kConstantPoolRegister, scratch));
|
| +#else
|
| + // This code assumes a FIXED_SEQUENCE for lis/ori
|
|
|
| - bind(&small_constant_pool_load);
|
| + // At this point scratch is a lis instruction.
|
| if (emit_debug_code()) {
|
| - // Check that the instruction is a ldr reg, [<pc or pp> + offset] .
|
| - and_(result, result, Operand(GetConsantPoolLoadPattern()));
|
| - cmp(result, Operand(GetConsantPoolLoadPattern()));
|
| + And(scratch, scratch, Operand(kOpcodeMask | (0x1f * B16)));
|
| + Cmpi(scratch, Operand(ADDIS), r0);
|
| + Check(eq, kTheInstructionToPatchShouldBeALis);
|
| + lwz(scratch, MemOperand(location));
|
| + }
|
| +
|
| + // insert new high word into lis instruction
|
| +#if V8_TARGET_ARCH_PPC64
|
| + srdi(ip, new_value, Operand(32));
|
| + rlwimi(scratch, ip, 16, 16, 31);
|
| +#else
|
| + rlwimi(scratch, new_value, 16, 16, 31);
|
| +#endif
|
| +
|
| + stw(scratch, MemOperand(location));
|
| +
|
| + lwz(scratch, MemOperand(location, kInstrSize));
|
| + // scratch is now ori.
|
| + if (emit_debug_code()) {
|
| + And(scratch, scratch, Operand(kOpcodeMask));
|
| + Cmpi(scratch, Operand(ORI), r0);
|
| + Check(eq, kTheInstructionShouldBeAnOri);
|
| + lwz(scratch, MemOperand(location, kInstrSize));
|
| + }
|
| +
|
| + // insert new low word into ori instruction
|
| +#if V8_TARGET_ARCH_PPC64
|
| + rlwimi(scratch, ip, 0, 16, 31);
|
| +#else
|
| + rlwimi(scratch, new_value, 0, 16, 31);
|
| +#endif
|
| + stw(scratch, MemOperand(location, kInstrSize));
|
| +
|
| +#if V8_TARGET_ARCH_PPC64
|
| + if (emit_debug_code()) {
|
| + lwz(scratch, MemOperand(location, 2*kInstrSize));
|
| + // scratch is now sldi.
|
| + And(scratch, scratch, Operand(kOpcodeMask|kExt5OpcodeMask));
|
| + Cmpi(scratch, Operand(EXT5|RLDICR), r0);
|
| + Check(eq, kTheInstructionShouldBeASldi);
|
| + }
|
| +
|
| + lwz(scratch, MemOperand(location, 3*kInstrSize));
|
| + // scratch is now ori.
|
| + if (emit_debug_code()) {
|
| + And(scratch, scratch, Operand(kOpcodeMask));
|
| + Cmpi(scratch, Operand(ORIS), r0);
|
| + Check(eq, kTheInstructionShouldBeAnOris);
|
| + lwz(scratch, MemOperand(location, 3*kInstrSize));
|
| + }
|
| +
|
| + rlwimi(scratch, new_value, 16, 16, 31);
|
| + stw(scratch, MemOperand(location, 3*kInstrSize));
|
| +
|
| + lwz(scratch, MemOperand(location, 4*kInstrSize));
|
| + // scratch is now ori.
|
| + if (emit_debug_code()) {
|
| + And(scratch, scratch, Operand(kOpcodeMask));
|
| + Cmpi(scratch, Operand(ORI), r0);
|
| + Check(eq, kTheInstructionShouldBeAnOri);
|
| + lwz(scratch, MemOperand(location, 4*kInstrSize));
|
| + }
|
| + rlwimi(scratch, new_value, 0, 16, 31);
|
| + stw(scratch, MemOperand(location, 4*kInstrSize));
|
| +#endif
|
| +
|
| + // Update the I-cache so the new lis and addic can be executed.
|
| +#if V8_TARGET_ARCH_PPC64
|
| + FlushICache(location, 5 * kInstrSize, scratch);
|
| +#else
|
| + FlushICache(location, 2 * kInstrSize, scratch);
|
| +#endif
|
| +#endif
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::GetRelocatedValue(Register location,
|
| + Register result,
|
| + Register scratch) {
|
| + lwz(result, MemOperand(location));
|
| +
|
| +#if V8_OOL_CONSTANT_POOL
|
| + if (emit_debug_code()) {
|
| + // Check that the instruction sequence is a load from the constant pool
|
| +#if V8_TARGET_ARCH_PPC64
|
| + And(result, result, Operand(kOpcodeMask | (0x1f * B16)));
|
| + Cmpi(result, Operand(ADDI), r0);
|
| + Check(eq, kTheInstructionShouldBeALi);
|
| + lwz(result, MemOperand(location, kInstrSize));
|
| +#endif
|
| + ExtractBitMask(result, result, 0x1f * B16);
|
| + cmpi(result, Operand(kConstantPoolRegister.code()));
|
| Check(eq, kTheInstructionToPatchShouldBeALoadFromConstantPool);
|
| - // Result was clobbered. Restore it.
|
| - ldr(result, MemOperand(ldr_location));
|
| + lwz(result, MemOperand(location));
|
| + }
|
| + // Get the address of the constant and retrieve it.
|
| + andi(result, result, Operand(kImm16Mask));
|
| + LoadPX(result, MemOperand(kConstantPoolRegister, result));
|
| +#else
|
| + // This code assumes a FIXED_SEQUENCE for lis/ori
|
| + if (emit_debug_code()) {
|
| + And(result, result, Operand(kOpcodeMask | (0x1f * B16)));
|
| + Cmpi(result, Operand(ADDIS), r0);
|
| + Check(eq, kTheInstructionShouldBeALis);
|
| + lwz(result, MemOperand(location));
|
| }
|
|
|
| - // Get the offset into the constant pool.
|
| - const uint32_t kLdrOffsetMask = (1 << 12) - 1;
|
| - and_(result, result, Operand(kLdrOffsetMask));
|
| + // result now holds a lis instruction. Extract the immediate.
|
| + slwi(result, result, Operand(16));
|
|
|
| - bind(&load_result);
|
| - // Get the address of the constant.
|
| - if (FLAG_enable_ool_constant_pool) {
|
| - add(result, pp, Operand(result));
|
| - } else {
|
| - add(result, ldr_location, Operand(result));
|
| - add(result, result, Operand(Instruction::kPCReadOffset));
|
| + lwz(scratch, MemOperand(location, kInstrSize));
|
| + if (emit_debug_code()) {
|
| + And(scratch, scratch, Operand(kOpcodeMask));
|
| + Cmpi(scratch, Operand(ORI), r0);
|
| + Check(eq, kTheInstructionShouldBeAnOri);
|
| + lwz(scratch, MemOperand(location, kInstrSize));
|
| + }
|
| + // Copy the low 16bits from ori instruction into result
|
| + rlwimi(result, scratch, 0, 16, 31);
|
| +
|
| +#if V8_TARGET_ARCH_PPC64
|
| + if (emit_debug_code()) {
|
| + lwz(scratch, MemOperand(location, 2*kInstrSize));
|
| + // scratch is now sldi.
|
| + And(scratch, scratch, Operand(kOpcodeMask|kExt5OpcodeMask));
|
| + Cmpi(scratch, Operand(EXT5|RLDICR), r0);
|
| + Check(eq, kTheInstructionShouldBeASldi);
|
| + }
|
| +
|
| + lwz(scratch, MemOperand(location, 3*kInstrSize));
|
| + // scratch is now ori.
|
| + if (emit_debug_code()) {
|
| + And(scratch, scratch, Operand(kOpcodeMask));
|
| + Cmpi(scratch, Operand(ORIS), r0);
|
| + Check(eq, kTheInstructionShouldBeAnOris);
|
| + lwz(scratch, MemOperand(location, 3*kInstrSize));
|
| + }
|
| + sldi(result, result, Operand(16));
|
| + rldimi(result, scratch, 0, 48);
|
| +
|
| + lwz(scratch, MemOperand(location, 4*kInstrSize));
|
| + // scratch is now ori.
|
| + if (emit_debug_code()) {
|
| + And(scratch, scratch, Operand(kOpcodeMask));
|
| + Cmpi(scratch, Operand(ORI), r0);
|
| + Check(eq, kTheInstructionShouldBeAnOri);
|
| + lwz(scratch, MemOperand(location, 4*kInstrSize));
|
| }
|
| + sldi(result, result, Operand(16));
|
| + rldimi(result, scratch, 0, 48);
|
| +#endif
|
| +#endif
|
| }
|
|
|
|
|
| void MacroAssembler::CheckPageFlag(
|
| Register object,
|
| - Register scratch,
|
| + Register scratch, // scratch may be same register as object
|
| int mask,
|
| Condition cc,
|
| Label* condition_met) {
|
| - Bfc(scratch, object, 0, kPageSizeBits);
|
| - ldr(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
|
| - tst(scratch, Operand(mask));
|
| - b(cc, condition_met);
|
| + ASSERT(cc == ne || cc == eq);
|
| + ClearRightImm(scratch, object, Operand(kPageSizeBits));
|
| + LoadP(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
|
| +
|
| + And(r0, scratch, Operand(mask), SetRC);
|
| +
|
| + if (cc == ne) {
|
| + bne(condition_met, cr0);
|
| + }
|
| + if (cc == eq) {
|
| + beq(condition_met, cr0);
|
| + }
|
| }
|
|
|
|
|
| @@ -3680,9 +3917,9 @@ void MacroAssembler::CheckMapDeprecated(Handle<Map> map,
|
| Label* if_deprecated) {
|
| if (map->CanBeDeprecated()) {
|
| mov(scratch, Operand(map));
|
| - ldr(scratch, FieldMemOperand(scratch, Map::kBitField3Offset));
|
| - tst(scratch, Operand(Map::Deprecated::kMask));
|
| - b(ne, if_deprecated);
|
| + lwz(scratch, FieldMemOperand(scratch, Map::kBitField3Offset));
|
| + ExtractBitMask(scratch, scratch, Map::Deprecated::kMask, SetRC);
|
| + bne(if_deprecated, cr0);
|
| }
|
| }
|
|
|
| @@ -3707,20 +3944,24 @@ void MacroAssembler::HasColor(Register object,
|
| GetMarkBits(object, bitmap_scratch, mask_scratch);
|
|
|
| Label other_color, word_boundary;
|
| - ldr(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
|
| - tst(ip, Operand(mask_scratch));
|
| - b(first_bit == 1 ? eq : ne, &other_color);
|
| - // Shift left 1 by adding.
|
| - add(mask_scratch, mask_scratch, Operand(mask_scratch), SetCC);
|
| - b(eq, &word_boundary);
|
| - tst(ip, Operand(mask_scratch));
|
| - b(second_bit == 1 ? ne : eq, has_color);
|
| - jmp(&other_color);
|
| + lwz(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
|
| + // Test the first bit
|
| + and_(r0, ip, mask_scratch, SetRC);
|
| + b(first_bit == 1 ? eq : ne, &other_color, cr0);
|
| + // Shift left 1
|
| + // May need to load the next cell
|
| + slwi(mask_scratch, mask_scratch, Operand(1), SetRC);
|
| + beq(&word_boundary, cr0);
|
| + // Test the second bit
|
| + and_(r0, ip, mask_scratch, SetRC);
|
| + b(second_bit == 1 ? ne : eq, has_color, cr0);
|
| + b(&other_color);
|
|
|
| bind(&word_boundary);
|
| - ldr(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize + kPointerSize));
|
| - tst(ip, Operand(1));
|
| - b(second_bit == 1 ? ne : eq, has_color);
|
| + lwz(ip, MemOperand(bitmap_scratch,
|
| + MemoryChunk::kHeaderSize + kIntSize));
|
| + andi(r0, ip, Operand(1));
|
| + b(second_bit == 1 ? ne : eq, has_color, cr0);
|
| bind(&other_color);
|
| }
|
|
|
| @@ -3732,16 +3973,17 @@ void MacroAssembler::JumpIfDataObject(Register value,
|
| Register scratch,
|
| Label* not_data_object) {
|
| Label is_data_object;
|
| - ldr(scratch, FieldMemOperand(value, HeapObject::kMapOffset));
|
| + LoadP(scratch, FieldMemOperand(value, HeapObject::kMapOffset));
|
| CompareRoot(scratch, Heap::kHeapNumberMapRootIndex);
|
| - b(eq, &is_data_object);
|
| + beq(&is_data_object);
|
| ASSERT(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);
|
| ASSERT(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);
|
| // If it's a string and it's not a cons string then it's an object containing
|
| // no GC pointers.
|
| - ldrb(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
|
| - tst(scratch, Operand(kIsIndirectStringMask | kIsNotStringMask));
|
| - b(ne, not_data_object);
|
| + lbz(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
|
| + STATIC_ASSERT((kIsIndirectStringMask | kIsNotStringMask) == 0x81);
|
| + andi(scratch, scratch, Operand(kIsIndirectStringMask | kIsNotStringMask));
|
| + bne(not_data_object, cr0);
|
| bind(&is_data_object);
|
| }
|
|
|
| @@ -3750,13 +3992,20 @@ void MacroAssembler::GetMarkBits(Register addr_reg,
|
| Register bitmap_reg,
|
| Register mask_reg) {
|
| ASSERT(!AreAliased(addr_reg, bitmap_reg, mask_reg, no_reg));
|
| - and_(bitmap_reg, addr_reg, Operand(~Page::kPageAlignmentMask));
|
| - Ubfx(mask_reg, addr_reg, kPointerSizeLog2, Bitmap::kBitsPerCellLog2);
|
| + ASSERT((~Page::kPageAlignmentMask & 0xffff) == 0);
|
| + lis(r0, Operand((~Page::kPageAlignmentMask >> 16)));
|
| + and_(bitmap_reg, addr_reg, r0);
|
| const int kLowBits = kPointerSizeLog2 + Bitmap::kBitsPerCellLog2;
|
| - Ubfx(ip, addr_reg, kLowBits, kPageSizeBits - kLowBits);
|
| - add(bitmap_reg, bitmap_reg, Operand(ip, LSL, kPointerSizeLog2));
|
| - mov(ip, Operand(1));
|
| - mov(mask_reg, Operand(ip, LSL, mask_reg));
|
| + ExtractBitRange(mask_reg, addr_reg,
|
| + kLowBits - 1,
|
| + kPointerSizeLog2);
|
| + ExtractBitRange(ip, addr_reg,
|
| + kPageSizeBits - 1,
|
| + kLowBits);
|
| + ShiftLeftImm(ip, ip, Operand(Bitmap::kBytesPerCellLog2));
|
| + add(bitmap_reg, bitmap_reg, ip);
|
| + li(ip, Operand(1));
|
| + slw(mask_reg, ip, mask_reg);
|
| }
|
|
|
|
|
| @@ -3779,16 +4028,17 @@ void MacroAssembler::EnsureNotWhite(
|
|
|
| // Since both black and grey have a 1 in the first position and white does
|
| // not have a 1 there we only need to check one bit.
|
| - ldr(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
|
| - tst(mask_scratch, load_scratch);
|
| - b(ne, &done);
|
| + lwz(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
|
| + and_(r0, mask_scratch, load_scratch, SetRC);
|
| + bne(&done, cr0);
|
|
|
| if (emit_debug_code()) {
|
| // Check for impossible bit pattern.
|
| Label ok;
|
| // LSL may overflow, making the check conservative.
|
| - tst(load_scratch, Operand(mask_scratch, LSL, 1));
|
| - b(eq, &ok);
|
| + slwi(r0, mask_scratch, Operand(1));
|
| + and_(r0, load_scratch, r0, SetRC);
|
| + beq(&ok, cr0);
|
| stop("Impossible marking bit pattern");
|
| bind(&ok);
|
| }
|
| @@ -3797,13 +4047,19 @@ void MacroAssembler::EnsureNotWhite(
|
| // Currently only checks for HeapNumber and non-cons strings.
|
| Register map = load_scratch; // Holds map while checking type.
|
| Register length = load_scratch; // Holds length of object after testing type.
|
| - Label is_data_object;
|
| + Label is_data_object, maybe_string_object, is_string_object, is_encoded;
|
| +#if V8_TARGET_ARCH_PPC64
|
| + Label length_computed;
|
| +#endif
|
| +
|
|
|
| // Check for heap-number
|
| - ldr(map, FieldMemOperand(value, HeapObject::kMapOffset));
|
| + LoadP(map, FieldMemOperand(value, HeapObject::kMapOffset));
|
| CompareRoot(map, Heap::kHeapNumberMapRootIndex);
|
| - mov(length, Operand(HeapNumber::kSize), LeaveCC, eq);
|
| - b(eq, &is_data_object);
|
| + bne(&maybe_string_object);
|
| + li(length, Operand(HeapNumber::kSize));
|
| + b(&is_data_object);
|
| + bind(&maybe_string_object);
|
|
|
| // Check for strings.
|
| ASSERT(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);
|
| @@ -3811,9 +4067,9 @@ void MacroAssembler::EnsureNotWhite(
|
| // If it's a string and it's not a cons string then it's an object containing
|
| // no GC pointers.
|
| Register instance_type = load_scratch;
|
| - ldrb(instance_type, FieldMemOperand(map, Map::kInstanceTypeOffset));
|
| - tst(instance_type, Operand(kIsIndirectStringMask | kIsNotStringMask));
|
| - b(ne, value_is_white_and_not_data);
|
| + lbz(instance_type, FieldMemOperand(map, Map::kInstanceTypeOffset));
|
| + andi(r0, instance_type, Operand(kIsIndirectStringMask | kIsNotStringMask));
|
| + bne(value_is_white_and_not_data, cr0);
|
| // It's a non-indirect (non-cons and non-slice) string.
|
| // If it's external, the length is just ExternalString::kSize.
|
| // Otherwise it's String::kHeaderSize + string->length() * (1 or 2).
|
| @@ -3821,58 +4077,129 @@ void MacroAssembler::EnsureNotWhite(
|
| // set.
|
| ASSERT_EQ(0, kSeqStringTag & kExternalStringTag);
|
| ASSERT_EQ(0, kConsStringTag & kExternalStringTag);
|
| - tst(instance_type, Operand(kExternalStringTag));
|
| - mov(length, Operand(ExternalString::kSize), LeaveCC, ne);
|
| - b(ne, &is_data_object);
|
| + andi(r0, instance_type, Operand(kExternalStringTag));
|
| + beq(&is_string_object, cr0);
|
| + li(length, Operand(ExternalString::kSize));
|
| + b(&is_data_object);
|
| + bind(&is_string_object);
|
|
|
| // Sequential string, either ASCII or UC16.
|
| - // For ASCII (char-size of 1) we shift the smi tag away to get the length.
|
| - // For UC16 (char-size of 2) we just leave the smi tag in place, thereby
|
| - // getting the length multiplied by 2.
|
| + // For ASCII (char-size of 1) we untag the smi to get the length.
|
| + // For UC16 (char-size of 2):
|
| + // - (32-bit) we just leave the smi tag in place, thereby getting
|
| + // the length multiplied by 2.
|
| + // - (64-bit) we compute the offset in the 2-byte array
|
| ASSERT(kOneByteStringTag == 4 && kStringEncodingMask == 4);
|
| - ASSERT(kSmiTag == 0 && kSmiTagSize == 1);
|
| - ldr(ip, FieldMemOperand(value, String::kLengthOffset));
|
| - tst(instance_type, Operand(kStringEncodingMask));
|
| - mov(ip, Operand(ip, LSR, 1), LeaveCC, ne);
|
| - add(length, ip, Operand(SeqString::kHeaderSize + kObjectAlignmentMask));
|
| - and_(length, length, Operand(~kObjectAlignmentMask));
|
| + LoadP(ip, FieldMemOperand(value, String::kLengthOffset));
|
| + andi(r0, instance_type, Operand(kStringEncodingMask));
|
| + beq(&is_encoded, cr0);
|
| + SmiUntag(ip);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + b(&length_computed);
|
| +#endif
|
| + bind(&is_encoded);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + SmiToShortArrayOffset(ip, ip);
|
| + bind(&length_computed);
|
| +#else
|
| + ASSERT(kSmiShift == 1);
|
| +#endif
|
| + addi(length, ip, Operand(SeqString::kHeaderSize + kObjectAlignmentMask));
|
| + li(r0, Operand(~kObjectAlignmentMask));
|
| + and_(length, length, r0);
|
|
|
| bind(&is_data_object);
|
| // Value is a data object, and it is white. Mark it black. Since we know
|
| // that the object is white we can make it black by flipping one bit.
|
| - ldr(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
|
| - orr(ip, ip, Operand(mask_scratch));
|
| - str(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
|
| + lwz(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
|
| + orx(ip, ip, mask_scratch);
|
| + stw(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
|
|
|
| - and_(bitmap_scratch, bitmap_scratch, Operand(~Page::kPageAlignmentMask));
|
| - ldr(ip, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
|
| - add(ip, ip, Operand(length));
|
| - str(ip, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
|
| + mov(ip, Operand(~Page::kPageAlignmentMask));
|
| + and_(bitmap_scratch, bitmap_scratch, ip);
|
| + lwz(ip, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
|
| + add(ip, ip, length);
|
| + stw(ip, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
|
|
|
| bind(&done);
|
| }
|
|
|
|
|
| +// Saturate a value into 8-bit unsigned integer
|
| +// if input_value < 0, output_value is 0
|
| +// if input_value > 255, output_value is 255
|
| +// otherwise output_value is the input_value
|
| void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) {
|
| - Usat(output_reg, 8, Operand(input_reg));
|
| + Label done, negative_label, overflow_label;
|
| + int satval = (1 << 8) - 1;
|
| +
|
| + cmpi(input_reg, Operand::Zero());
|
| + blt(&negative_label);
|
| +
|
| + cmpi(input_reg, Operand(satval));
|
| + bgt(&overflow_label);
|
| + if (!output_reg.is(input_reg)) {
|
| + mr(output_reg, input_reg);
|
| + }
|
| + b(&done);
|
| +
|
| + bind(&negative_label);
|
| + li(output_reg, Operand::Zero()); // set to 0 if negative
|
| + b(&done);
|
| +
|
| +
|
| + bind(&overflow_label); // set to satval if > satval
|
| + li(output_reg, Operand(satval));
|
| +
|
| + bind(&done);
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::SetRoundingMode(FPRoundingMode RN) {
|
| + mtfsfi(7, RN);
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::ResetRoundingMode() {
|
| + mtfsfi(7, kRoundToNearest); // reset (default is kRoundToNearest)
|
| }
|
|
|
|
|
| void MacroAssembler::ClampDoubleToUint8(Register result_reg,
|
| - DwVfpRegister input_reg,
|
| - LowDwVfpRegister double_scratch) {
|
| + DoubleRegister input_reg,
|
| + DoubleRegister double_scratch) {
|
| + Label above_zero;
|
| Label done;
|
| + Label in_bounds;
|
| +
|
| + LoadDoubleLiteral(double_scratch, 0.0, result_reg);
|
| + fcmpu(input_reg, double_scratch);
|
| + bgt(&above_zero);
|
| +
|
| + // Double value is less than zero, NaN or Inf, return 0.
|
| + LoadIntLiteral(result_reg, 0);
|
| + b(&done);
|
|
|
| - // Handle inputs >= 255 (including +infinity).
|
| - Vmov(double_scratch, 255.0, result_reg);
|
| - mov(result_reg, Operand(255));
|
| - VFPCompareAndSetFlags(input_reg, double_scratch);
|
| - b(ge, &done);
|
| + // Double value is >= 255, return 255.
|
| + bind(&above_zero);
|
| + LoadDoubleLiteral(double_scratch, 255.0, result_reg);
|
| + fcmpu(input_reg, double_scratch);
|
| + ble(&in_bounds);
|
| + LoadIntLiteral(result_reg, 255);
|
| + b(&done);
|
|
|
| - // For inputs < 255 (including negative) vcvt_u32_f64 with round-to-nearest
|
| - // rounding mode will provide the correct result.
|
| - vcvt_u32_f64(double_scratch.low(), input_reg, kFPSCRRounding);
|
| - vmov(result_reg, double_scratch.low());
|
| + // In 0-255 range, round and truncate.
|
| + bind(&in_bounds);
|
| +
|
| + // round to nearest (default rounding mode)
|
| + fctiw(double_scratch, input_reg);
|
| +
|
| + // reserve a slot on the stack
|
| + stfdu(double_scratch, MemOperand(sp, -kDoubleSize));
|
| + nop(); // LHS/RAW optimization
|
| + lwz(result_reg, MemOperand(sp, Register::kMantissaOffset));
|
| + // restore the stack
|
| + addi(sp, sp, Operand(kDoubleSize));
|
|
|
| bind(&done);
|
| }
|
| @@ -3880,65 +4207,643 @@ void MacroAssembler::ClampDoubleToUint8(Register result_reg,
|
|
|
| void MacroAssembler::LoadInstanceDescriptors(Register map,
|
| Register descriptors) {
|
| - ldr(descriptors, FieldMemOperand(map, Map::kDescriptorsOffset));
|
| + LoadP(descriptors, FieldMemOperand(map, Map::kDescriptorsOffset));
|
| }
|
|
|
|
|
| void MacroAssembler::NumberOfOwnDescriptors(Register dst, Register map) {
|
| - ldr(dst, FieldMemOperand(map, Map::kBitField3Offset));
|
| + lwz(dst, FieldMemOperand(map, Map::kBitField3Offset));
|
| DecodeField<Map::NumberOfOwnDescriptorsBits>(dst);
|
| }
|
|
|
|
|
| void MacroAssembler::EnumLength(Register dst, Register map) {
|
| STATIC_ASSERT(Map::EnumLengthBits::kShift == 0);
|
| - ldr(dst, FieldMemOperand(map, Map::kBitField3Offset));
|
| - and_(dst, dst, Operand(Map::EnumLengthBits::kMask));
|
| + lwz(dst, FieldMemOperand(map, Map::kBitField3Offset));
|
| + ExtractBitMask(dst, dst, Map::EnumLengthBits::kMask);
|
| SmiTag(dst);
|
| }
|
|
|
|
|
| void MacroAssembler::CheckEnumCache(Register null_value, Label* call_runtime) {
|
| - Register empty_fixed_array_value = r6;
|
| + Register empty_fixed_array_value = r9;
|
| LoadRoot(empty_fixed_array_value, Heap::kEmptyFixedArrayRootIndex);
|
| Label next, start;
|
| - mov(r2, r0);
|
| + mr(r5, r3);
|
|
|
| // Check if the enum length field is properly initialized, indicating that
|
| // there is an enum cache.
|
| - ldr(r1, FieldMemOperand(r2, HeapObject::kMapOffset));
|
| + LoadP(r4, FieldMemOperand(r5, HeapObject::kMapOffset));
|
|
|
| - EnumLength(r3, r1);
|
| - cmp(r3, Operand(Smi::FromInt(kInvalidEnumCacheSentinel)));
|
| - b(eq, call_runtime);
|
| + EnumLength(r6, r4);
|
| + CmpSmiLiteral(r6, Smi::FromInt(kInvalidEnumCacheSentinel), r0);
|
| + beq(call_runtime);
|
|
|
| - jmp(&start);
|
| + b(&start);
|
|
|
| bind(&next);
|
| - ldr(r1, FieldMemOperand(r2, HeapObject::kMapOffset));
|
| + LoadP(r4, FieldMemOperand(r5, HeapObject::kMapOffset));
|
|
|
| // For all objects but the receiver, check that the cache is empty.
|
| - EnumLength(r3, r1);
|
| - cmp(r3, Operand(Smi::FromInt(0)));
|
| - b(ne, call_runtime);
|
| + EnumLength(r6, r4);
|
| + CmpSmiLiteral(r6, Smi::FromInt(0), r0);
|
| + bne(call_runtime);
|
|
|
| bind(&start);
|
|
|
| - // Check that there are no elements. Register r2 contains the current JS
|
| + // Check that there are no elements. Register r5 contains the current JS
|
| // object we've reached through the prototype chain.
|
| Label no_elements;
|
| - ldr(r2, FieldMemOperand(r2, JSObject::kElementsOffset));
|
| - cmp(r2, empty_fixed_array_value);
|
| - b(eq, &no_elements);
|
| + LoadP(r5, FieldMemOperand(r5, JSObject::kElementsOffset));
|
| + cmp(r5, empty_fixed_array_value);
|
| + beq(&no_elements);
|
|
|
| // Second chance, the object may be using the empty slow element dictionary.
|
| - CompareRoot(r2, Heap::kEmptySlowElementDictionaryRootIndex);
|
| - b(ne, call_runtime);
|
| + CompareRoot(r5, Heap::kEmptySlowElementDictionaryRootIndex);
|
| + bne(call_runtime);
|
|
|
| bind(&no_elements);
|
| - ldr(r2, FieldMemOperand(r1, Map::kPrototypeOffset));
|
| - cmp(r2, null_value);
|
| - b(ne, &next);
|
| + LoadP(r5, FieldMemOperand(r4, Map::kPrototypeOffset));
|
| + cmp(r5, null_value);
|
| + bne(&next);
|
| +}
|
| +
|
| +
|
| +////////////////////////////////////////////////////////////////////////////////
|
| +//
|
| +// New MacroAssembler Interfaces added for PPC
|
| +//
|
| +////////////////////////////////////////////////////////////////////////////////
|
| +void MacroAssembler::LoadIntLiteral(Register dst, int value) {
|
| + mov(dst, Operand(value));
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::LoadSmiLiteral(Register dst, Smi *smi) {
|
| + mov(dst, Operand(smi));
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::LoadDoubleLiteral(DoubleRegister result,
|
| + double value,
|
| + Register scratch) {
|
| +#if V8_OOL_CONSTANT_POOL
|
| + // TODO(mbrandy): enable extended constant pool usage for doubles.
|
| + // See ARM commit e27ab337 for a reference.
|
| + if (is_constant_pool_available() && !use_extended_constant_pool()) {
|
| + RelocInfo rinfo(pc_, value);
|
| + ConstantPoolArray::LayoutSection section = ConstantPoolAddEntry(rinfo);
|
| + if (section == ConstantPoolArray::EXTENDED_SECTION) {
|
| + BlockTrampolinePoolScope block_trampoline_pool(this);
|
| + addis(scratch, kConstantPoolRegister, Operand::Zero());
|
| + lfd(result, MemOperand(scratch, 0));
|
| + } else {
|
| + ASSERT(section == ConstantPoolArray::SMALL_SECTION);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + // We use 2 instruction sequence here for consistency with mov.
|
| + li(scratch, Operand::Zero());
|
| + lfdx(result, MemOperand(kConstantPoolRegister, scratch));
|
| +#else
|
| + lfd(result, MemOperand(kConstantPoolRegister, 0));
|
| +#endif
|
| + }
|
| + return;
|
| + }
|
| +#endif
|
| +
|
| + addi(sp, sp, Operand(-8)); // reserve 1 temp double on the stack
|
| +
|
| + // avoid gcc strict aliasing error using union cast
|
| + union {
|
| + double dval;
|
| +#if V8_TARGET_ARCH_PPC64
|
| + intptr_t ival;
|
| +#else
|
| + intptr_t ival[2];
|
| +#endif
|
| + } litVal;
|
| +
|
| + litVal.dval = value;
|
| +#if V8_TARGET_ARCH_PPC64
|
| + mov(scratch, Operand(litVal.ival));
|
| + std(scratch, MemOperand(sp));
|
| +#else
|
| + LoadIntLiteral(scratch, litVal.ival[0]);
|
| + stw(scratch, MemOperand(sp, 0));
|
| + LoadIntLiteral(scratch, litVal.ival[1]);
|
| + stw(scratch, MemOperand(sp, 4));
|
| +#endif
|
| + nop(); // LHS/RAW optimization
|
| + lfd(result, MemOperand(sp, 0));
|
| +
|
| + addi(sp, sp, Operand(8)); // restore the stack ptr
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::Add(Register dst, Register src,
|
| + intptr_t value, Register scratch) {
|
| + if (is_int16(value)) {
|
| + addi(dst, src, Operand(value));
|
| + } else {
|
| + mov(scratch, Operand(value));
|
| + add(dst, src, scratch);
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::Cmpi(Register src1, const Operand& src2, Register scratch,
|
| + CRegister cr) {
|
| + intptr_t value = src2.immediate();
|
| + if (is_int16(value)) {
|
| + cmpi(src1, src2, cr);
|
| + } else {
|
| + mov(scratch, src2);
|
| + cmp(src1, scratch, cr);
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::Cmpli(Register src1, const Operand& src2, Register scratch,
|
| + CRegister cr) {
|
| + intptr_t value = src2.immediate();
|
| + if (is_uint16(value)) {
|
| + cmpli(src1, src2, cr);
|
| + } else {
|
| + mov(scratch, src2);
|
| + cmpl(src1, scratch, cr);
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::Cmpwi(Register src1, const Operand& src2,
|
| + Register scratch, CRegister cr) {
|
| + intptr_t value = src2.immediate();
|
| + if (is_int16(value)) {
|
| + cmpwi(src1, src2, cr);
|
| + } else {
|
| + mov(scratch, src2);
|
| + cmpw(src1, scratch, cr);
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::Cmplwi(Register src1, const Operand& src2,
|
| + Register scratch, CRegister cr) {
|
| + intptr_t value = src2.immediate();
|
| + if (is_uint16(value)) {
|
| + cmplwi(src1, src2, cr);
|
| + } else {
|
| + mov(scratch, src2);
|
| + cmplw(src1, scratch, cr);
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::And(Register ra, Register rs, const Operand& rb,
|
| + RCBit rc) {
|
| + if (rb.is_reg()) {
|
| + and_(ra, rs, rb.rm(), rc);
|
| + } else {
|
| + if (is_uint16(rb.imm_) && RelocInfo::IsNone(rb.rmode_) && rc == SetRC) {
|
| + andi(ra, rs, rb);
|
| + } else {
|
| + // mov handles the relocation.
|
| + ASSERT(!rs.is(r0));
|
| + mov(r0, rb);
|
| + and_(ra, rs, r0, rc);
|
| + }
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::Or(Register ra, Register rs, const Operand& rb, RCBit rc) {
|
| + if (rb.is_reg()) {
|
| + orx(ra, rs, rb.rm(), rc);
|
| + } else {
|
| + if (is_uint16(rb.imm_) && RelocInfo::IsNone(rb.rmode_) && rc == LeaveRC) {
|
| + ori(ra, rs, rb);
|
| + } else {
|
| + // mov handles the relocation.
|
| + ASSERT(!rs.is(r0));
|
| + mov(r0, rb);
|
| + orx(ra, rs, r0, rc);
|
| + }
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::Xor(Register ra, Register rs, const Operand& rb,
|
| + RCBit rc) {
|
| + if (rb.is_reg()) {
|
| + xor_(ra, rs, rb.rm(), rc);
|
| + } else {
|
| + if (is_uint16(rb.imm_) && RelocInfo::IsNone(rb.rmode_) && rc == LeaveRC) {
|
| + xori(ra, rs, rb);
|
| + } else {
|
| + // mov handles the relocation.
|
| + ASSERT(!rs.is(r0));
|
| + mov(r0, rb);
|
| + xor_(ra, rs, r0, rc);
|
| + }
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::CmpSmiLiteral(Register src1, Smi *smi, Register scratch,
|
| + CRegister cr) {
|
| +#if V8_TARGET_ARCH_PPC64
|
| + LoadSmiLiteral(scratch, smi);
|
| + cmp(src1, scratch, cr);
|
| +#else
|
| + Cmpi(src1, Operand(smi), scratch, cr);
|
| +#endif
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::CmplSmiLiteral(Register src1, Smi *smi, Register scratch,
|
| + CRegister cr) {
|
| +#if V8_TARGET_ARCH_PPC64
|
| + LoadSmiLiteral(scratch, smi);
|
| + cmpl(src1, scratch, cr);
|
| +#else
|
| + Cmpli(src1, Operand(smi), scratch, cr);
|
| +#endif
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi *smi,
|
| + Register scratch) {
|
| +#if V8_TARGET_ARCH_PPC64
|
| + LoadSmiLiteral(scratch, smi);
|
| + add(dst, src, scratch);
|
| +#else
|
| + Add(dst, src, reinterpret_cast<intptr_t>(smi), scratch);
|
| +#endif
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi *smi,
|
| + Register scratch) {
|
| +#if V8_TARGET_ARCH_PPC64
|
| + LoadSmiLiteral(scratch, smi);
|
| + sub(dst, src, scratch);
|
| +#else
|
| + Add(dst, src, -(reinterpret_cast<intptr_t>(smi)), scratch);
|
| +#endif
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi *smi,
|
| + Register scratch, RCBit rc) {
|
| +#if V8_TARGET_ARCH_PPC64
|
| + LoadSmiLiteral(scratch, smi);
|
| + and_(dst, src, scratch, rc);
|
| +#else
|
| + And(dst, src, Operand(smi), rc);
|
| +#endif
|
| +}
|
| +
|
| +
|
| +// Load a "pointer" sized value from the memory location
|
| +void MacroAssembler::LoadP(Register dst, const MemOperand& mem,
|
| + Register scratch) {
|
| + int offset = mem.offset();
|
| +
|
| + if (!scratch.is(no_reg) && !is_int16(offset)) {
|
| + /* cannot use d-form */
|
| + LoadIntLiteral(scratch, offset);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + ldx(dst, MemOperand(mem.ra(), scratch));
|
| +#else
|
| + lwzx(dst, MemOperand(mem.ra(), scratch));
|
| +#endif
|
| + } else {
|
| +#if V8_TARGET_ARCH_PPC64
|
| + int misaligned = (offset & 3);
|
| + if (misaligned) {
|
| + // adjust base to conform to offset alignment requirements
|
| + // Todo: enhance to use scratch if dst is unsuitable
|
| + ASSERT(!dst.is(r0));
|
| + addi(dst, mem.ra(), Operand((offset & 3) - 4));
|
| + ld(dst, MemOperand(dst, (offset & ~3) + 4));
|
| + } else {
|
| + ld(dst, mem);
|
| + }
|
| +#else
|
| + lwz(dst, mem);
|
| +#endif
|
| + }
|
| +}
|
| +
|
| +
|
| +// Store a "pointer" sized value to the memory location
|
| +void MacroAssembler::StoreP(Register src, const MemOperand& mem,
|
| + Register scratch) {
|
| + int offset = mem.offset();
|
| +
|
| + if (!scratch.is(no_reg) && !is_int16(offset)) {
|
| + /* cannot use d-form */
|
| + LoadIntLiteral(scratch, offset);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + stdx(src, MemOperand(mem.ra(), scratch));
|
| +#else
|
| + stwx(src, MemOperand(mem.ra(), scratch));
|
| +#endif
|
| + } else {
|
| +#if V8_TARGET_ARCH_PPC64
|
| + int misaligned = (offset & 3);
|
| + if (misaligned) {
|
| + // adjust base to conform to offset alignment requirements
|
| + // a suitable scratch is required here
|
| + ASSERT(!scratch.is(no_reg));
|
| + if (scratch.is(r0)) {
|
| + LoadIntLiteral(scratch, offset);
|
| + stdx(src, MemOperand(mem.ra(), scratch));
|
| + } else {
|
| + addi(scratch, mem.ra(), Operand((offset & 3) - 4));
|
| + std(src, MemOperand(scratch, (offset & ~3) + 4));
|
| + }
|
| + } else {
|
| + std(src, mem);
|
| + }
|
| +#else
|
| + stw(src, mem);
|
| +#endif
|
| + }
|
| +}
|
| +
|
| +void MacroAssembler::LoadWordArith(Register dst, const MemOperand& mem,
|
| + Register scratch) {
|
| + int offset = mem.offset();
|
| +
|
| + if (!scratch.is(no_reg) && !is_int16(offset)) {
|
| + /* cannot use d-form */
|
| + LoadIntLiteral(scratch, offset);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + // lwax(dst, MemOperand(mem.ra(), scratch));
|
| + ASSERT(0); // lwax not yet implemented
|
| +#else
|
| + lwzx(dst, MemOperand(mem.ra(), scratch));
|
| +#endif
|
| + } else {
|
| +#if V8_TARGET_ARCH_PPC64
|
| + int misaligned = (offset & 3);
|
| + if (misaligned) {
|
| + // adjust base to conform to offset alignment requirements
|
| + // Todo: enhance to use scratch if dst is unsuitable
|
| + ASSERT(!dst.is(r0));
|
| + addi(dst, mem.ra(), Operand((offset & 3) - 4));
|
| + lwa(dst, MemOperand(dst, (offset & ~3) + 4));
|
| + } else {
|
| + lwa(dst, mem);
|
| + }
|
| +#else
|
| + lwz(dst, mem);
|
| +#endif
|
| + }
|
| +}
|
| +
|
| +
|
| +// Variable length depending on whether offset fits into immediate field
|
| +// MemOperand currently only supports d-form
|
| +void MacroAssembler::LoadWord(Register dst, const MemOperand& mem,
|
| + Register scratch, bool updateForm) {
|
| + Register base = mem.ra();
|
| + int offset = mem.offset();
|
| +
|
| + bool use_dform = true;
|
| + if (!is_int16(offset)) {
|
| + use_dform = false;
|
| + LoadIntLiteral(scratch, offset);
|
| + }
|
| +
|
| + if (!updateForm) {
|
| + if (use_dform) {
|
| + lwz(dst, mem);
|
| + } else {
|
| + lwzx(dst, MemOperand(base, scratch));
|
| + }
|
| + } else {
|
| + if (use_dform) {
|
| + lwzu(dst, mem);
|
| + } else {
|
| + lwzux(dst, MemOperand(base, scratch));
|
| + }
|
| + }
|
| +}
|
| +
|
| +
|
| +// Variable length depending on whether offset fits into immediate field
|
| +// MemOperand current only supports d-form
|
| +void MacroAssembler::StoreWord(Register src, const MemOperand& mem,
|
| + Register scratch, bool updateForm) {
|
| + Register base = mem.ra();
|
| + int offset = mem.offset();
|
| +
|
| + bool use_dform = true;
|
| + if (!is_int16(offset)) {
|
| + use_dform = false;
|
| + LoadIntLiteral(scratch, offset);
|
| + }
|
| +
|
| + if (!updateForm) {
|
| + if (use_dform) {
|
| + stw(src, mem);
|
| + } else {
|
| + stwx(src, MemOperand(base, scratch));
|
| + }
|
| + } else {
|
| + if (use_dform) {
|
| + stwu(src, mem);
|
| + } else {
|
| + stwux(src, MemOperand(base, scratch));
|
| + }
|
| + }
|
| +}
|
| +
|
| +
|
| +// Variable length depending on whether offset fits into immediate field
|
| +// MemOperand currently only supports d-form
|
| +void MacroAssembler::LoadHalfWord(Register dst, const MemOperand& mem,
|
| + Register scratch, bool updateForm) {
|
| + Register base = mem.ra();
|
| + int offset = mem.offset();
|
| +
|
| + bool use_dform = true;
|
| + if (!is_int16(offset)) {
|
| + use_dform = false;
|
| + LoadIntLiteral(scratch, offset);
|
| + }
|
| +
|
| + if (!updateForm) {
|
| + if (use_dform) {
|
| + lhz(dst, mem);
|
| + } else {
|
| + lhzx(dst, MemOperand(base, scratch));
|
| + }
|
| + } else {
|
| + // If updateForm is ever true, then lhzu will
|
| + // need to be implemented
|
| + assert(0);
|
| +#if 0 // LoadHalfWord w\ update not yet needed
|
| + if (use_dform) {
|
| + lhzu(dst, mem);
|
| + } else {
|
| + lhzux(dst, MemOperand(base, scratch));
|
| + }
|
| +#endif
|
| + }
|
| +}
|
| +
|
| +
|
| +// Variable length depending on whether offset fits into immediate field
|
| +// MemOperand current only supports d-form
|
| +void MacroAssembler::StoreHalfWord(Register src, const MemOperand& mem,
|
| + Register scratch, bool updateForm) {
|
| + Register base = mem.ra();
|
| + int offset = mem.offset();
|
| +
|
| + bool use_dform = true;
|
| + if (!is_int16(offset)) {
|
| + use_dform = false;
|
| + LoadIntLiteral(scratch, offset);
|
| + }
|
| +
|
| + if (!updateForm) {
|
| + if (use_dform) {
|
| + sth(src, mem);
|
| + } else {
|
| + sthx(src, MemOperand(base, scratch));
|
| + }
|
| + } else {
|
| + // If updateForm is ever true, then sthu will
|
| + // need to be implemented
|
| + assert(0);
|
| +#if 0 // StoreHalfWord w\ update not yet needed
|
| + if (use_dform) {
|
| + sthu(src, mem);
|
| + } else {
|
| + sthux(src, MemOperand(base, scratch));
|
| + }
|
| +#endif
|
| + }
|
| +}
|
| +
|
| +
|
| +// Variable length depending on whether offset fits into immediate field
|
| +// MemOperand currently only supports d-form
|
| +void MacroAssembler::LoadByte(Register dst, const MemOperand& mem,
|
| + Register scratch, bool updateForm) {
|
| + Register base = mem.ra();
|
| + int offset = mem.offset();
|
| +
|
| + bool use_dform = true;
|
| + if (!is_int16(offset)) {
|
| + use_dform = false;
|
| + LoadIntLiteral(scratch, offset);
|
| + }
|
| +
|
| + if (!updateForm) {
|
| + if (use_dform) {
|
| + lbz(dst, mem);
|
| + } else {
|
| + lbzx(dst, MemOperand(base, scratch));
|
| + }
|
| + } else {
|
| + // If updateForm is ever true, then lbzu will
|
| + // need to be implemented
|
| + assert(0);
|
| +#if 0 // LoadByte w\ update not yet needed
|
| + if (use_dform) {
|
| + lbzu(dst, mem);
|
| + } else {
|
| + lbzux(dst, MemOperand(base, scratch));
|
| + }
|
| +#endif
|
| + }
|
| +}
|
| +
|
| +
|
| +// Variable length depending on whether offset fits into immediate field
|
| +// MemOperand current only supports d-form
|
| +void MacroAssembler::StoreByte(Register src, const MemOperand& mem,
|
| + Register scratch, bool updateForm) {
|
| + Register base = mem.ra();
|
| + int offset = mem.offset();
|
| +
|
| + bool use_dform = true;
|
| + if (!is_int16(offset)) {
|
| + use_dform = false;
|
| + LoadIntLiteral(scratch, offset);
|
| + }
|
| +
|
| + if (!updateForm) {
|
| + if (use_dform) {
|
| + stb(src, mem);
|
| + } else {
|
| + stbx(src, MemOperand(base, scratch));
|
| + }
|
| + } else {
|
| + // If updateForm is ever true, then stbu will
|
| + // need to be implemented
|
| + assert(0);
|
| +#if 0 // StoreByte w\ update not yet needed
|
| + if (use_dform) {
|
| + stbu(src, mem);
|
| + } else {
|
| + stbux(src, MemOperand(base, scratch));
|
| + }
|
| +#endif
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::LoadRepresentation(Register dst,
|
| + const MemOperand& mem,
|
| + Representation r,
|
| + Register scratch) {
|
| + ASSERT(!r.IsDouble());
|
| + if (r.IsInteger8()) {
|
| + LoadByte(dst, mem, scratch);
|
| + extsb(dst, dst);
|
| + } else if (r.IsUInteger8()) {
|
| + LoadByte(dst, mem, scratch);
|
| + } else if (r.IsInteger16()) {
|
| + LoadHalfWord(dst, mem, scratch);
|
| + extsh(dst, dst);
|
| + } else if (r.IsUInteger16()) {
|
| + LoadHalfWord(dst, mem, scratch);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + } else if (r.IsInteger32()) {
|
| + LoadWord(dst, mem, scratch);
|
| +#endif
|
| + } else {
|
| + LoadP(dst, mem, scratch);
|
| + }
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::StoreRepresentation(Register src,
|
| + const MemOperand& mem,
|
| + Representation r,
|
| + Register scratch) {
|
| + ASSERT(!r.IsDouble());
|
| + if (r.IsInteger8() || r.IsUInteger8()) {
|
| + StoreByte(src, mem, scratch);
|
| + } else if (r.IsInteger16() || r.IsUInteger16()) {
|
| + StoreHalfWord(src, mem, scratch);
|
| +#if V8_TARGET_ARCH_PPC64
|
| + } else if (r.IsInteger32()) {
|
| + StoreWord(src, mem, scratch);
|
| +#endif
|
| + } else {
|
| + if (r.IsHeapObject()) {
|
| + AssertNotSmi(src);
|
| + } else if (r.IsSmi()) {
|
| + AssertSmi(src);
|
| + }
|
| + StoreP(src, mem, scratch);
|
| + }
|
| }
|
|
|
|
|
| @@ -3950,17 +4855,17 @@ void MacroAssembler::TestJSArrayForAllocationMemento(
|
| ExternalReference::new_space_start(isolate());
|
| ExternalReference new_space_allocation_top =
|
| ExternalReference::new_space_allocation_top_address(isolate());
|
| - add(scratch_reg, receiver_reg,
|
| - Operand(JSArray::kSize + AllocationMemento::kSize - kHeapObjectTag));
|
| - cmp(scratch_reg, Operand(new_space_start));
|
| - b(lt, no_memento_found);
|
| + addi(scratch_reg, receiver_reg,
|
| + Operand(JSArray::kSize + AllocationMemento::kSize - kHeapObjectTag));
|
| + Cmpi(scratch_reg, Operand(new_space_start), r0);
|
| + blt(no_memento_found);
|
| mov(ip, Operand(new_space_allocation_top));
|
| - ldr(ip, MemOperand(ip));
|
| + LoadP(ip, MemOperand(ip));
|
| cmp(scratch_reg, ip);
|
| - b(gt, no_memento_found);
|
| - ldr(scratch_reg, MemOperand(scratch_reg, -AllocationMemento::kSize));
|
| - cmp(scratch_reg,
|
| - Operand(isolate()->factory()->allocation_memento_map()));
|
| + bgt(no_memento_found);
|
| + LoadP(scratch_reg, MemOperand(scratch_reg, -AllocationMemento::kSize));
|
| + Cmpi(scratch_reg,
|
| + Operand(isolate()->factory()->allocation_memento_map()), r0);
|
| }
|
|
|
|
|
| @@ -3999,18 +4904,18 @@ void MacroAssembler::JumpIfDictionaryInPrototypeChain(
|
| Label loop_again;
|
|
|
| // scratch contained elements pointer.
|
| - mov(current, object);
|
| + mr(current, object);
|
|
|
| // Loop based on the map going up the prototype chain.
|
| bind(&loop_again);
|
| - ldr(current, FieldMemOperand(current, HeapObject::kMapOffset));
|
| - ldr(scratch1, FieldMemOperand(current, Map::kBitField2Offset));
|
| + LoadP(current, FieldMemOperand(current, HeapObject::kMapOffset));
|
| + lbz(scratch1, FieldMemOperand(current, Map::kBitField2Offset));
|
| DecodeField<Map::ElementsKindBits>(scratch1);
|
| - cmp(scratch1, Operand(DICTIONARY_ELEMENTS));
|
| - b(eq, found);
|
| - ldr(current, FieldMemOperand(current, Map::kPrototypeOffset));
|
| - cmp(current, Operand(factory->null_value()));
|
| - b(ne, &loop_again);
|
| + cmpi(scratch1, Operand(DICTIONARY_ELEMENTS));
|
| + beq(found);
|
| + LoadP(current, FieldMemOperand(current, Map::kPrototypeOffset));
|
| + Cmpi(current, Operand(factory->null_value()), r0);
|
| + bne(&loop_again);
|
| }
|
|
|
|
|
| @@ -4074,14 +4979,18 @@ void CodePatcher::Emit(Instr instr) {
|
| }
|
|
|
|
|
| -void CodePatcher::Emit(Address addr) {
|
| - masm()->emit(reinterpret_cast<Instr>(addr));
|
| -}
|
| -
|
| -
|
| void CodePatcher::EmitCondition(Condition cond) {
|
| Instr instr = Assembler::instr_at(masm_.pc_);
|
| - instr = (instr & ~kCondMask) | cond;
|
| + switch (cond) {
|
| + case eq:
|
| + instr = (instr & ~kCondMask) | BT;
|
| + break;
|
| + case ne:
|
| + instr = (instr & ~kCondMask) | BF;
|
| + break;
|
| + default:
|
| + UNIMPLEMENTED();
|
| + }
|
| masm_.emit(instr);
|
| }
|
|
|
| @@ -4090,22 +4999,23 @@ void MacroAssembler::TruncatingDiv(Register result,
|
| Register dividend,
|
| int32_t divisor) {
|
| ASSERT(!dividend.is(result));
|
| - ASSERT(!dividend.is(ip));
|
| - ASSERT(!result.is(ip));
|
| + ASSERT(!dividend.is(r0));
|
| + ASSERT(!result.is(r0));
|
| MultiplierAndShift ms(divisor);
|
| - mov(ip, Operand(ms.multiplier()));
|
| - smull(ip, result, dividend, ip);
|
| + mov(r0, Operand(ms.multiplier()));
|
| + mulhw(result, dividend, r0);
|
| if (divisor > 0 && ms.multiplier() < 0) {
|
| - add(result, result, Operand(dividend));
|
| + add(result, result, dividend);
|
| }
|
| if (divisor < 0 && ms.multiplier() > 0) {
|
| - sub(result, result, Operand(dividend));
|
| + sub(result, result, dividend);
|
| }
|
| - if (ms.shift() > 0) mov(result, Operand(result, ASR, ms.shift()));
|
| - add(result, result, Operand(dividend, LSR, 31));
|
| + if (ms.shift() > 0) srawi(result, result, ms.shift());
|
| + ExtractBit(r0, dividend, 31);
|
| + add(result, result, r0);
|
| }
|
|
|
|
|
| } } // namespace v8::internal
|
|
|
| -#endif // V8_TARGET_ARCH_ARM
|
| +#endif // V8_TARGET_ARCH_PPC
|
|
|