Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(139)

Side by Side Diff: src/base/cpu.cc

Issue 422063005: Contribution of PowerPC port. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: re-upload - catch up to 8/19 level Created 6 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
OLDNEW
1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/cpu.h" 5 #include "src/base/cpu.h"
6 6
7 #if V8_LIBC_MSVCRT 7 #if V8_LIBC_MSVCRT
8 #include <intrin.h> // __cpuid() 8 #include <intrin.h> // __cpuid()
9 #endif 9 #endif
10 #if V8_OS_POSIX 10 #if V8_OS_POSIX
11 #include <unistd.h> // sysconf() 11 #include <unistd.h> // sysconf()
12 #endif 12 #endif
13 #if V8_OS_QNX 13 #if V8_OS_QNX
14 #include <sys/syspage.h> // cpuinfo 14 #include <sys/syspage.h> // cpuinfo
15 #endif 15 #endif
16 #if V8_OS_LINUX && V8_HOST_ARCH_PPC
17 #include <elf.h>
18 #endif
16 19
17 #include <ctype.h> 20 #include <ctype.h>
18 #include <limits.h> 21 #include <limits.h>
19 #include <stdio.h> 22 #include <stdio.h>
20 #include <stdlib.h> 23 #include <stdlib.h>
21 #include <string.h> 24 #include <string.h>
22 #include <algorithm> 25 #include <algorithm>
23 26
24 #include "src/base/logging.h" 27 #include "src/base/logging.h"
25 #if V8_OS_WIN 28 #if V8_OS_WIN
(...skipping 230 matching lines...) Expand 10 before | Expand all | Expand 10 after
256 } 259 }
257 return false; 260 return false;
258 } 261 }
259 262
260 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 263 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
261 264
262 #endif // V8_OS_LINUX 265 #endif // V8_OS_LINUX
263 266
264 #endif // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 267 #endif // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
265 268
266 CPU::CPU() : stepping_(0), 269 #define UNKNOWN_CACHE_LINE_SIZE 0
267 model_(0), 270
268 ext_model_(0), 271 CPU::CPU()
269 family_(0), 272 : stepping_(0),
270 ext_family_(0), 273 model_(0),
271 type_(0), 274 ext_model_(0),
272 implementer_(0), 275 family_(0),
273 architecture_(0), 276 ext_family_(0),
274 part_(0), 277 type_(0),
275 has_fpu_(false), 278 implementer_(0),
276 has_cmov_(false), 279 architecture_(0),
277 has_sahf_(false), 280 part_(0),
278 has_mmx_(false), 281 cache_line_size_(UNKNOWN_CACHE_LINE_SIZE),
279 has_sse_(false), 282 has_fpu_(false),
280 has_sse2_(false), 283 has_cmov_(false),
281 has_sse3_(false), 284 has_sahf_(false),
282 has_ssse3_(false), 285 has_mmx_(false),
283 has_sse41_(false), 286 has_sse_(false),
284 has_sse42_(false), 287 has_sse2_(false),
285 has_idiva_(false), 288 has_sse3_(false),
286 has_neon_(false), 289 has_ssse3_(false),
287 has_thumb2_(false), 290 has_sse41_(false),
288 has_vfp_(false), 291 has_sse42_(false),
289 has_vfp3_(false), 292 has_idiva_(false),
290 has_vfp3_d32_(false), 293 has_neon_(false),
291 is_fp64_mode_(false) { 294 has_thumb2_(false),
295 has_vfp_(false),
296 has_vfp3_(false),
297 has_vfp3_d32_(false),
298 is_fp64_mode_(false) {
292 memcpy(vendor_, "Unknown", 8); 299 memcpy(vendor_, "Unknown", 8);
293 #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 300 #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
294 int cpu_info[4]; 301 int cpu_info[4];
295 302
296 // __cpuid with an InfoType argument of 0 returns the number of 303 // __cpuid with an InfoType argument of 0 returns the number of
297 // valid Ids in CPUInfo[0] and the CPU identification string in 304 // valid Ids in CPUInfo[0] and the CPU identification string in
298 // the other three array elements. The CPU identification string is 305 // the other three array elements. The CPU identification string is
299 // not in linear order. The code below arranges the information 306 // not in linear order. The code below arranges the information
300 // in a human readable form. The human readable order is CPUInfo[1] | 307 // in a human readable form. The human readable order is CPUInfo[1] |
301 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped 308 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
(...skipping 213 matching lines...) Expand 10 before | Expand all | Expand 10 after
515 char* part = cpu_info.ExtractField("CPU part"); 522 char* part = cpu_info.ExtractField("CPU part");
516 if (part != NULL) { 523 if (part != NULL) {
517 char* end ; 524 char* end ;
518 part_ = strtol(part, &end, 0); 525 part_ = strtol(part, &end, 0);
519 if (end == part) { 526 if (end == part) {
520 part_ = 0; 527 part_ = 0;
521 } 528 }
522 delete[] part; 529 delete[] part;
523 } 530 }
524 531
532 #elif V8_HOST_ARCH_PPC
533
534 #ifndef USE_SIMULATOR
535 #if V8_OS_LINUX
536 // Read processor info from /proc/self/auxv.
537 char* auxv_cpu_type = NULL;
538 unsigned auxv_cache_line_size = 0;
539 FILE* fp = fopen("/proc/self/auxv", "r");
540 if (fp != NULL) {
541 #if V8_TARGET_ARCH_PPC64
542 Elf64_auxv_t entry;
543 #else
544 Elf32_auxv_t entry;
525 #endif 545 #endif
546 for (;;) {
547 size_t n = fread(&entry, sizeof(entry), 1, fp);
548 if (n == 0 || entry.a_type == AT_NULL) {
549 break;
550 }
551 if (entry.a_type == AT_PLATFORM) {
552 auxv_cpu_type = reinterpret_cast<char*>(entry.a_un.a_val);
553 break;
554 } else if (entry.a_type == AT_DCACHEBSIZE ||
555 entry.a_type == AT_ICACHEBSIZE ||
556 entry.a_type == AT_UCACHEBSIZE) {
557 unsigned cachebsize = entry.a_un.a_val;
558 if (cachebsize > 0 &&
559 (auxv_cache_line_size == 0 || cachebsize < auxv_cache_line_size)) {
560 auxv_cache_line_size = cachebsize;
561 }
562 }
563 }
564 fclose(fp);
565 }
566
567 part_ = -1;
568 if (auxv_cpu_type) {
569 if (strcmp(auxv_cpu_type, "power8") == 0) {
570 part_ = PPC_POWER8;
571 } else if (strcmp(auxv_cpu_type, "power7") == 0) {
572 part_ = PPC_POWER7;
573 } else if (strcmp(auxv_cpu_type, "power6") == 0) {
574 part_ = PPC_POWER6;
575 } else if (strcmp(auxv_cpu_type, "power5") == 0) {
576 part_ = PPC_POWER5;
577 } else if (strcmp(auxv_cpu_type, "ppc970") == 0) {
578 part_ = PPC_G5;
579 } else if (strcmp(auxv_cpu_type, "ppc7450") == 0) {
580 part_ = PPC_G4;
581 } else if (strcmp(auxv_cpu_type, "pa6t") == 0) {
582 part_ = PPC_PA6T;
583 }
584 }
585
586 if (auxv_cache_line_size > 0) {
587 cache_line_size_ = auxv_cache_line_size;
588 }
589 #endif
590 #endif // !USE_SIMULATOR
591 #endif // V8_HOST_ARCH_PPC
526 } 592 }
527 593
528 } } // namespace v8::base 594 } } // namespace v8::base
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698