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3 <section id="pnacl-c-c-language-support"> | 3 <section id="pnacl-c-c-language-support"> |
4 <h1 id="pnacl-c-c-language-support">PNaCl C/C++ Language Support</h1> | 4 <h1 id="pnacl-c-c-language-support">PNaCl C/C++ Language Support</h1> |
5 <div class="contents local" id="contents" style="display: none"> | 5 <div class="contents local" id="contents" style="display: none"> |
6 <ul class="small-gap"> | 6 <ul class="small-gap"> |
7 <li><p class="first"><a class="reference internal" href="#source-language-suppor
t" id="id3">Source language support</a></p> | 7 <li><p class="first"><a class="reference internal" href="#source-language-suppor
t" id="id3">Source language support</a></p> |
8 <ul class="small-gap"> | 8 <ul class="small-gap"> |
9 <li><a class="reference internal" href="#versions" id="id4">Versions</a></li> | 9 <li><a class="reference internal" href="#versions" id="id4">Versions</a></li> |
10 <li><a class="reference internal" href="#preprocessor-definitions" id="id5">Prep
rocessor definitions</a></li> | 10 <li><a class="reference internal" href="#preprocessor-definitions" id="id5">Prep
rocessor definitions</a></li> |
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188 <p>NaCl supports a fairly wide subset of inline assembly through GCC’s | 188 <p>NaCl supports a fairly wide subset of inline assembly through GCC’s |
189 inline assembly syntax, with the restriction that the sandboxing model | 189 inline assembly syntax, with the restriction that the sandboxing model |
190 for the target architecture has to be respected.</p> | 190 for the target architecture has to be respected.</p> |
191 </section><section id="portable-simd-vectors"> | 191 </section><section id="portable-simd-vectors"> |
192 <span id="id2"></span><h2 id="portable-simd-vectors"><span id="id2"></span>Porta
ble SIMD Vectors</h2> | 192 <span id="id2"></span><h2 id="portable-simd-vectors"><span id="id2"></span>Porta
ble SIMD Vectors</h2> |
193 <p>SIMD vectors aren’t part of the C/C++ standards and are traditionally | 193 <p>SIMD vectors aren’t part of the C/C++ standards and are traditionally |
194 very hardware-specific. Portable Native Client offers a portable version | 194 very hardware-specific. Portable Native Client offers a portable version |
195 of SIMD vector datatypes and operations which map well to modern | 195 of SIMD vector datatypes and operations which map well to modern |
196 architectures and offer performance which matches or approaches | 196 architectures and offer performance which matches or approaches |
197 hardware-specific uses.</p> | 197 hardware-specific uses.</p> |
198 <p>SIMD vector support was added to Portable Native Client for version 37 | 198 <p>SIMD vector support was added to Portable Native Client for version 37 of Chr
ome |
199 of Chrome and more features, including performance enhancements, are | 199 and more features, including performance enhancements, have been added in |
200 expected to be added in subsequent releases.</p> | 200 subsequent releases, see the <a class="reference internal" href="/native-client/
sdk/release-notes.html#sdk-release-notes"><em>Release Notes</em></a> for more |
| 201 details.</p> |
201 <section id="hand-coding-vector-extensions"> | 202 <section id="hand-coding-vector-extensions"> |
202 <h3 id="hand-coding-vector-extensions">Hand-Coding Vector Extensions</h3> | 203 <h3 id="hand-coding-vector-extensions">Hand-Coding Vector Extensions</h3> |
203 <p>The initial vector support in Portable Native Client adds <a class="reference
external" href="http://clang.llvm.org/docs/LanguageExtensions.html#vectors-and-
extended-vectors">LLVM vectors</a> | 204 <p>The initial vector support in Portable Native Client adds <a class="reference
external" href="http://clang.llvm.org/docs/LanguageExtensions.html#vectors-and-
extended-vectors">LLVM vectors</a> |
204 and <a class="reference external" href="http://gcc.gnu.org/onlinedocs/gcc/Vector
-Extensions.html">GCC vectors</a> since these | 205 and <a class="reference external" href="http://gcc.gnu.org/onlinedocs/gcc/Vector
-Extensions.html">GCC vectors</a> since these |
205 are well supported by different hardware platforms and don’t require any | 206 are well supported by different hardware platforms and don’t require any |
206 new compiler intrinsics.</p> | 207 new compiler intrinsics.</p> |
207 <p>Vector types can be used through the <code>vector_size</code> attribute:</p> | 208 <p>Vector types can be used through the <code>vector_size</code> attribute:</p> |
208 <pre class="prettyprint"> | 209 <pre class="prettyprint"> |
209 #define VECTOR_BYTES 16 | 210 #define VECTOR_BYTES 16 |
210 typedef int v4s __attribute__((vector_size(VECTOR_BYTES))); | 211 typedef int v4s __attribute__((vector_size(VECTOR_BYTES))); |
211 v4s a = {1,2,3,4}; | 212 v4s a = {1,2,3,4}; |
212 v4s b = {5,6,7,8}; | 213 v4s b = {5,6,7,8}; |
213 v4s c, d, e; | 214 v4s c, d, e; |
214 c = a + b; /* c = {6,8,10,12} */ | 215 c = a + b; /* c = {6,8,10,12} */ |
215 d = b >> a; /* d = {2,1,0,0} */ | 216 d = b >> a; /* d = {2,1,0,0} */ |
216 </pre> | 217 </pre> |
217 <p>Vector comparisons are represented as a bitmask as wide as the compared | 218 <p>Vector comparisons are represented as a bitmask as wide as the compared |
218 elements of all <code>0</code> or all <code>1</code>:</p> | 219 elements of all <code>0</code> or all <code>1</code>:</p> |
219 <pre class="prettyprint"> | 220 <pre class="prettyprint"> |
220 typedef int v4s __attribute__((vector_size(16))); | 221 typedef int v4s __attribute__((vector_size(16))); |
221 v4s snip(v4s in) { | 222 v4s snip(v4s in) { |
222 v4s limit = {32,64,128,256}; | 223 v4s limit = {32,64,128,256}; |
223 v4s mask = in > limit; | 224 v4s mask = in > limit; |
224 v4s ret = in & mask; | 225 v4s ret = in & mask; |
225 return ret; | 226 return ret; |
226 } | 227 } |
227 </pre> | 228 </pre> |
228 <p>Vector datatypes are currently expected to be 128-bit wide with one of | 229 <p>Vector datatypes are currently expected to be 128-bit wide with one of the |
229 the following element types:</p> | 230 following element types, and they’re expected to be aligned to the underly
ing |
| 231 element’s bit width (loads and store will otherwise be broken up into scal
ar |
| 232 accesses to prevent faults):</p> |
230 <table border="1" class="docutils"> | 233 <table border="1" class="docutils"> |
231 <colgroup> | 234 <colgroup> |
232 </colgroup> | 235 </colgroup> |
233 <thead valign="bottom"> | 236 <thead valign="bottom"> |
234 <tr class="row-odd"><th class="head">Type</th> | 237 <tr class="row-odd"><th class="head">Type</th> |
235 <th class="head">Num Elements</th> | 238 <th class="head">Num Elements</th> |
236 <th class="head">Vector Bit Width</th> | 239 <th class="head">Vector Bit Width</th> |
| 240 <th class="head">Expected Bit Alignment</th> |
237 </tr> | 241 </tr> |
238 </thead> | 242 </thead> |
239 <tbody valign="top"> | 243 <tbody valign="top"> |
240 <tr class="row-even"><td><code>uint8_t</code></td> | 244 <tr class="row-even"><td><code>uint8_t</code></td> |
241 <td>16</td> | 245 <td>16</td> |
242 <td>128</td> | 246 <td>128</td> |
| 247 <td>8</td> |
243 </tr> | 248 </tr> |
244 <tr class="row-odd"><td><code>int8_t</code></td> | 249 <tr class="row-odd"><td><code>int8_t</code></td> |
245 <td>16</td> | 250 <td>16</td> |
246 <td>128</td> | 251 <td>128</td> |
| 252 <td>8</td> |
247 </tr> | 253 </tr> |
248 <tr class="row-even"><td><code>uint16_t</code></td> | 254 <tr class="row-even"><td><code>uint16_t</code></td> |
249 <td>8</td> | 255 <td>8</td> |
250 <td>128</td> | 256 <td>128</td> |
| 257 <td>16</td> |
251 </tr> | 258 </tr> |
252 <tr class="row-odd"><td><code>int16_t</code></td> | 259 <tr class="row-odd"><td><code>int16_t</code></td> |
253 <td>8</td> | 260 <td>8</td> |
254 <td>128</td> | 261 <td>128</td> |
| 262 <td>16</td> |
255 </tr> | 263 </tr> |
256 <tr class="row-even"><td><code>uint32_t</code></td> | 264 <tr class="row-even"><td><code>uint32_t</code></td> |
257 <td>4</td> | 265 <td>4</td> |
258 <td>128</td> | 266 <td>128</td> |
| 267 <td>32</td> |
259 </tr> | 268 </tr> |
260 <tr class="row-odd"><td><code>int32_t</code></td> | 269 <tr class="row-odd"><td><code>int32_t</code></td> |
261 <td>4</td> | 270 <td>4</td> |
262 <td>128</td> | 271 <td>128</td> |
| 272 <td>32</td> |
263 </tr> | 273 </tr> |
264 <tr class="row-even"><td><code>float</code></td> | 274 <tr class="row-even"><td><code>float</code></td> |
265 <td>4</td> | 275 <td>4</td> |
266 <td>128</td> | 276 <td>128</td> |
| 277 <td>32</td> |
267 </tr> | 278 </tr> |
268 </tbody> | 279 </tbody> |
269 </table> | 280 </table> |
270 <p>64-bit integers and double-precision floating point will be supported in | 281 <p>64-bit integers and double-precision floating point will be supported in |
271 a future release, as will 256-bit and 512-bit vectors.</p> | 282 a future release, as will 256-bit and 512-bit vectors.</p> |
| 283 <p>Vector element bit width alignment can be stated explicitly (this is assumed
by |
| 284 PNaCl, but not necessarily by other compilers), and smaller alignments can also |
| 285 be specified:</p> |
| 286 <pre class="prettyprint"> |
| 287 typedef int v4s_element __attribute__((vector_size(16), aligned(4))); |
| 288 typedef int v4s_unaligned __attribute__((vector_size(16), aligned(1))); |
| 289 </pre> |
272 <p>The following operators are supported on vectors:</p> | 290 <p>The following operators are supported on vectors:</p> |
273 <table border="1" class="docutils"> | 291 <table border="1" class="docutils"> |
274 <colgroup> | 292 <colgroup> |
275 </colgroup> | 293 </colgroup> |
276 <tbody valign="top"> | 294 <tbody valign="top"> |
277 <tr class="row-odd"><td>unary <code>+</code>, <code>-</code></td> | 295 <tr class="row-odd"><td>unary <code>+</code>, <code>-</code></td> |
278 </tr> | 296 </tr> |
279 <tr class="row-even"><td><code>++</code>, <code>--</code></td> | 297 <tr class="row-even"><td><code>++</code>, <code>--</code></td> |
280 </tr> | 298 </tr> |
281 <tr class="row-odd"><td><code>+</code>, <code>-</code>, <code>*</code>, <code>/<
/code>, <code>%</code></td> | 299 <tr class="row-odd"><td><code>+</code>, <code>-</code>, <code>*</code>, <code>/<
/code>, <code>%</code></td> |
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434 <p>Neither PNaCl nor NaCl currently support asynchronous interruption | 452 <p>Neither PNaCl nor NaCl currently support asynchronous interruption |
435 or suspension of threads.</p> | 453 or suspension of threads.</p> |
436 </li> | 454 </li> |
437 </ul> | 455 </ul> |
438 <p>If PNaCl were to support either of these, the interaction of | 456 <p>If PNaCl were to support either of these, the interaction of |
439 <code>volatile</code> and atomics with same-thread signal handling would need | 457 <code>volatile</code> and atomics with same-thread signal handling would need |
440 to be carefully detailed.</p> | 458 to be carefully detailed.</p> |
441 </section></section></section> | 459 </section></section></section> |
442 | 460 |
443 {{/partials.standard_nacl_article}} | 461 {{/partials.standard_nacl_article}} |
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