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Issue 419803005: PNaCl documentation: clarify vector alignment, and update navigation (Closed) Base URL: svn://svn.chromium.org/chrome/trunk/src
Patch Set: Revert weird edit. Created 6 years, 4 months ago
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1 {{+bindTo:partials.standard_nacl_article}} 1 {{+bindTo:partials.standard_nacl_article}}
2 2
3 <section id="pnacl-c-c-language-support"> 3 <section id="pnacl-c-c-language-support">
4 <h1 id="pnacl-c-c-language-support">PNaCl C/C++ Language Support</h1> 4 <h1 id="pnacl-c-c-language-support">PNaCl C/C++ Language Support</h1>
5 <div class="contents local" id="contents" style="display: none"> 5 <div class="contents local" id="contents" style="display: none">
6 <ul class="small-gap"> 6 <ul class="small-gap">
7 <li><p class="first"><a class="reference internal" href="#source-language-suppor t" id="id3">Source language support</a></p> 7 <li><p class="first"><a class="reference internal" href="#source-language-suppor t" id="id3">Source language support</a></p>
8 <ul class="small-gap"> 8 <ul class="small-gap">
9 <li><a class="reference internal" href="#versions" id="id4">Versions</a></li> 9 <li><a class="reference internal" href="#versions" id="id4">Versions</a></li>
10 <li><a class="reference internal" href="#preprocessor-definitions" id="id5">Prep rocessor definitions</a></li> 10 <li><a class="reference internal" href="#preprocessor-definitions" id="id5">Prep rocessor definitions</a></li>
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188 <p>NaCl supports a fairly wide subset of inline assembly through GCC&#8217;s 188 <p>NaCl supports a fairly wide subset of inline assembly through GCC&#8217;s
189 inline assembly syntax, with the restriction that the sandboxing model 189 inline assembly syntax, with the restriction that the sandboxing model
190 for the target architecture has to be respected.</p> 190 for the target architecture has to be respected.</p>
191 </section><section id="portable-simd-vectors"> 191 </section><section id="portable-simd-vectors">
192 <span id="id2"></span><h2 id="portable-simd-vectors"><span id="id2"></span>Porta ble SIMD Vectors</h2> 192 <span id="id2"></span><h2 id="portable-simd-vectors"><span id="id2"></span>Porta ble SIMD Vectors</h2>
193 <p>SIMD vectors aren&#8217;t part of the C/C++ standards and are traditionally 193 <p>SIMD vectors aren&#8217;t part of the C/C++ standards and are traditionally
194 very hardware-specific. Portable Native Client offers a portable version 194 very hardware-specific. Portable Native Client offers a portable version
195 of SIMD vector datatypes and operations which map well to modern 195 of SIMD vector datatypes and operations which map well to modern
196 architectures and offer performance which matches or approaches 196 architectures and offer performance which matches or approaches
197 hardware-specific uses.</p> 197 hardware-specific uses.</p>
198 <p>SIMD vector support was added to Portable Native Client for version 37 198 <p>SIMD vector support was added to Portable Native Client for version 37 of Chr ome
199 of Chrome and more features, including performance enhancements, are 199 and more features, including performance enhancements, have been added in
200 expected to be added in subsequent releases.</p> 200 subsequent releases.</p>
201 <section id="hand-coding-vector-extensions"> 201 <section id="hand-coding-vector-extensions">
202 <h3 id="hand-coding-vector-extensions">Hand-Coding Vector Extensions</h3> 202 <h3 id="hand-coding-vector-extensions">Hand-Coding Vector Extensions</h3>
203 <p>The initial vector support in Portable Native Client adds <a class="reference external" href="http://clang.llvm.org/docs/LanguageExtensions.html#vectors-and- extended-vectors">LLVM vectors</a> 203 <p>The initial vector support in Portable Native Client adds <a class="reference external" href="http://clang.llvm.org/docs/LanguageExtensions.html#vectors-and- extended-vectors">LLVM vectors</a>
204 and <a class="reference external" href="http://gcc.gnu.org/onlinedocs/gcc/Vector -Extensions.html">GCC vectors</a> since these 204 and <a class="reference external" href="http://gcc.gnu.org/onlinedocs/gcc/Vector -Extensions.html">GCC vectors</a> since these
205 are well supported by different hardware platforms and don&#8217;t require any 205 are well supported by different hardware platforms and don&#8217;t require any
206 new compiler intrinsics.</p> 206 new compiler intrinsics.</p>
207 <p>Vector types can be used through the <code>vector_size</code> attribute:</p> 207 <p>Vector types can be used through the <code>vector_size</code> attribute:</p>
208 <pre class="prettyprint"> 208 <pre class="prettyprint">
209 #define VECTOR_BYTES 16 209 #define VECTOR_BYTES 16
210 typedef int v4s __attribute__((vector_size(VECTOR_BYTES))); 210 typedef int v4s __attribute__((vector_size(VECTOR_BYTES)));
211 v4s a = {1,2,3,4}; 211 v4s a = {1,2,3,4};
212 v4s b = {5,6,7,8}; 212 v4s b = {5,6,7,8};
213 v4s c, d, e; 213 v4s c, d, e;
214 c = a + b; /* c = {6,8,10,12} */ 214 c = a + b; /* c = {6,8,10,12} */
215 d = b &gt;&gt; a; /* d = {2,1,0,0} */ 215 d = b &gt;&gt; a; /* d = {2,1,0,0} */
216 </pre> 216 </pre>
217 <p>Vector comparisons are represented as a bitmask as wide as the compared 217 <p>Vector comparisons are represented as a bitmask as wide as the compared
218 elements of all <code>0</code> or all <code>1</code>:</p> 218 elements of all <code>0</code> or all <code>1</code>:</p>
219 <pre class="prettyprint"> 219 <pre class="prettyprint">
220 typedef int v4s __attribute__((vector_size(16))); 220 typedef int v4s __attribute__((vector_size(16)));
221 v4s snip(v4s in) { 221 v4s snip(v4s in) {
222 v4s limit = {32,64,128,256}; 222 v4s limit = {32,64,128,256};
223 v4s mask = in &gt; limit; 223 v4s mask = in &gt; limit;
224 v4s ret = in &amp; mask; 224 v4s ret = in &amp; mask;
225 return ret; 225 return ret;
226 } 226 }
227 </pre> 227 </pre>
228 <p>Vector datatypes are currently expected to be 128-bit wide with one of 228 <p>Vector datatypes are currently expected to be 128-bit wide with one of the
229 the following element types:</p> 229 following element types, and they&#8217;re expected to be alignment to the under lying
230 element&#8217;s bit width (loads and store will otherwise be broken up into scal ar
231 accesses to prevent faults):</p>
230 <table border="1" class="docutils"> 232 <table border="1" class="docutils">
231 <colgroup> 233 <colgroup>
232 </colgroup> 234 </colgroup>
233 <thead valign="bottom"> 235 <thead valign="bottom">
234 <tr class="row-odd"><th class="head">Type</th> 236 <tr class="row-odd"><th class="head">Type</th>
235 <th class="head">Num Elements</th> 237 <th class="head">Num Elements</th>
236 <th class="head">Vector Bit Width</th> 238 <th class="head">Vector Bit Width</th>
239 <th class="head">Expected Bit Alignment</th>
237 </tr> 240 </tr>
238 </thead> 241 </thead>
239 <tbody valign="top"> 242 <tbody valign="top">
240 <tr class="row-even"><td><code>uint8_t</code></td> 243 <tr class="row-even"><td><code>uint8_t</code></td>
241 <td>16</td> 244 <td>16</td>
242 <td>128</td> 245 <td>128</td>
246 <td>8</td>
243 </tr> 247 </tr>
244 <tr class="row-odd"><td><code>int8_t</code></td> 248 <tr class="row-odd"><td><code>int8_t</code></td>
245 <td>16</td> 249 <td>16</td>
246 <td>128</td> 250 <td>128</td>
251 <td>8</td>
247 </tr> 252 </tr>
248 <tr class="row-even"><td><code>uint16_t</code></td> 253 <tr class="row-even"><td><code>uint16_t</code></td>
249 <td>8</td> 254 <td>8</td>
250 <td>128</td> 255 <td>128</td>
256 <td>16</td>
251 </tr> 257 </tr>
252 <tr class="row-odd"><td><code>int16_t</code></td> 258 <tr class="row-odd"><td><code>int16_t</code></td>
253 <td>8</td> 259 <td>8</td>
254 <td>128</td> 260 <td>128</td>
261 <td>16</td>
255 </tr> 262 </tr>
256 <tr class="row-even"><td><code>uint32_t</code></td> 263 <tr class="row-even"><td><code>uint32_t</code></td>
257 <td>4</td> 264 <td>4</td>
258 <td>128</td> 265 <td>128</td>
266 <td>32</td>
259 </tr> 267 </tr>
260 <tr class="row-odd"><td><code>int32_t</code></td> 268 <tr class="row-odd"><td><code>int32_t</code></td>
261 <td>4</td> 269 <td>4</td>
262 <td>128</td> 270 <td>128</td>
271 <td>32</td>
263 </tr> 272 </tr>
264 <tr class="row-even"><td><code>float</code></td> 273 <tr class="row-even"><td><code>float</code></td>
265 <td>4</td> 274 <td>4</td>
266 <td>128</td> 275 <td>128</td>
276 <td>32</td>
267 </tr> 277 </tr>
268 </tbody> 278 </tbody>
269 </table> 279 </table>
270 <p>64-bit integers and double-precision floating point will be supported in 280 <p>64-bit integers and double-precision floating point will be supported in
271 a future release, as will 256-bit and 512-bit vectors.</p> 281 a future release, as will 256-bit and 512-bit vectors.</p>
272 <p>The following operators are supported on vectors:</p> 282 <p>The following operators are supported on vectors:</p>
273 <table border="1" class="docutils"> 283 <table border="1" class="docutils">
274 <colgroup> 284 <colgroup>
275 </colgroup> 285 </colgroup>
276 <tbody valign="top"> 286 <tbody valign="top">
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434 <p>Neither PNaCl nor NaCl currently support asynchronous interruption 444 <p>Neither PNaCl nor NaCl currently support asynchronous interruption
435 or suspension of threads.</p> 445 or suspension of threads.</p>
436 </li> 446 </li>
437 </ul> 447 </ul>
438 <p>If PNaCl were to support either of these, the interaction of 448 <p>If PNaCl were to support either of these, the interaction of
439 <code>volatile</code> and atomics with same-thread signal handling would need 449 <code>volatile</code> and atomics with same-thread signal handling would need
440 to be carefully detailed.</p> 450 to be carefully detailed.</p>
441 </section></section></section> 451 </section></section></section>
442 452
443 {{/partials.standard_nacl_article}} 453 {{/partials.standard_nacl_article}}
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