[turbofan] Support for combining branches with <Operation>WithOverflow.

src/compiler/arm64/instruction-selector-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 92 matching lines @@
                      Node* node, ImmediateMode operand_mode) {
   Arm64OperandGenerator g(selector);
   selector->Emit(opcode, g.DefineAsRegister(node),
                  g.UseRegister(node->InputAt(0)),
                  g.UseOperand(node->InputAt(1), operand_mode));
 }
 
 
 // Shared routine for multiple binary operations.
 static void VisitBinop(InstructionSelector* selector, Node* node,
-                       ArchOpcode opcode, ImmediateMode operand_mode,
-                       bool commutative) {
-  VisitRRO(selector, opcode, node, operand_mode);
-}
-
-
-static void VisitBinopWithOverflow(InstructionSelector* selector, Node* node,
-                                   InstructionCode opcode) {
+                       InstructionCode opcode, ImmediateMode operand_mode,
+                       FlagsContinuation* cont) {
   Arm64OperandGenerator g(selector);
   Int32BinopMatcher m(node);
-  InstructionOperand* inputs[2];
+  InstructionOperand* inputs[4];
   size_t input_count = 0;
   InstructionOperand* outputs[2];
   size_t output_count = 0;
 
   inputs[input_count++] = g.UseRegister(m.left().node());
-  inputs[input_count++] = g.UseRegister(m.right().node());
+  inputs[input_count++] = g.UseOperand(m.right().node(), operand_mode);
 
-  // Define outputs depending on the projections.
-  Node* projections[2];
-  node->CollectProjections(ARRAY_SIZE(projections), projections);
-  if (projections[0]) {
-    outputs[output_count++] = g.DefineAsRegister(projections[0]);
+  if (cont->IsBranch()) {
+    inputs[input_count++] = g.Label(cont->true_block());
+    inputs[input_count++] = g.Label(cont->false_block());
   }
-  if (projections[1]) {
-    opcode |= FlagsModeField::encode(kFlags_set);
-    opcode |= FlagsConditionField::encode(kOverflow);
-    outputs[output_count++] = g.DefineAsRegister(projections[1]);
+
+  outputs[output_count++] = g.DefineAsRegister(node);
+  if (cont->IsSet()) {
+    outputs[output_count++] = g.DefineAsRegister(cont->result());
   }
 
   ASSERT_NE(0, input_count);
   ASSERT_NE(0, output_count);
   ASSERT_GE(ARRAY_SIZE(inputs), input_count);
   ASSERT_GE(ARRAY_SIZE(outputs), output_count);
 
-  selector->Emit(opcode, output_count, outputs, input_count, inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
+// Shared routine for multiple binary operations.
+static void VisitBinop(InstructionSelector* selector, Node* node,
+                       ArchOpcode opcode, ImmediateMode operand_mode) {
+  FlagsContinuation cont;
+  VisitBinop(selector, node, opcode, operand_mode);
+}
+
+
 void InstructionSelector::VisitLoad(Node* node) {
   MachineRepresentation rep = OpParameter<MachineRepresentation>(node);
   Arm64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
 
   InstructionOperand* result = rep == kMachineFloat64
                                    ? g.DefineAsDoubleRegister(node)
                                    : g.DefineAsRegister(node);
 
@@ skipping 87 matching lines @@
     Emit(opcode | AddressingModeField::encode(kMode_MRI), NULL,
          g.UseRegister(index), g.UseImmediate(base), val);
   } else {
     Emit(opcode | AddressingModeField::encode(kMode_MRR), NULL,
          g.UseRegister(base), g.UseRegister(index), val);
   }
 }
 
 
 void InstructionSelector::VisitWord32And(Node* node) {
-  VisitBinop(this, node, kArm64And32, kLogical32Imm, true);
+  VisitBinop(this, node, kArm64And32, kLogical32Imm);
 }
 
 
 void InstructionSelector::VisitWord64And(Node* node) {
-  VisitBinop(this, node, kArm64And, kLogical64Imm, true);
+  VisitBinop(this, node, kArm64And, kLogical64Imm);
 }
 
 
 void InstructionSelector::VisitWord32Or(Node* node) {
-  VisitBinop(this, node, kArm64Or32, kLogical32Imm, true);
+  VisitBinop(this, node, kArm64Or32, kLogical32Imm);
 }
 
 
 void InstructionSelector::VisitWord64Or(Node* node) {
-  VisitBinop(this, node, kArm64Or, kLogical64Imm, true);
+  VisitBinop(this, node, kArm64Or, kLogical64Imm);
 }
 
 
 template <typename T>
 static void VisitXor(InstructionSelector* selector, Node* node,
                      ArchOpcode xor_opcode, ArchOpcode not_opcode) {
   Arm64OperandGenerator g(selector);
   BinopMatcher<IntMatcher<T>, IntMatcher<T> > m(node);
   if (m.right().Is(-1)) {
     selector->Emit(not_opcode, g.DefineAsRegister(node),
                    g.UseRegister(m.left().node()));
   } else {
-    VisitBinop(selector, node, xor_opcode, kLogical32Imm, true);
+    VisitBinop(selector, node, xor_opcode, kLogical32Imm);
   }
 }
 
 
 void InstructionSelector::VisitWord32Xor(Node* node) {
   VisitXor<int32_t>(this, node, kArm64Xor32, kArm64Not32);
 }
 
 
 void InstructionSelector::VisitWord64Xor(Node* node) {
@@ skipping 25 matching lines @@
   VisitRRO(this, kArm64Sar32, node, kShift32Imm);
 }
 
 
 void InstructionSelector::VisitWord64Sar(Node* node) {
   VisitRRO(this, kArm64Sar, node, kShift64Imm);
 }
 
 
 void InstructionSelector::VisitInt32Add(Node* node) {
-  VisitBinop(this, node, kArm64Add32, kArithimeticImm, true);
-}
-
-
-void InstructionSelector::VisitInt32AddWithOverflow(Node* node) {
-  VisitBinopWithOverflow(this, node, kArm64Add32);
+  VisitBinop(this, node, kArm64Add32, kArithimeticImm);
 }
 
 
 void InstructionSelector::VisitInt64Add(Node* node) {
-  VisitBinop(this, node, kArm64Add, kArithimeticImm, true);
+  VisitBinop(this, node, kArm64Add, kArithimeticImm);
 }
 
 
 template <typename T>
 static void VisitSub(InstructionSelector* selector, Node* node,
                      ArchOpcode sub_opcode, ArchOpcode neg_opcode) {
   Arm64OperandGenerator g(selector);
   BinopMatcher<IntMatcher<T>, IntMatcher<T> > m(node);
   if (m.left().Is(0)) {
     selector->Emit(neg_opcode, g.DefineAsRegister(node),
                    g.UseRegister(m.right().node()));
   } else {
-    VisitBinop(selector, node, sub_opcode, kArithimeticImm, false);
+    VisitBinop(selector, node, sub_opcode, kArithimeticImm);
   }
 }
 
 
 void InstructionSelector::VisitInt32Sub(Node* node) {
   VisitSub<int32_t>(this, node, kArm64Sub32, kArm64Neg32);
 }
 
 
-void InstructionSelector::VisitInt32SubWithOverflow(Node* node) {
-  VisitBinopWithOverflow(this, node, kArm64Sub32);
-}
-
-
 void InstructionSelector::VisitInt64Sub(Node* node) {
   VisitSub<int64_t>(this, node, kArm64Sub, kArm64Neg);
 }
 
 
 void InstructionSelector::VisitInt32Mul(Node* node) {
   VisitRRR(this, kArm64Mul32, node);
 }
 
 
@@ skipping 101 matching lines @@
 
 
 void InstructionSelector::VisitFloat64Mod(Node* node) {
   Arm64OperandGenerator g(this);
   Emit(kArm64Float64Mod, g.DefineAsFixedDouble(node, d0),
        g.UseFixedDouble(node->InputAt(0), d0),
        g.UseFixedDouble(node->InputAt(1), d1))->MarkAsCall();
 }
 
 
+void InstructionSelector::VisitInt32AddWithOverflow(Node* node,
+                                                    FlagsContinuation* cont) {
+  VisitBinop(this, node, kArm64Add32, kArithimeticImm, cont);
+}
+
+
+void InstructionSelector::VisitInt32SubWithOverflow(Node* node,
+                                                    FlagsContinuation* cont) {
+  VisitBinop(this, node, kArm64Sub32, kArithimeticImm, cont);
+}
+
+
 // Shared routine for multiple compare operations.
 static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
                          InstructionOperand* left, InstructionOperand* right,
                          FlagsContinuation* cont) {
   Arm64OperandGenerator g(selector);
   opcode = cont->Encode(opcode);
   if (cont->IsBranch()) {
     selector->Emit(opcode, NULL, left, right, g.Label(cont->true_block()),
                    g.Label(cont->false_block()))->MarkAsControl();
   } else {
@@ skipping 156 matching lines @@
     ASSERT(deoptimization == NULL && continuation == NULL);
     Emit(kArm64Drop | MiscField::encode(aligned_push_count), NULL);
   }
 }
 
 #endif  // V8_TURBOFAN_TARGET
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8