[turbofan] Support for combining branches with <Operation>WithOverflow.

src/compiler/arm/instruction-selector-arm.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler-intrinsics.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 231 matching lines @@
     return true;
   }
   if (TryMatchShift(selector, opcode_return, node, &inputs[0], &inputs[1])) {
     *input_count_return = 2;
     return true;
   }
   return false;
 }
 
 
-// Shared routine for multiple binary operations.
 static void VisitBinop(InstructionSelector* selector, Node* node,
-                       InstructionCode opcode, InstructionCode reverse_opcode) {
+                       InstructionCode opcode, InstructionCode reverse_opcode,
+                       FlagsContinuation* cont) {
   ArmOperandGenerator g(selector);
   Int32BinopMatcher m(node);
-  InstructionOperand* inputs[3];
-  size_t input_count = 0;
-  InstructionOperand* outputs[1] = {g.DefineAsRegister(node)};
-  const size_t output_count = ARRAY_SIZE(outputs);
-
-  if (TryMatchImmediateOrShift(selector, &opcode, m.right().node(),
-                               &input_count, &inputs[1])) {
-    inputs[0] = g.UseRegister(m.left().node());
-    input_count++;
-  } else if (TryMatchImmediateOrShift(selector, &reverse_opcode,
-                                      m.left().node(), &input_count,
-                                      &inputs[1])) {
-    inputs[0] = g.UseRegister(m.right().node());
-    opcode = reverse_opcode;
-    input_count++;
-  } else {
-    opcode |= AddressingModeField::encode(kMode_Operand2_R);
-    inputs[input_count++] = g.UseRegister(m.left().node());
-    inputs[input_count++] = g.UseRegister(m.right().node());
-  }
-
-  ASSERT_NE(0, input_count);
-  ASSERT_GE(ARRAY_SIZE(inputs), input_count);
-  ASSERT_NE(kMode_None, AddressingModeField::decode(opcode));
-
-  selector->Emit(opcode, output_count, outputs, input_count, inputs);
-}
-
-
-static void VisitBinopWithOverflow(InstructionSelector* selector, Node* node,
-                                   InstructionCode opcode,
-                                   InstructionCode reverse_opcode) {
-  ArmOperandGenerator g(selector);
-  Int32BinopMatcher m(node);
-  InstructionOperand* inputs[3];
+  InstructionOperand* inputs[5];
   size_t input_count = 0;
   InstructionOperand* outputs[2];
   size_t output_count = 0;
 
   if (TryMatchImmediateOrShift(selector, &opcode, m.right().node(),
                                &input_count, &inputs[1])) {
     inputs[0] = g.UseRegister(m.left().node());
     input_count++;
   } else if (TryMatchImmediateOrShift(selector, &reverse_opcode,
                                       m.left().node(), &input_count,
                                       &inputs[1])) {
     inputs[0] = g.UseRegister(m.right().node());
     opcode = reverse_opcode;
     input_count++;
   } else {
     opcode |= AddressingModeField::encode(kMode_Operand2_R);
     inputs[input_count++] = g.UseRegister(m.left().node());
     inputs[input_count++] = g.UseRegister(m.right().node());
   }
 
-  // Define outputs depending on the projections.
-  Node* projections[2];
-  node->CollectProjections(ARRAY_SIZE(projections), projections);
-  if (projections[0]) {
-    outputs[output_count++] = g.DefineAsRegister(projections[0]);
+  if (cont->IsBranch()) {
+    inputs[input_count++] = g.Label(cont->true_block());
+    inputs[input_count++] = g.Label(cont->false_block());
   }
-  if (projections[1]) {
-    opcode |= FlagsModeField::encode(kFlags_set);
-    opcode |= FlagsConditionField::encode(kOverflow);
-    outputs[output_count++] = g.DefineAsRegister(projections[1]);
+
+  outputs[output_count++] = g.DefineAsRegister(node);
+  if (cont->IsSet()) {
+    outputs[output_count++] = g.DefineAsRegister(cont->result());
   }
 
   ASSERT_NE(0, input_count);
   ASSERT_NE(0, output_count);
   ASSERT_GE(ARRAY_SIZE(inputs), input_count);
   ASSERT_GE(ARRAY_SIZE(outputs), output_count);
   ASSERT_NE(kMode_None, AddressingModeField::decode(opcode));
 
-  selector->Emit(opcode, output_count, outputs, input_count, inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
+static void VisitBinop(InstructionSelector* selector, Node* node,
+                       InstructionCode opcode, InstructionCode reverse_opcode) {
+  FlagsContinuation cont;
+  VisitBinop(selector, node, opcode, reverse_opcode, &cont);
+}
+
+
 void InstructionSelector::VisitLoad(Node* node) {
   MachineRepresentation rep = OpParameter<MachineRepresentation>(node);
   ArmOperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
 
   InstructionOperand* result = rep == kMachineFloat64
                                    ? g.DefineAsDoubleRegister(node)
                                    : g.DefineAsRegister(node);
 
@@ skipping 246 matching lines @@
   if (m.right().IsInt32Mul() && CanCover(node, m.right().node())) {
     Int32BinopMatcher mright(m.right().node());
     Emit(kArmMla, g.DefineAsRegister(node), g.UseRegister(mright.left().node()),
          g.UseRegister(mright.right().node()), g.UseRegister(m.left().node()));
     return;
   }
   VisitBinop(this, node, kArmAdd, kArmAdd);
 }
 
 
-void InstructionSelector::VisitInt32AddWithOverflow(Node* node) {
-  VisitBinopWithOverflow(this, node, kArmAdd, kArmAdd);
-}
-
-
 void InstructionSelector::VisitInt32Sub(Node* node) {
   ArmOperandGenerator g(this);
   Int32BinopMatcher m(node);
   if (CpuFeatures::IsSupported(MLS) && m.right().IsInt32Mul() &&
       CanCover(node, m.right().node())) {
     Int32BinopMatcher mright(m.right().node());
     Emit(kArmMls, g.DefineAsRegister(node), g.UseRegister(mright.left().node()),
          g.UseRegister(mright.right().node()), g.UseRegister(m.left().node()));
     return;
   }
   VisitBinop(this, node, kArmSub, kArmRsb);
 }
 
 
-void InstructionSelector::VisitInt32SubWithOverflow(Node* node) {
-  VisitBinopWithOverflow(this, node, kArmSub, kArmRsb);
-}
-
-
 void InstructionSelector::VisitInt32Mul(Node* node) {
   ArmOperandGenerator g(this);
   Int32BinopMatcher m(node);
   if (m.right().HasValue() && m.right().Value() > 0) {
     int32_t value = m.right().Value();
     if (IsPowerOf2(value - 1)) {
       Emit(kArmAdd | AddressingModeField::encode(kMode_Operand2_R_LSL_I),
            g.DefineAsRegister(node), g.UseRegister(m.left().node()),
            g.UseRegister(m.left().node()),
            g.TempImmediate(WhichPowerOf2(value - 1)));
@@ skipping 226 matching lines @@
 
   // Caller clean up of stack for C-style calls.
   if (descriptor->kind() == CallDescriptor::kCallAddress &&
       buffer.pushed_count > 0) {
     ASSERT(deoptimization == NULL && continuation == NULL);
     Emit(kArmDrop | MiscField::encode(buffer.pushed_count), NULL);
   }
 }
 
 
+void InstructionSelector::VisitInt32AddWithOverflow(Node* node,
+                                                    FlagsContinuation* cont) {
+  VisitBinop(this, node, kArmAdd, kArmAdd, cont);
+}
+
+
+void InstructionSelector::VisitInt32SubWithOverflow(Node* node,
+                                                    FlagsContinuation* cont) {
+  VisitBinop(this, node, kArmSub, kArmRsb, cont);
+}
+
+
 // Shared routine for multiple compare operations.
 static void VisitWordCompare(InstructionSelector* selector, Node* node,
                              InstructionCode opcode, FlagsContinuation* cont,
-                             bool commutative, bool requires_output) {
+                             bool commutative) {
   ArmOperandGenerator g(selector);
   Int32BinopMatcher m(node);
   InstructionOperand* inputs[5];
   size_t input_count = 0;
   InstructionOperand* outputs[1];
   size_t output_count = 0;
 
   if (TryMatchImmediateOrShift(selector, &opcode, m.right().node(),
                                &input_count, &inputs[1])) {
     inputs[0] = g.UseRegister(m.left().node());
     input_count++;
   } else if (TryMatchImmediateOrShift(selector, &opcode, m.left().node(),
                                       &input_count, &inputs[1])) {
     if (!commutative) cont->Commute();
     inputs[0] = g.UseRegister(m.right().node());
     input_count++;
   } else {
     opcode |= AddressingModeField::encode(kMode_Operand2_R);
     inputs[input_count++] = g.UseRegister(m.left().node());
     inputs[input_count++] = g.UseRegister(m.right().node());
   }
 
   if (cont->IsBranch()) {
-    if (requires_output) {
-      outputs[output_count++] = g.DefineAsRegister(node);
-    }
     inputs[input_count++] = g.Label(cont->true_block());
     inputs[input_count++] = g.Label(cont->false_block());
   } else {
     ASSERT(cont->IsSet());
     outputs[output_count++] = g.DefineAsRegister(cont->result());
   }
 
   ASSERT_NE(0, input_count);
   ASSERT_GE(ARRAY_SIZE(inputs), input_count);
   ASSERT_GE(ARRAY_SIZE(outputs), output_count);
 
   Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
                                       outputs, input_count, inputs);
   if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
 void InstructionSelector::VisitWord32Test(Node* node, FlagsContinuation* cont) {
   switch (node->opcode()) {
     case IrOpcode::kInt32Add:
-      return VisitWordCompare(this, node, kArmCmn, cont, true, false);
+      return VisitWordCompare(this, node, kArmCmn, cont, true);
     case IrOpcode::kInt32Sub:
-      return VisitWordCompare(this, node, kArmCmp, cont, false, false);
+      return VisitWordCompare(this, node, kArmCmp, cont, false);
     case IrOpcode::kWord32And:
-      return VisitWordCompare(this, node, kArmTst, cont, true, false);
+      return VisitWordCompare(this, node, kArmTst, cont, true);
     case IrOpcode::kWord32Or:
-      return VisitWordCompare(this, node, kArmOrr, cont, true, true);
+      return VisitBinop(this, node, kArmOrr, kArmOrr, cont);
     case IrOpcode::kWord32Xor:
-      return VisitWordCompare(this, node, kArmTeq, cont, true, false);
+      return VisitWordCompare(this, node, kArmTeq, cont, true);
     default:
       break;
   }
 
   ArmOperandGenerator g(this);
   InstructionCode opcode =
       cont->Encode(kArmTst) | AddressingModeField::encode(kMode_Operand2_R);
   if (cont->IsBranch()) {
     Emit(opcode, NULL, g.UseRegister(node), g.UseRegister(node),
          g.Label(cont->true_block()),
          g.Label(cont->false_block()))->MarkAsControl();
   } else {
     Emit(opcode, g.DefineAsRegister(cont->result()), g.UseRegister(node),
          g.UseRegister(node));
   }
 }
 
 
 void InstructionSelector::VisitWord32Compare(Node* node,
                                              FlagsContinuation* cont) {
-  VisitWordCompare(this, node, kArmCmp, cont, false, false);
+  VisitWordCompare(this, node, kArmCmp, cont, false);
 }
 
 
 void InstructionSelector::VisitFloat64Compare(Node* node,
                                               FlagsContinuation* cont) {
   ArmOperandGenerator g(this);
   Float64BinopMatcher m(node);
   if (cont->IsBranch()) {
     Emit(cont->Encode(kArmVcmpF64), NULL, g.UseDoubleRegister(m.left().node()),
          g.UseDoubleRegister(m.right().node()), g.Label(cont->true_block()),
          g.Label(cont->false_block()))->MarkAsControl();
   } else {
     ASSERT(cont->IsSet());
     Emit(cont->Encode(kArmVcmpF64), g.DefineAsRegister(cont->result()),
          g.UseDoubleRegister(m.left().node()),
          g.UseDoubleRegister(m.right().node()));
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8