Chromium Code Reviews Chromium Code Reviews
Issue 412593002:
Lower icmp operations between vector values. (Closed)
Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master| OLD | NEW |
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| (Empty) | |
| 1 ; This file checks support for comparing vector values with the icmp | |
| 2 ; instruction. | |
| 3 | |
| 4 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s | |
|
jvoung (off chromium)
2014/07/23 19:02:12
Might be good to have a test that the sext peephol
wala
2014/07/23 20:40:36
Done.
| |
| 5 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck %s | |
| 6 ; RUN: %llvm2ice -O2 --verbose none %s \ | |
| 7 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj | |
| 8 ; RUN: %llvm2ice -Om1 --verbose none %s \ | |
| 9 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj | |
| 10 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s | |
| 11 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s | |
| 12 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ | |
| 13 ; RUN: | FileCheck --check-prefix=DUMP %s | |
| 14 | |
| 15 define <4 x i1> @test_icmp_v4i32_eq(<4 x i32> %a, <4 x i32> %b) { | |
| 16 entry: | |
| 17 %res = icmp eq <4 x i32> %a, %b | |
| 18 ret <4 x i1> %res | |
| 19 ; CHECK: pcmpeqd | |
| 20 } | |
| 21 | |
| 22 define <4 x i1> @test_icmp_v4i32_ne(<4 x i32> %a, <4 x i32> %b) { | |
| 23 entry: | |
| 24 %res = icmp ne <4 x i32> %a, %b | |
| 25 ret <4 x i1> %res | |
| 26 ; CHECK: pcmpeqd | |
| 27 ; CHECK: pxor | |
| 28 } | |
| 29 | |
| 30 define <4 x i1> @test_icmp_v4i32_sgt(<4 x i32> %a, <4 x i32> %b) { | |
| 31 entry: | |
| 32 %res = icmp sgt <4 x i32> %a, %b | |
| 33 ret <4 x i1> %res | |
| 34 ; CHECK: pcmpgtd | |
| 35 } | |
| 36 | |
| 37 define <4 x i1> @test_icmp_v4i32_sle(<4 x i32> %a, <4 x i32> %b) { | |
| 38 entry: | |
| 39 %res = icmp sle <4 x i32> %a, %b | |
| 40 ret <4 x i1> %res | |
| 41 ; CHECK: pcmpgtd | |
| 42 ; CHECK: pxor | |
| 43 } | |
| 44 | |
| 45 define <4 x i1> @test_icmp_v4i32_slt(<4 x i32> %a, <4 x i32> %b) { | |
| 46 entry: | |
| 47 %res = icmp slt <4 x i32> %a, %b | |
| 48 ret <4 x i1> %res | |
| 49 ; CHECK: pcmpgtd | |
| 50 } | |
| 51 | |
| 52 define <4 x i1> @test_icmp_v4i32_uge(<4 x i32> %a, <4 x i32> %b) { | |
| 53 entry: | |
| 54 %res = icmp uge <4 x i32> %a, %b | |
| 55 ret <4 x i1> %res | |
| 56 ; CHECK: pxor | |
| 57 ; CHECK: pcmpgtd | |
| 58 ; CHECK: pxor | |
| 59 } | |
| 60 | |
| 61 define <4 x i1> @test_icmp_v4i32_ugt(<4 x i32> %a, <4 x i32> %b) { | |
| 62 entry: | |
| 63 %res = icmp ugt <4 x i32> %a, %b | |
| 64 ret <4 x i1> %res | |
| 65 ; CHECK: pxor | |
| 66 ; CHECK: pcmpgtd | |
| 67 } | |
| 68 | |
| 69 define <4 x i1> @test_icmp_v4i32_ule(<4 x i32> %a, <4 x i32> %b) { | |
| 70 entry: | |
| 71 %res = icmp ule <4 x i32> %a, %b | |
| 72 ret <4 x i1> %res | |
| 73 ; CHECK: pxor | |
| 74 ; CHECK: pcmpgtd | |
| 75 ; CHECK: pxor | |
| 76 } | |
| 77 | |
| 78 define <4 x i1> @test_icmp_v4i32_ult(<4 x i32> %a, <4 x i32> %b) { | |
| 79 entry: | |
| 80 %res = icmp ult <4 x i32> %a, %b | |
| 81 ret <4 x i1> %res | |
| 82 ; CHECK: pxor | |
| 83 ; CHECK: pcmpgtd | |
| 84 } | |
| 85 | |
| 86 define <4 x i1> @test_icmp_v4i1_eq(<4 x i1> %a, <4 x i1> %b) { | |
| 87 entry: | |
| 88 %res = icmp eq <4 x i1> %a, %b | |
| 89 ret <4 x i1> %res | |
| 90 ; CHECK: pcmpeqd | |
| 91 } | |
| 92 | |
| 93 define <4 x i1> @test_icmp_v4i1_ne(<4 x i1> %a, <4 x i1> %b) { | |
| 94 entry: | |
| 95 %res = icmp ne <4 x i1> %a, %b | |
| 96 ret <4 x i1> %res | |
| 97 ; CHECK: pcmpeqd | |
| 98 ; CHECK: pxor | |
| 99 } | |
| 100 | |
| 101 define <4 x i1> @test_icmp_v4i1_sgt(<4 x i1> %a, <4 x i1> %b) { | |
| 102 entry: | |
| 103 %res = icmp sgt <4 x i1> %a, %b | |
| 104 ret <4 x i1> %res | |
| 105 ; CHECK: pcmpgtd | |
| 106 } | |
| 107 | |
| 108 define <4 x i1> @test_icmp_v4i1_sle(<4 x i1> %a, <4 x i1> %b) { | |
| 109 entry: | |
| 110 %res = icmp sle <4 x i1> %a, %b | |
| 111 ret <4 x i1> %res | |
| 112 ; CHECK: pcmpgtd | |
| 113 ; CHECK: pxor | |
| 114 } | |
| 115 | |
| 116 define <4 x i1> @test_icmp_v4i1_slt(<4 x i1> %a, <4 x i1> %b) { | |
| 117 entry: | |
| 118 %res = icmp slt <4 x i1> %a, %b | |
| 119 ret <4 x i1> %res | |
| 120 ; CHECK: pcmpgtd | |
| 121 } | |
| 122 | |
| 123 define <4 x i1> @test_icmp_v4i1_uge(<4 x i1> %a, <4 x i1> %b) { | |
| 124 entry: | |
| 125 %res = icmp uge <4 x i1> %a, %b | |
| 126 ret <4 x i1> %res | |
| 127 ; CHECK: pxor | |
| 128 ; CHECK: pcmpgtd | |
| 129 ; CHECK: pxor | |
| 130 } | |
| 131 | |
| 132 define <4 x i1> @test_icmp_v4i1_ugt(<4 x i1> %a, <4 x i1> %b) { | |
| 133 entry: | |
| 134 %res = icmp ugt <4 x i1> %a, %b | |
| 135 ret <4 x i1> %res | |
| 136 ; CHECK: pxor | |
| 137 ; CHECK: pcmpgtd | |
| 138 } | |
| 139 | |
| 140 define <4 x i1> @test_icmp_v4i1_ule(<4 x i1> %a, <4 x i1> %b) { | |
| 141 entry: | |
| 142 %res = icmp ule <4 x i1> %a, %b | |
| 143 ret <4 x i1> %res | |
| 144 ; CHECK: pxor | |
| 145 ; CHECK: pcmpgtd | |
| 146 ; CHECK: pxor | |
| 147 } | |
| 148 | |
| 149 define <4 x i1> @test_icmp_v4i1_ult(<4 x i1> %a, <4 x i1> %b) { | |
| 150 entry: | |
| 151 %res = icmp ult <4 x i1> %a, %b | |
| 152 ret <4 x i1> %res | |
| 153 ; CHECK: pxor | |
| 154 ; CHECK: pcmpgtd | |
| 155 } | |
| 156 | |
| 157 define <8 x i1> @test_icmp_v8i16_eq(<8 x i16> %a, <8 x i16> %b) { | |
| 158 entry: | |
| 159 %res = icmp eq <8 x i16> %a, %b | |
| 160 ret <8 x i1> %res | |
| 161 ; CHECK: pcmpeqw | |
| 162 } | |
| 163 | |
| 164 define <8 x i1> @test_icmp_v8i16_ne(<8 x i16> %a, <8 x i16> %b) { | |
| 165 entry: | |
| 166 %res = icmp ne <8 x i16> %a, %b | |
| 167 ret <8 x i1> %res | |
| 168 ; CHECK: pcmpeqw | |
| 169 ; CHECK: pxor | |
| 170 } | |
| 171 | |
| 172 define <8 x i1> @test_icmp_v8i16_sgt(<8 x i16> %a, <8 x i16> %b) { | |
| 173 entry: | |
| 174 %res = icmp sgt <8 x i16> %a, %b | |
| 175 ret <8 x i1> %res | |
| 176 ; CHECK: pcmpgtw | |
| 177 } | |
| 178 | |
| 179 define <8 x i1> @test_icmp_v8i16_sle(<8 x i16> %a, <8 x i16> %b) { | |
| 180 entry: | |
| 181 %res = icmp sle <8 x i16> %a, %b | |
| 182 ret <8 x i1> %res | |
| 183 ; CHECK: pcmpgtw | |
| 184 ; CHECK: pxor | |
| 185 } | |
| 186 | |
| 187 define <8 x i1> @test_icmp_v8i16_slt(<8 x i16> %a, <8 x i16> %b) { | |
| 188 entry: | |
| 189 %res = icmp slt <8 x i16> %a, %b | |
| 190 ret <8 x i1> %res | |
| 191 ; CHECK: pcmpgtw | |
| 192 } | |
| 193 | |
| 194 define <8 x i1> @test_icmp_v8i16_uge(<8 x i16> %a, <8 x i16> %b) { | |
| 195 entry: | |
| 196 %res = icmp uge <8 x i16> %a, %b | |
| 197 ret <8 x i1> %res | |
| 198 ; CHECK: pxor | |
| 199 ; CHECK: pcmpgtw | |
| 200 ; CHECK: pxor | |
| 201 } | |
| 202 | |
| 203 define <8 x i1> @test_icmp_v8i16_ugt(<8 x i16> %a, <8 x i16> %b) { | |
| 204 entry: | |
| 205 %res = icmp ugt <8 x i16> %a, %b | |
| 206 ret <8 x i1> %res | |
| 207 ; CHECK: pxor | |
| 208 ; CHECK: pcmpgtw | |
| 209 } | |
| 210 | |
| 211 define <8 x i1> @test_icmp_v8i16_ule(<8 x i16> %a, <8 x i16> %b) { | |
| 212 entry: | |
| 213 %res = icmp ule <8 x i16> %a, %b | |
| 214 ret <8 x i1> %res | |
| 215 ; CHECK: pxor | |
| 216 ; CHECK: pcmpgtw | |
| 217 ; CHECK: pxor | |
| 218 } | |
| 219 | |
| 220 define <8 x i1> @test_icmp_v8i16_ult(<8 x i16> %a, <8 x i16> %b) { | |
| 221 entry: | |
| 222 %res = icmp ult <8 x i16> %a, %b | |
| 223 ret <8 x i1> %res | |
| 224 ; CHECK: pxor | |
| 225 ; CHECK: pcmpgtw | |
| 226 } | |
| 227 | |
| 228 define <8 x i1> @test_icmp_v8i1_eq(<8 x i1> %a, <8 x i1> %b) { | |
| 229 entry: | |
| 230 %res = icmp eq <8 x i1> %a, %b | |
| 231 ret <8 x i1> %res | |
| 232 ; CHECK: pcmpeqw | |
| 233 } | |
| 234 | |
| 235 define <8 x i1> @test_icmp_v8i1_ne(<8 x i1> %a, <8 x i1> %b) { | |
| 236 entry: | |
| 237 %res = icmp ne <8 x i1> %a, %b | |
| 238 ret <8 x i1> %res | |
| 239 ; CHECK: pcmpeqw | |
| 240 ; CHECK: pxor | |
| 241 } | |
| 242 | |
| 243 define <8 x i1> @test_icmp_v8i1_sgt(<8 x i1> %a, <8 x i1> %b) { | |
| 244 entry: | |
| 245 %res = icmp sgt <8 x i1> %a, %b | |
| 246 ret <8 x i1> %res | |
| 247 ; CHECK: pcmpgtw | |
| 248 } | |
| 249 | |
| 250 define <8 x i1> @test_icmp_v8i1_sle(<8 x i1> %a, <8 x i1> %b) { | |
| 251 entry: | |
| 252 %res = icmp sle <8 x i1> %a, %b | |
| 253 ret <8 x i1> %res | |
| 254 ; CHECK: pcmpgtw | |
| 255 ; CHECK: pxor | |
| 256 } | |
| 257 | |
| 258 define <8 x i1> @test_icmp_v8i1_slt(<8 x i1> %a, <8 x i1> %b) { | |
| 259 entry: | |
| 260 %res = icmp slt <8 x i1> %a, %b | |
| 261 ret <8 x i1> %res | |
| 262 ; CHECK: pcmpgtw | |
| 263 } | |
| 264 | |
| 265 define <8 x i1> @test_icmp_v8i1_uge(<8 x i1> %a, <8 x i1> %b) { | |
| 266 entry: | |
| 267 %res = icmp uge <8 x i1> %a, %b | |
| 268 ret <8 x i1> %res | |
| 269 ; CHECK: pxor | |
| 270 ; CHECK: pcmpgtw | |
| 271 ; CHECK: pxor | |
| 272 } | |
| 273 | |
| 274 define <8 x i1> @test_icmp_v8i1_ugt(<8 x i1> %a, <8 x i1> %b) { | |
| 275 entry: | |
| 276 %res = icmp ugt <8 x i1> %a, %b | |
| 277 ret <8 x i1> %res | |
| 278 ; CHECK: pxor | |
| 279 ; CHECK: pcmpgtw | |
| 280 } | |
| 281 | |
| 282 define <8 x i1> @test_icmp_v8i1_ule(<8 x i1> %a, <8 x i1> %b) { | |
| 283 entry: | |
| 284 %res = icmp ule <8 x i1> %a, %b | |
| 285 ret <8 x i1> %res | |
| 286 ; CHECK: pxor | |
| 287 ; CHECK: pcmpgtw | |
| 288 ; CHECK: pxor | |
| 289 } | |
| 290 | |
| 291 define <8 x i1> @test_icmp_v8i1_ult(<8 x i1> %a, <8 x i1> %b) { | |
| 292 entry: | |
| 293 %res = icmp ult <8 x i1> %a, %b | |
| 294 ret <8 x i1> %res | |
| 295 ; CHECK: pxor | |
| 296 ; CHECK: pcmpgtw | |
| 297 } | |
| 298 | |
| 299 define <16 x i1> @test_icmp_v16i8_eq(<16 x i8> %a, <16 x i8> %b) { | |
| 300 entry: | |
| 301 %res = icmp eq <16 x i8> %a, %b | |
| 302 ret <16 x i1> %res | |
| 303 ; CHECK: pcmpeqb | |
| 304 } | |
| 305 | |
| 306 define <16 x i1> @test_icmp_v16i8_ne(<16 x i8> %a, <16 x i8> %b) { | |
| 307 entry: | |
| 308 %res = icmp ne <16 x i8> %a, %b | |
| 309 ret <16 x i1> %res | |
| 310 ; CHECK: pcmpeqb | |
| 311 ; CHECK: pxor | |
| 312 } | |
| 313 | |
| 314 define <16 x i1> @test_icmp_v16i8_sgt(<16 x i8> %a, <16 x i8> %b) { | |
| 315 entry: | |
| 316 %res = icmp sgt <16 x i8> %a, %b | |
| 317 ret <16 x i1> %res | |
| 318 ; CHECK: pcmpgtb | |
| 319 } | |
| 320 | |
| 321 define <16 x i1> @test_icmp_v16i8_sle(<16 x i8> %a, <16 x i8> %b) { | |
| 322 entry: | |
| 323 %res = icmp sle <16 x i8> %a, %b | |
| 324 ret <16 x i1> %res | |
| 325 ; CHECK: pcmpgtb | |
| 326 ; CHECK: pxor | |
| 327 } | |
| 328 | |
| 329 define <16 x i1> @test_icmp_v16i8_slt(<16 x i8> %a, <16 x i8> %b) { | |
| 330 entry: | |
| 331 %res = icmp slt <16 x i8> %a, %b | |
| 332 ret <16 x i1> %res | |
| 333 ; CHECK: pcmpgtb | |
| 334 } | |
| 335 | |
| 336 define <16 x i1> @test_icmp_v16i8_uge(<16 x i8> %a, <16 x i8> %b) { | |
| 337 entry: | |
| 338 %res = icmp uge <16 x i8> %a, %b | |
| 339 ret <16 x i1> %res | |
| 340 ; CHECK: pxor | |
| 341 ; CHECK: pcmpgtb | |
| 342 ; CHECK: pxor | |
| 343 } | |
| 344 | |
| 345 define <16 x i1> @test_icmp_v16i8_ugt(<16 x i8> %a, <16 x i8> %b) { | |
| 346 entry: | |
| 347 %res = icmp ugt <16 x i8> %a, %b | |
| 348 ret <16 x i1> %res | |
| 349 ; CHECK: pxor | |
| 350 ; CHECK: pcmpgtb | |
| 351 } | |
| 352 | |
| 353 define <16 x i1> @test_icmp_v16i8_ule(<16 x i8> %a, <16 x i8> %b) { | |
| 354 entry: | |
| 355 %res = icmp ule <16 x i8> %a, %b | |
| 356 ret <16 x i1> %res | |
| 357 ; CHECK: pxor | |
| 358 ; CHECK: pcmpgtb | |
| 359 ; CHECK: pxor | |
| 360 } | |
| 361 | |
| 362 define <16 x i1> @test_icmp_v16i8_ult(<16 x i8> %a, <16 x i8> %b) { | |
| 363 entry: | |
| 364 %res = icmp ult <16 x i8> %a, %b | |
| 365 ret <16 x i1> %res | |
| 366 ; CHECK: pxor | |
| 367 ; CHECK: pcmpgtb | |
| 368 } | |
| 369 | |
| 370 define <16 x i1> @test_icmp_v16i1_eq(<16 x i1> %a, <16 x i1> %b) { | |
| 371 entry: | |
| 372 %res = icmp eq <16 x i1> %a, %b | |
| 373 ret <16 x i1> %res | |
| 374 ; CHECK: pcmpeqb | |
| 375 } | |
| 376 | |
| 377 define <16 x i1> @test_icmp_v16i1_ne(<16 x i1> %a, <16 x i1> %b) { | |
| 378 entry: | |
| 379 %res = icmp ne <16 x i1> %a, %b | |
| 380 ret <16 x i1> %res | |
| 381 ; CHECK: pcmpeqb | |
| 382 ; CHECK: pxor | |
| 383 } | |
| 384 | |
| 385 define <16 x i1> @test_icmp_v16i1_sgt(<16 x i1> %a, <16 x i1> %b) { | |
| 386 entry: | |
| 387 %res = icmp sgt <16 x i1> %a, %b | |
| 388 ret <16 x i1> %res | |
| 389 ; CHECK: pcmpgtb | |
| 390 } | |
| 391 | |
| 392 define <16 x i1> @test_icmp_v16i1_sle(<16 x i1> %a, <16 x i1> %b) { | |
| 393 entry: | |
| 394 %res = icmp sle <16 x i1> %a, %b | |
| 395 ret <16 x i1> %res | |
| 396 ; CHECK: pcmpgtb | |
| 397 ; CHECK: pxor | |
| 398 } | |
| 399 | |
| 400 define <16 x i1> @test_icmp_v16i1_slt(<16 x i1> %a, <16 x i1> %b) { | |
| 401 entry: | |
| 402 %res = icmp slt <16 x i1> %a, %b | |
| 403 ret <16 x i1> %res | |
| 404 ; CHECK: pcmpgtb | |
| 405 } | |
| 406 | |
| 407 define <16 x i1> @test_icmp_v16i1_uge(<16 x i1> %a, <16 x i1> %b) { | |
| 408 entry: | |
| 409 %res = icmp uge <16 x i1> %a, %b | |
| 410 ret <16 x i1> %res | |
| 411 ; CHECK: pxor | |
| 412 ; CHECK: pcmpgtb | |
| 413 ; CHECK: pxor | |
| 414 } | |
| 415 | |
| 416 define <16 x i1> @test_icmp_v16i1_ugt(<16 x i1> %a, <16 x i1> %b) { | |
| 417 entry: | |
| 418 %res = icmp ugt <16 x i1> %a, %b | |
| 419 ret <16 x i1> %res | |
| 420 ; CHECK: pxor | |
| 421 ; CHECK: pcmpgtb | |
| 422 } | |
| 423 | |
| 424 define <16 x i1> @test_icmp_v16i1_ule(<16 x i1> %a, <16 x i1> %b) { | |
| 425 entry: | |
| 426 %res = icmp ule <16 x i1> %a, %b | |
| 427 ret <16 x i1> %res | |
| 428 ; CHECK: pxor | |
| 429 ; CHECK: pcmpgtb | |
| 430 ; CHECK: pxor | |
| 431 } | |
| 432 | |
| 433 define <16 x i1> @test_icmp_v16i1_ult(<16 x i1> %a, <16 x i1> %b) { | |
| 434 entry: | |
| 435 %res = icmp ult <16 x i1> %a, %b | |
| 436 ret <16 x i1> %res | |
| 437 ; CHECK: pxor | |
| 438 ; CHECK: pcmpgtb | |
| 439 } | |
| 440 | |
| 441 ; ERRORS-NOT: ICE translation error | |
| 442 ; DUMP-NOT: SZ | |
| OLD | NEW |
