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| 1 ; This file checks support for comparing vector values with the icmp |
| 2 ; instruction. |
| 3 |
| 4 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s |
| 5 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck %s |
| 6 ; RUN: %llvm2ice -O2 --verbose none %s \ |
| 7 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj |
| 8 ; RUN: %llvm2ice -Om1 --verbose none %s \ |
| 9 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj |
| 10 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
| 11 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s |
| 12 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ |
| 13 ; RUN: | FileCheck --check-prefix=DUMP %s |
| 14 |
| 15 ; Check that sext elimination occurs when the result of the comparison |
| 16 ; instruction is alrady sign extended. Sign extension to 4 x i32 uses |
| 17 ; the pslld instruction. |
| 18 define <4 x i32> @test_sext_elimination(<4 x i32> %a, <4 x i32> %b) { |
| 19 entry: |
| 20 %res.trunc = icmp eq <4 x i32> %a, %b |
| 21 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 22 ret <4 x i32> %res |
| 23 ; CHECK-LABEL: test_sext_elimination: |
| 24 ; CHECK: pcmpeqd |
| 25 ; CHECK-NOT: pslld |
| 26 } |
| 27 |
| 28 define <4 x i1> @test_icmp_v4i32_eq(<4 x i32> %a, <4 x i32> %b) { |
| 29 entry: |
| 30 %res = icmp eq <4 x i32> %a, %b |
| 31 ret <4 x i1> %res |
| 32 ; CHECK-LABEL: test_icmp_v4i32_eq: |
| 33 ; CHECK: pcmpeqd |
| 34 } |
| 35 |
| 36 define <4 x i1> @test_icmp_v4i32_ne(<4 x i32> %a, <4 x i32> %b) { |
| 37 entry: |
| 38 %res = icmp ne <4 x i32> %a, %b |
| 39 ret <4 x i1> %res |
| 40 ; CHECK-LABEL: test_icmp_v4i32_ne: |
| 41 ; CHECK: pcmpeqd |
| 42 ; CHECK: pxor |
| 43 } |
| 44 |
| 45 define <4 x i1> @test_icmp_v4i32_sgt(<4 x i32> %a, <4 x i32> %b) { |
| 46 entry: |
| 47 %res = icmp sgt <4 x i32> %a, %b |
| 48 ret <4 x i1> %res |
| 49 ; CHECK: pcmpgtd |
| 50 } |
| 51 |
| 52 define <4 x i1> @test_icmp_v4i32_sle(<4 x i32> %a, <4 x i32> %b) { |
| 53 entry: |
| 54 %res = icmp sle <4 x i32> %a, %b |
| 55 ret <4 x i1> %res |
| 56 ; CHECK-LABEL: test_icmp_v4i32_sle: |
| 57 ; CHECK: pcmpgtd |
| 58 ; CHECK: pxor |
| 59 } |
| 60 |
| 61 define <4 x i1> @test_icmp_v4i32_slt(<4 x i32> %a, <4 x i32> %b) { |
| 62 entry: |
| 63 %res = icmp slt <4 x i32> %a, %b |
| 64 ret <4 x i1> %res |
| 65 ; CHECK-LABEL: test_icmp_v4i32_slt: |
| 66 ; CHECK: pcmpgtd |
| 67 } |
| 68 |
| 69 define <4 x i1> @test_icmp_v4i32_uge(<4 x i32> %a, <4 x i32> %b) { |
| 70 entry: |
| 71 %res = icmp uge <4 x i32> %a, %b |
| 72 ret <4 x i1> %res |
| 73 ; CHECK-LABEL: test_icmp_v4i32_uge: |
| 74 ; CHECK: pxor |
| 75 ; CHECK: pcmpgtd |
| 76 ; CHECK: pxor |
| 77 } |
| 78 |
| 79 define <4 x i1> @test_icmp_v4i32_ugt(<4 x i32> %a, <4 x i32> %b) { |
| 80 entry: |
| 81 %res = icmp ugt <4 x i32> %a, %b |
| 82 ret <4 x i1> %res |
| 83 ; CHECK-LABEL: test_icmp_v4i32_ugt: |
| 84 ; CHECK: pxor |
| 85 ; CHECK: pcmpgtd |
| 86 } |
| 87 |
| 88 define <4 x i1> @test_icmp_v4i32_ule(<4 x i32> %a, <4 x i32> %b) { |
| 89 entry: |
| 90 %res = icmp ule <4 x i32> %a, %b |
| 91 ret <4 x i1> %res |
| 92 ; CHECK-LABEL: test_icmp_v4i32_ule: |
| 93 ; CHECK: pxor |
| 94 ; CHECK: pcmpgtd |
| 95 ; CHECK: pxor |
| 96 } |
| 97 |
| 98 define <4 x i1> @test_icmp_v4i32_ult(<4 x i32> %a, <4 x i32> %b) { |
| 99 entry: |
| 100 %res = icmp ult <4 x i32> %a, %b |
| 101 ret <4 x i1> %res |
| 102 ; CHECK-LABEL: test_icmp_v4i32_ult: |
| 103 ; CHECK: pxor |
| 104 ; CHECK: pcmpgtd |
| 105 } |
| 106 |
| 107 define <4 x i1> @test_icmp_v4i1_eq(<4 x i1> %a, <4 x i1> %b) { |
| 108 entry: |
| 109 %res = icmp eq <4 x i1> %a, %b |
| 110 ret <4 x i1> %res |
| 111 ; CHECK-LABEL: test_icmp_v4i1_eq: |
| 112 ; CHECK: pcmpeqd |
| 113 } |
| 114 |
| 115 define <4 x i1> @test_icmp_v4i1_ne(<4 x i1> %a, <4 x i1> %b) { |
| 116 entry: |
| 117 %res = icmp ne <4 x i1> %a, %b |
| 118 ret <4 x i1> %res |
| 119 ; CHECK-LABEL: test_icmp_v4i1_ne: |
| 120 ; CHECK: pcmpeqd |
| 121 ; CHECK: pxor |
| 122 } |
| 123 |
| 124 define <4 x i1> @test_icmp_v4i1_sgt(<4 x i1> %a, <4 x i1> %b) { |
| 125 entry: |
| 126 %res = icmp sgt <4 x i1> %a, %b |
| 127 ret <4 x i1> %res |
| 128 ; CHECK-LABEL: test_icmp_v4i1_sgt: |
| 129 ; CHECK: pcmpgtd |
| 130 } |
| 131 |
| 132 define <4 x i1> @test_icmp_v4i1_sle(<4 x i1> %a, <4 x i1> %b) { |
| 133 entry: |
| 134 %res = icmp sle <4 x i1> %a, %b |
| 135 ret <4 x i1> %res |
| 136 ; CHECK-LABEL: test_icmp_v4i1_sle: |
| 137 ; CHECK: pcmpgtd |
| 138 ; CHECK: pxor |
| 139 } |
| 140 |
| 141 define <4 x i1> @test_icmp_v4i1_slt(<4 x i1> %a, <4 x i1> %b) { |
| 142 entry: |
| 143 %res = icmp slt <4 x i1> %a, %b |
| 144 ret <4 x i1> %res |
| 145 ; CHECK-LABEL: test_icmp_v4i1_slt: |
| 146 ; CHECK: pcmpgtd |
| 147 } |
| 148 |
| 149 define <4 x i1> @test_icmp_v4i1_uge(<4 x i1> %a, <4 x i1> %b) { |
| 150 entry: |
| 151 %res = icmp uge <4 x i1> %a, %b |
| 152 ret <4 x i1> %res |
| 153 ; CHECK-LABEL: test_icmp_v4i1_uge: |
| 154 ; CHECK: pxor |
| 155 ; CHECK: pcmpgtd |
| 156 ; CHECK: pxor |
| 157 } |
| 158 |
| 159 define <4 x i1> @test_icmp_v4i1_ugt(<4 x i1> %a, <4 x i1> %b) { |
| 160 entry: |
| 161 %res = icmp ugt <4 x i1> %a, %b |
| 162 ret <4 x i1> %res |
| 163 ; CHECK-LABEL: test_icmp_v4i1_ugt: |
| 164 ; CHECK: pxor |
| 165 ; CHECK: pcmpgtd |
| 166 } |
| 167 |
| 168 define <4 x i1> @test_icmp_v4i1_ule(<4 x i1> %a, <4 x i1> %b) { |
| 169 entry: |
| 170 %res = icmp ule <4 x i1> %a, %b |
| 171 ret <4 x i1> %res |
| 172 ; CHECK-LABEL: test_icmp_v4i1_ule: |
| 173 ; CHECK: pxor |
| 174 ; CHECK: pcmpgtd |
| 175 ; CHECK: pxor |
| 176 } |
| 177 |
| 178 define <4 x i1> @test_icmp_v4i1_ult(<4 x i1> %a, <4 x i1> %b) { |
| 179 entry: |
| 180 %res = icmp ult <4 x i1> %a, %b |
| 181 ret <4 x i1> %res |
| 182 ; CHECK-LABEL: test_icmp_v4i1_ult: |
| 183 ; CHECK: pxor |
| 184 ; CHECK: pcmpgtd |
| 185 } |
| 186 |
| 187 define <8 x i1> @test_icmp_v8i16_eq(<8 x i16> %a, <8 x i16> %b) { |
| 188 entry: |
| 189 %res = icmp eq <8 x i16> %a, %b |
| 190 ret <8 x i1> %res |
| 191 ; CHECK-LABEL: test_icmp_v8i16_eq: |
| 192 ; CHECK: pcmpeqw |
| 193 } |
| 194 |
| 195 define <8 x i1> @test_icmp_v8i16_ne(<8 x i16> %a, <8 x i16> %b) { |
| 196 entry: |
| 197 %res = icmp ne <8 x i16> %a, %b |
| 198 ret <8 x i1> %res |
| 199 ; CHECK-LABEL: test_icmp_v8i16_ne: |
| 200 ; CHECK: pcmpeqw |
| 201 ; CHECK: pxor |
| 202 } |
| 203 |
| 204 define <8 x i1> @test_icmp_v8i16_sgt(<8 x i16> %a, <8 x i16> %b) { |
| 205 entry: |
| 206 %res = icmp sgt <8 x i16> %a, %b |
| 207 ret <8 x i1> %res |
| 208 ; CHECK-LABEL: test_icmp_v8i16_sgt: |
| 209 ; CHECK: pcmpgtw |
| 210 } |
| 211 |
| 212 define <8 x i1> @test_icmp_v8i16_sle(<8 x i16> %a, <8 x i16> %b) { |
| 213 entry: |
| 214 %res = icmp sle <8 x i16> %a, %b |
| 215 ret <8 x i1> %res |
| 216 ; CHECK-LABEL: test_icmp_v8i16_sle: |
| 217 ; CHECK: pcmpgtw |
| 218 ; CHECK: pxor |
| 219 } |
| 220 |
| 221 define <8 x i1> @test_icmp_v8i16_slt(<8 x i16> %a, <8 x i16> %b) { |
| 222 entry: |
| 223 %res = icmp slt <8 x i16> %a, %b |
| 224 ret <8 x i1> %res |
| 225 ; CHECK-LABEL: test_icmp_v8i16_slt: |
| 226 ; CHECK: pcmpgtw |
| 227 } |
| 228 |
| 229 define <8 x i1> @test_icmp_v8i16_uge(<8 x i16> %a, <8 x i16> %b) { |
| 230 entry: |
| 231 %res = icmp uge <8 x i16> %a, %b |
| 232 ret <8 x i1> %res |
| 233 ; CHECK-LABEL: test_icmp_v8i16_uge: |
| 234 ; CHECK: pxor |
| 235 ; CHECK: pcmpgtw |
| 236 ; CHECK: pxor |
| 237 } |
| 238 |
| 239 define <8 x i1> @test_icmp_v8i16_ugt(<8 x i16> %a, <8 x i16> %b) { |
| 240 entry: |
| 241 %res = icmp ugt <8 x i16> %a, %b |
| 242 ret <8 x i1> %res |
| 243 ; CHECK-LABEL: test_icmp_v8i16_ugt: |
| 244 ; CHECK: pxor |
| 245 ; CHECK: pcmpgtw |
| 246 } |
| 247 |
| 248 define <8 x i1> @test_icmp_v8i16_ule(<8 x i16> %a, <8 x i16> %b) { |
| 249 entry: |
| 250 %res = icmp ule <8 x i16> %a, %b |
| 251 ret <8 x i1> %res |
| 252 ; CHECK-LABEL: test_icmp_v8i16_ule: |
| 253 ; CHECK: pxor |
| 254 ; CHECK: pcmpgtw |
| 255 ; CHECK: pxor |
| 256 } |
| 257 |
| 258 define <8 x i1> @test_icmp_v8i16_ult(<8 x i16> %a, <8 x i16> %b) { |
| 259 entry: |
| 260 %res = icmp ult <8 x i16> %a, %b |
| 261 ret <8 x i1> %res |
| 262 ; CHECK-LABEL: test_icmp_v8i16_ult: |
| 263 ; CHECK: pxor |
| 264 ; CHECK: pcmpgtw |
| 265 } |
| 266 |
| 267 define <8 x i1> @test_icmp_v8i1_eq(<8 x i1> %a, <8 x i1> %b) { |
| 268 entry: |
| 269 %res = icmp eq <8 x i1> %a, %b |
| 270 ret <8 x i1> %res |
| 271 ; CHECK-LABEL: test_icmp_v8i1_eq: |
| 272 ; CHECK: pcmpeqw |
| 273 } |
| 274 |
| 275 define <8 x i1> @test_icmp_v8i1_ne(<8 x i1> %a, <8 x i1> %b) { |
| 276 entry: |
| 277 %res = icmp ne <8 x i1> %a, %b |
| 278 ret <8 x i1> %res |
| 279 ; CHECK-LABEL: test_icmp_v8i1_ne: |
| 280 ; CHECK: pcmpeqw |
| 281 ; CHECK: pxor |
| 282 } |
| 283 |
| 284 define <8 x i1> @test_icmp_v8i1_sgt(<8 x i1> %a, <8 x i1> %b) { |
| 285 entry: |
| 286 %res = icmp sgt <8 x i1> %a, %b |
| 287 ret <8 x i1> %res |
| 288 ; CHECK-LABEL: test_icmp_v8i1_sgt: |
| 289 ; CHECK: pcmpgtw |
| 290 } |
| 291 |
| 292 define <8 x i1> @test_icmp_v8i1_sle(<8 x i1> %a, <8 x i1> %b) { |
| 293 entry: |
| 294 %res = icmp sle <8 x i1> %a, %b |
| 295 ret <8 x i1> %res |
| 296 ; CHECK-LABEL: test_icmp_v8i1_sle: |
| 297 ; CHECK: pcmpgtw |
| 298 ; CHECK: pxor |
| 299 } |
| 300 |
| 301 define <8 x i1> @test_icmp_v8i1_slt(<8 x i1> %a, <8 x i1> %b) { |
| 302 entry: |
| 303 %res = icmp slt <8 x i1> %a, %b |
| 304 ret <8 x i1> %res |
| 305 ; CHECK-LABEL: test_icmp_v8i1_slt: |
| 306 ; CHECK: pcmpgtw |
| 307 } |
| 308 |
| 309 define <8 x i1> @test_icmp_v8i1_uge(<8 x i1> %a, <8 x i1> %b) { |
| 310 entry: |
| 311 %res = icmp uge <8 x i1> %a, %b |
| 312 ret <8 x i1> %res |
| 313 ; CHECK-LABEL: test_icmp_v8i1_uge: |
| 314 ; CHECK: pxor |
| 315 ; CHECK: pcmpgtw |
| 316 ; CHECK: pxor |
| 317 } |
| 318 |
| 319 define <8 x i1> @test_icmp_v8i1_ugt(<8 x i1> %a, <8 x i1> %b) { |
| 320 entry: |
| 321 %res = icmp ugt <8 x i1> %a, %b |
| 322 ret <8 x i1> %res |
| 323 ; CHECK-LABEL: test_icmp_v8i1_ugt: |
| 324 ; CHECK: pxor |
| 325 ; CHECK: pcmpgtw |
| 326 } |
| 327 |
| 328 define <8 x i1> @test_icmp_v8i1_ule(<8 x i1> %a, <8 x i1> %b) { |
| 329 entry: |
| 330 %res = icmp ule <8 x i1> %a, %b |
| 331 ret <8 x i1> %res |
| 332 ; CHECK-LABEL: test_icmp_v8i1_ule: |
| 333 ; CHECK: pxor |
| 334 ; CHECK: pcmpgtw |
| 335 ; CHECK: pxor |
| 336 } |
| 337 |
| 338 define <8 x i1> @test_icmp_v8i1_ult(<8 x i1> %a, <8 x i1> %b) { |
| 339 entry: |
| 340 %res = icmp ult <8 x i1> %a, %b |
| 341 ret <8 x i1> %res |
| 342 ; CHECK-LABEL: test_icmp_v8i1_ult: |
| 343 ; CHECK: pxor |
| 344 ; CHECK: pcmpgtw |
| 345 } |
| 346 |
| 347 define <16 x i1> @test_icmp_v16i8_eq(<16 x i8> %a, <16 x i8> %b) { |
| 348 entry: |
| 349 %res = icmp eq <16 x i8> %a, %b |
| 350 ret <16 x i1> %res |
| 351 ; CHECK-LABEL: test_icmp_v16i8_eq: |
| 352 ; CHECK: pcmpeqb |
| 353 } |
| 354 |
| 355 define <16 x i1> @test_icmp_v16i8_ne(<16 x i8> %a, <16 x i8> %b) { |
| 356 entry: |
| 357 %res = icmp ne <16 x i8> %a, %b |
| 358 ret <16 x i1> %res |
| 359 ; CHECK-LABEL: test_icmp_v16i8_ne: |
| 360 ; CHECK: pcmpeqb |
| 361 ; CHECK: pxor |
| 362 } |
| 363 |
| 364 define <16 x i1> @test_icmp_v16i8_sgt(<16 x i8> %a, <16 x i8> %b) { |
| 365 entry: |
| 366 %res = icmp sgt <16 x i8> %a, %b |
| 367 ret <16 x i1> %res |
| 368 ; CHECK-LABEL: test_icmp_v16i8_sgt: |
| 369 ; CHECK: pcmpgtb |
| 370 } |
| 371 |
| 372 define <16 x i1> @test_icmp_v16i8_sle(<16 x i8> %a, <16 x i8> %b) { |
| 373 entry: |
| 374 %res = icmp sle <16 x i8> %a, %b |
| 375 ret <16 x i1> %res |
| 376 ; CHECK-LABEL: test_icmp_v16i8_sle: |
| 377 ; CHECK: pcmpgtb |
| 378 ; CHECK: pxor |
| 379 } |
| 380 |
| 381 define <16 x i1> @test_icmp_v16i8_slt(<16 x i8> %a, <16 x i8> %b) { |
| 382 entry: |
| 383 %res = icmp slt <16 x i8> %a, %b |
| 384 ret <16 x i1> %res |
| 385 ; CHECK-LABEL: test_icmp_v16i8_slt: |
| 386 ; CHECK: pcmpgtb |
| 387 } |
| 388 |
| 389 define <16 x i1> @test_icmp_v16i8_uge(<16 x i8> %a, <16 x i8> %b) { |
| 390 entry: |
| 391 %res = icmp uge <16 x i8> %a, %b |
| 392 ret <16 x i1> %res |
| 393 ; CHECK-LABEL: test_icmp_v16i8_uge: |
| 394 ; CHECK: pxor |
| 395 ; CHECK: pcmpgtb |
| 396 ; CHECK: pxor |
| 397 } |
| 398 |
| 399 define <16 x i1> @test_icmp_v16i8_ugt(<16 x i8> %a, <16 x i8> %b) { |
| 400 entry: |
| 401 %res = icmp ugt <16 x i8> %a, %b |
| 402 ret <16 x i1> %res |
| 403 ; CHECK-LABEL: test_icmp_v16i8_ugt: |
| 404 ; CHECK: pxor |
| 405 ; CHECK: pcmpgtb |
| 406 } |
| 407 |
| 408 define <16 x i1> @test_icmp_v16i8_ule(<16 x i8> %a, <16 x i8> %b) { |
| 409 entry: |
| 410 %res = icmp ule <16 x i8> %a, %b |
| 411 ret <16 x i1> %res |
| 412 ; CHECK-LABEL: test_icmp_v16i8_ule: |
| 413 ; CHECK: pxor |
| 414 ; CHECK: pcmpgtb |
| 415 ; CHECK: pxor |
| 416 } |
| 417 |
| 418 define <16 x i1> @test_icmp_v16i8_ult(<16 x i8> %a, <16 x i8> %b) { |
| 419 entry: |
| 420 %res = icmp ult <16 x i8> %a, %b |
| 421 ret <16 x i1> %res |
| 422 ; CHECK-LABEL: test_icmp_v16i8_ult: |
| 423 ; CHECK: pxor |
| 424 ; CHECK: pcmpgtb |
| 425 } |
| 426 |
| 427 define <16 x i1> @test_icmp_v16i1_eq(<16 x i1> %a, <16 x i1> %b) { |
| 428 entry: |
| 429 %res = icmp eq <16 x i1> %a, %b |
| 430 ret <16 x i1> %res |
| 431 ; CHECK-LABEL: test_icmp_v16i1_eq: |
| 432 ; CHECK: pcmpeqb |
| 433 } |
| 434 |
| 435 define <16 x i1> @test_icmp_v16i1_ne(<16 x i1> %a, <16 x i1> %b) { |
| 436 entry: |
| 437 %res = icmp ne <16 x i1> %a, %b |
| 438 ret <16 x i1> %res |
| 439 ; CHECK-LABEL: test_icmp_v16i1_ne: |
| 440 ; CHECK: pcmpeqb |
| 441 ; CHECK: pxor |
| 442 } |
| 443 |
| 444 define <16 x i1> @test_icmp_v16i1_sgt(<16 x i1> %a, <16 x i1> %b) { |
| 445 entry: |
| 446 %res = icmp sgt <16 x i1> %a, %b |
| 447 ret <16 x i1> %res |
| 448 ; CHECK-LABEL: test_icmp_v16i1_sgt: |
| 449 ; CHECK: pcmpgtb |
| 450 } |
| 451 |
| 452 define <16 x i1> @test_icmp_v16i1_sle(<16 x i1> %a, <16 x i1> %b) { |
| 453 entry: |
| 454 %res = icmp sle <16 x i1> %a, %b |
| 455 ret <16 x i1> %res |
| 456 ; CHECK-LABEL: test_icmp_v16i1_sle: |
| 457 ; CHECK: pcmpgtb |
| 458 ; CHECK: pxor |
| 459 } |
| 460 |
| 461 define <16 x i1> @test_icmp_v16i1_slt(<16 x i1> %a, <16 x i1> %b) { |
| 462 entry: |
| 463 %res = icmp slt <16 x i1> %a, %b |
| 464 ret <16 x i1> %res |
| 465 ; CHECK-LABEL: test_icmp_v16i1_slt: |
| 466 ; CHECK: pcmpgtb |
| 467 } |
| 468 |
| 469 define <16 x i1> @test_icmp_v16i1_uge(<16 x i1> %a, <16 x i1> %b) { |
| 470 entry: |
| 471 %res = icmp uge <16 x i1> %a, %b |
| 472 ret <16 x i1> %res |
| 473 ; CHECK-LABEL: test_icmp_v16i1_uge: |
| 474 ; CHECK: pxor |
| 475 ; CHECK: pcmpgtb |
| 476 ; CHECK: pxor |
| 477 } |
| 478 |
| 479 define <16 x i1> @test_icmp_v16i1_ugt(<16 x i1> %a, <16 x i1> %b) { |
| 480 entry: |
| 481 %res = icmp ugt <16 x i1> %a, %b |
| 482 ret <16 x i1> %res |
| 483 ; CHECK-LABEL: test_icmp_v16i1_ugt: |
| 484 ; CHECK: pxor |
| 485 ; CHECK: pcmpgtb |
| 486 } |
| 487 |
| 488 define <16 x i1> @test_icmp_v16i1_ule(<16 x i1> %a, <16 x i1> %b) { |
| 489 entry: |
| 490 %res = icmp ule <16 x i1> %a, %b |
| 491 ret <16 x i1> %res |
| 492 ; CHECK-LABEL: test_icmp_v16i1_ule: |
| 493 ; CHECK: pxor |
| 494 ; CHECK: pcmpgtb |
| 495 ; CHECK: pxor |
| 496 } |
| 497 |
| 498 define <16 x i1> @test_icmp_v16i1_ult(<16 x i1> %a, <16 x i1> %b) { |
| 499 entry: |
| 500 %res = icmp ult <16 x i1> %a, %b |
| 501 ret <16 x i1> %res |
| 502 ; CHECK-LABEL: test_icmp_v16i1_ult: |
| 503 ; CHECK: pxor |
| 504 ; CHECK: pcmpgtb |
| 505 } |
| 506 |
| 507 ; ERRORS-NOT: ICE translation error |
| 508 ; DUMP-NOT: SZ |
| OLD | NEW |
|---|
Chromium Code Reviews
Issue 412593002:
Lower icmp operations between vector values. (Closed)
Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master