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Side by Side Diff: arch/arm/mach-tegra/board-harmony.c

Issue 4120008: CHROMIUM: ARM: Tegra: Clean up 3D clock init WAR. (Closed) Base URL: http://git.chromium.org/git/kernel-next.git
Patch Set: Created 10 years, 1 month ago
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1 /* 1 /*
2 * arch/arm/mach-tegra/board-harmony.c 2 * arch/arm/mach-tegra/board-harmony.c
3 * 3 *
4 * Copyright (C) 2010 Google, Inc. 4 * Copyright (C) 2010 Google, Inc.
5 * 5 *
6 * This software is licensed under the terms of the GNU General Public 6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and 7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms. 8 * may be copied, distributed, and modified under those terms.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
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27 #include <linux/delay.h> 27 #include <linux/delay.h>
28 28
29 #include <asm/mach-types.h> 29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h> 30 #include <asm/mach/arch.h>
31 #include <asm/mach/time.h> 31 #include <asm/mach/time.h>
32 #include <asm/setup.h> 32 #include <asm/setup.h>
33 33
34 #include <mach/iomap.h> 34 #include <mach/iomap.h>
35 #include <mach/irqs.h> 35 #include <mach/irqs.h>
36 #include <mach/nand.h> 36 #include <mach/nand.h>
37 #include <mach/clk.h>
38 37
39 #include "clock.h" 38 #include "clock.h"
40 #include "board.h" 39 #include "board.h"
41 #include "board-harmony.h" 40 #include "board-harmony.h"
42 #include "clock.h"
43 #include "devices.h" 41 #include "devices.h"
44 42
45 /* NVidia bootloader tags */ 43 /* NVidia bootloader tags */
46 #define ATAG_NVIDIA 0x41000801 44 #define ATAG_NVIDIA 0x41000801
47 45
48 #define ATAG_NVIDIA_RM 0x1 46 #define ATAG_NVIDIA_RM 0x1
49 #define ATAG_NVIDIA_DISPLAY 0x2 47 #define ATAG_NVIDIA_DISPLAY 0x2
50 #define ATAG_NVIDIA_FRAMEBUFFER 0x3 48 #define ATAG_NVIDIA_FRAMEBUFFER 0x3
51 #define ATAG_NVIDIA_CHIPSHMOO 0x4 49 #define ATAG_NVIDIA_CHIPSHMOO 0x4
52 #define ATAG_NVIDIA_CHIPSHMOOPHYS 0x5 50 #define ATAG_NVIDIA_CHIPSHMOOPHYS 0x5
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207 { "epp", "pll_m", 266400000, true}, 205 { "epp", "pll_m", 266400000, true},
208 { "vi", "pll_m", 49333333, true}, 206 { "vi", "pll_m", 49333333, true},
209 { "emc", "pll_m", 666000000, true}, 207 { "emc", "pll_m", 666000000, true},
210 { "pll_c", "clk_m", 600000000, true}, 208 { "pll_c", "clk_m", 600000000, true},
211 { "pll_c_out1", "pll_c", 240000000, true}, 209 { "pll_c_out1", "pll_c", 240000000, true},
212 { NULL, NULL, 0, 0}, 210 { NULL, NULL, 0, 0},
213 }; 211 };
214 212
215 static void __init tegra_harmony_init(void) 213 static void __init tegra_harmony_init(void)
216 { 214 {
217 » struct clk *clk; 215 » tegra_common_init(harmony_clk_init_table);
218
219 » tegra_common_init();
220
221 » tegra_clk_init_from_table(harmony_clk_init_table);
222
223 harmony_pinmux_init(); 216 harmony_pinmux_init();
224
225 /* HACK: reset 3d clock */
226 writel(0x101, IO_ADDRESS(TEGRA_PMC_BASE) + 0x30);
227 clk = clk_get_sys("3d", NULL);
228 tegra_periph_reset_assert(clk);
229 writel(0x101, IO_ADDRESS(TEGRA_PMC_BASE) + 0x30);
230 clk_enable(clk);
231 udelay(10);
232 writel(1 << 1, IO_ADDRESS(TEGRA_PMC_BASE) + 0x34);
233 tegra_periph_reset_deassert(clk);
234 clk_put(clk);
235
236 platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices)); 217 platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
237
238 harmony_panel_init(); 218 harmony_panel_init();
239 harmony_sdhci_init(); 219 harmony_sdhci_init();
240 } 220 }
241 221
242 MACHINE_START(HARMONY, "harmony") 222 MACHINE_START(HARMONY, "harmony")
243 .boot_params = 0x00000100, 223 .boot_params = 0x00000100,
244 .phys_io = IO_APB_PHYS, 224 .phys_io = IO_APB_PHYS,
245 .io_pg_offst = ((IO_APB_VIRT) >> 18) & 0xfffc, 225 .io_pg_offst = ((IO_APB_VIRT) >> 18) & 0xfffc,
246 .fixup = tegra_harmony_fixup, 226 .fixup = tegra_harmony_fixup,
247 .init_irq = tegra_init_irq, 227 .init_irq = tegra_init_irq,
248 .init_machine = tegra_harmony_init, 228 .init_machine = tegra_harmony_init,
249 .map_io = tegra_map_common_io, 229 .map_io = tegra_map_common_io,
250 .timer = &tegra_timer, 230 .timer = &tegra_timer,
251 MACHINE_END 231 MACHINE_END
252 232
253 MACHINE_START(TEGRA_LEGACY, "tegra_legacy") 233 MACHINE_START(TEGRA_LEGACY, "tegra_legacy")
254 .boot_params = 0x00000100, 234 .boot_params = 0x00000100,
255 .phys_io = IO_APB_PHYS, 235 .phys_io = IO_APB_PHYS,
256 .io_pg_offst = ((IO_APB_VIRT) >> 18) & 0xfffc, 236 .io_pg_offst = ((IO_APB_VIRT) >> 18) & 0xfffc,
257 .fixup = tegra_harmony_fixup, 237 .fixup = tegra_harmony_fixup,
258 .init_irq = tegra_init_irq, 238 .init_irq = tegra_init_irq,
259 .init_machine = tegra_harmony_init, 239 .init_machine = tegra_harmony_init,
260 .map_io = tegra_map_common_io, 240 .map_io = tegra_map_common_io,
261 .timer = &tegra_timer, 241 .timer = &tegra_timer,
262 MACHINE_END 242 MACHINE_END
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