tests_lit/llvm2ice_tests/div_legalization.ll - Issue 411693003: Validate the assembly code that Subzero generates in unit tests.

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Side by Side Diff: tests_lit/llvm2ice_tests/div_legalization.ll

Issue 411693003: Validate the assembly code that Subzero generates in unit tests. (Closed) Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master

Patch Set: Comment out failing RUN lines. Created 6 years, 5 months ago

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1 ; This is a regression test that idiv and div operands are legalized	1 ; This is a regression test that idiv and div operands are legalized

2 ; (they cannot be constants and can only be reg/mem for x86).	2 ; (they cannot be constants and can only be reg/mem for x86).

3	3

4 ; RUN: %llvm2ice -O2 --verbose none %s \| FileCheck %s	4 ; RUN: %llvm2ice -O2 --verbose none %s \| FileCheck %s

5 ; RUN: %llvm2ice -Om1 --verbose none %s \| FileCheck %s	5 ; RUN: %llvm2ice -Om1 --verbose none %s \| FileCheck %s

	6 ; RUN: %llvm2ice -O2 --verbose none %s \| llvm-mc -x86-asm-syntax=intel

	7 ; RUN: %llvm2ice -Om1 --verbose none %s \| llvm-mc -x86-asm-syntax=intel

6 ; RUN: %llvm2ice --verbose none %s \| FileCheck --check-prefix=ERRORS %s	8 ; RUN: %llvm2ice --verbose none %s \| FileCheck --check-prefix=ERRORS %s

7 ; RUN: %llvm2iceinsts %s \| %szdiff %s \| FileCheck --check-prefix=DUMP %s	9 ; RUN: %llvm2iceinsts %s \| %szdiff %s \| FileCheck --check-prefix=DUMP %s

8 ; RUN: %llvm2iceinsts --pnacl %s \| %szdiff %s \	10 ; RUN: %llvm2iceinsts --pnacl %s \| %szdiff %s \

9 ; RUN: \| FileCheck --check-prefix=DUMP %s	11 ; RUN: \| FileCheck --check-prefix=DUMP %s

10	12

11 define i32 @Sdiv_const8_b(i8 %a) {	13 define i32 @Sdiv_const8_b(i8 %a) {

12 ; CHECK-LABEL: Sdiv_const8_b	14 ; CHECK-LABEL: Sdiv_const8_b

13 entry:	15 entry:

14 %div = sdiv i8 %a, 12	16 %div = sdiv i8 %a, 12

15 ; CHECK: mov {{.*}}, 12	17 ; CHECK: mov {{.*}}, 12

(...skipping 43 matching lines...) Expand 10 before \| Expand all \| Expand 10 after Loading...
59 ; CHECK-LABEL: Urem_const_b	61 ; CHECK-LABEL: Urem_const_b

60 entry:	62 entry:

61 %rem = urem i32 %a, 4567	63 %rem = urem i32 %a, 4567

62 ; CHECK: mov {{.*}}, 4567	64 ; CHECK: mov {{.*}}, 4567

63 ; CHECK-NOT: div 4567	65 ; CHECK-NOT: div 4567

64 ret i32 %rem	66 ret i32 %rem

65 }	67 }

66	68

67 ; ERRORS-NOT: ICE translation error	69 ; ERRORS-NOT: ICE translation error

68 ; DUMP-NOT: SZ	70 ; DUMP-NOT: SZ

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