MIPS: Cache IC handlers on the prototype's map if possible.

src/mips64/ic-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 
 
 #include "src/v8.h"
 
 #if V8_TARGET_ARCH_MIPS64
 
@@ skipping 265 matching lines @@
 
 
 void LoadIC::GenerateMegamorphic(MacroAssembler* masm) {
   // The return address is in lr.
   Register receiver = ReceiverRegister();
   Register name = NameRegister();
   ASSERT(receiver.is(a1));
   ASSERT(name.is(a2));
 
   // Probe the stub cache.
-  Code::Flags flags = Code::ComputeHandlerFlags(Code::LOAD_IC);
+  Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
+      Code::ComputeHandlerFlags(Code::LOAD_IC));
   masm->isolate()->stub_cache()->GenerateProbe(
       masm, flags, receiver, name, a3, a4, a5, a6);
 
   // Cache miss: Jump to runtime.
   GenerateMiss(masm);
 }
 
 
 void LoadIC::GenerateNormal(MacroAssembler* masm) {
   Register dictionary = a0;
@@ skipping 810 matching lines @@
 
 
 void StoreIC::GenerateMegamorphic(MacroAssembler* masm) {
   Register receiver = ReceiverRegister();
   Register name = NameRegister();
   ASSERT(receiver.is(a1));
   ASSERT(name.is(a2));
   ASSERT(ValueRegister().is(a0));
 
   // Get the receiver from the stack and probe the stub cache.
-  Code::Flags flags = Code::ComputeHandlerFlags(Code::STORE_IC);
+  Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
+      Code::ComputeHandlerFlags(Code::STORE_IC));
   masm->isolate()->stub_cache()->GenerateProbe(
       masm, flags, receiver, name, a3, a4, a5, a6);
 
   // Cache miss: Jump to runtime.
   GenerateMiss(masm);
 }
 
 
 void StoreIC::GenerateMiss(MacroAssembler* masm) {
   __ Push(ReceiverRegister(), NameRegister(), ValueRegister());
@@ skipping 130 matching lines @@
   } else {
     ASSERT(Assembler::IsBne(branch_instr));
     patcher.ChangeBranchCondition(eq);
   }
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS64