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Issue 404143002: MIPS: Never record safepoint with doubles. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fix semicolons. Created 6 years, 5 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #include "src/v8.h" 7 #include "src/v8.h"
8 8
9 #if V8_TARGET_ARCH_MIPS64 9 #if V8_TARGET_ARCH_MIPS64
10 10
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115 115
116 void MacroAssembler::PopSafepointRegisters() { 116 void MacroAssembler::PopSafepointRegisters() {
117 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters; 117 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
118 MultiPop(kSafepointSavedRegisters); 118 MultiPop(kSafepointSavedRegisters);
119 if (num_unsaved > 0) { 119 if (num_unsaved > 0) {
120 Daddu(sp, sp, Operand(num_unsaved * kPointerSize)); 120 Daddu(sp, sp, Operand(num_unsaved * kPointerSize));
121 } 121 }
122 } 122 }
123 123
124 124
125 void MacroAssembler::PushSafepointRegistersAndDoubles() {
126 PushSafepointRegisters();
127 Dsubu(sp, sp, Operand(FPURegister::NumAllocatableRegisters() * kDoubleSize));
128 for (int i = 0; i < FPURegister::NumAllocatableRegisters(); i++) {
129 FPURegister reg = FPURegister::FromAllocationIndex(i);
130 sdc1(reg, MemOperand(sp, i * kDoubleSize));
131 }
132 }
133
134
135 void MacroAssembler::PopSafepointRegistersAndDoubles() {
136 for (int i = 0; i < FPURegister::NumAllocatableRegisters(); i++) {
137 FPURegister reg = FPURegister::FromAllocationIndex(i);
138 ldc1(reg, MemOperand(sp, i * kDoubleSize));
139 }
140 Daddu(sp, sp, Operand(FPURegister::NumAllocatableRegisters() * kDoubleSize));
141 PopSafepointRegisters();
142 }
143
144
145 void MacroAssembler::StoreToSafepointRegistersAndDoublesSlot(Register src,
146 Register dst) {
147 sd(src, SafepointRegistersAndDoublesSlot(dst));
148 }
149
150
151 void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) { 125 void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) {
152 sd(src, SafepointRegisterSlot(dst)); 126 sd(src, SafepointRegisterSlot(dst));
153 } 127 }
154 128
155 129
156 void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) { 130 void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) {
157 ld(dst, SafepointRegisterSlot(src)); 131 ld(dst, SafepointRegisterSlot(src));
158 } 132 }
159 133
160 134
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5969 } 5943 }
5970 if (ms.shift() > 0) sra(result, result, ms.shift()); 5944 if (ms.shift() > 0) sra(result, result, ms.shift());
5971 srl(at, dividend, 31); 5945 srl(at, dividend, 31);
5972 Addu(result, result, Operand(at)); 5946 Addu(result, result, Operand(at));
5973 } 5947 }
5974 5948
5975 5949
5976 } } // namespace v8::internal 5950 } } // namespace v8::internal
5977 5951
5978 #endif // V8_TARGET_ARCH_MIPS64 5952 #endif // V8_TARGET_ARCH_MIPS64
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