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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 | 5 |
6 | 6 |
7 #include "src/v8.h" | 7 #include "src/v8.h" |
8 | 8 |
9 #if V8_TARGET_ARCH_MIPS | 9 #if V8_TARGET_ARCH_MIPS |
10 | 10 |
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505 | 505 |
506 __ TailCallExternalReference(ref, 2, 1); | 506 __ TailCallExternalReference(ref, 2, 1); |
507 } | 507 } |
508 | 508 |
509 | 509 |
510 // IC register specifications | 510 // IC register specifications |
511 const Register LoadIC::ReceiverRegister() { return a1; } | 511 const Register LoadIC::ReceiverRegister() { return a1; } |
512 const Register LoadIC::NameRegister() { return a2; } | 512 const Register LoadIC::NameRegister() { return a2; } |
513 | 513 |
514 | 514 |
| 515 const Register LoadIC::SlotRegister() { |
| 516 ASSERT(FLAG_vector_ics); |
| 517 return a0; |
| 518 } |
| 519 |
| 520 |
| 521 const Register LoadIC::VectorRegister() { |
| 522 ASSERT(FLAG_vector_ics); |
| 523 return a3; |
| 524 } |
| 525 |
| 526 |
515 const Register StoreIC::ReceiverRegister() { return a1; } | 527 const Register StoreIC::ReceiverRegister() { return a1; } |
516 const Register StoreIC::NameRegister() { return a2; } | 528 const Register StoreIC::NameRegister() { return a2; } |
517 const Register StoreIC::ValueRegister() { return a0; } | 529 const Register StoreIC::ValueRegister() { return a0; } |
518 | 530 |
519 | 531 |
520 const Register KeyedStoreIC::ReceiverRegister() { | 532 const Register KeyedStoreIC::ReceiverRegister() { |
521 return StoreIC::ReceiverRegister(); | 533 return StoreIC::ReceiverRegister(); |
522 } | 534 } |
523 | 535 |
524 | 536 |
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1253 } else { | 1265 } else { |
1254 ASSERT(Assembler::IsBne(branch_instr)); | 1266 ASSERT(Assembler::IsBne(branch_instr)); |
1255 patcher.ChangeBranchCondition(eq); | 1267 patcher.ChangeBranchCondition(eq); |
1256 } | 1268 } |
1257 } | 1269 } |
1258 | 1270 |
1259 | 1271 |
1260 } } // namespace v8::internal | 1272 } } // namespace v8::internal |
1261 | 1273 |
1262 #endif // V8_TARGET_ARCH_MIPS | 1274 #endif // V8_TARGET_ARCH_MIPS |
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