Flush denormals to zero on arm and arm64.

Source/platform/audio/DenormalDisabler.h

 /*
  * Copyright (C) 2011, Google Inc. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1.  Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2.  Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
@@ skipping 16 matching lines @@
 
 #include "wtf/CPU.h"
 #include "wtf/MathExtras.h"
 #include <float.h>
 
 namespace WebCore {
 
 // Deal with denormals. They can very seriously impact performance on x86.
 
 // Define HAVE_DENORMAL if we support flushing denormals to zero.
-#if OS(WIN) && COMPILER(MSVC)
+
+#if OS(WIN) && COMPILER(MSVC) && (_M_IX86_FP == 2)
+// Windows compiled using MSVC with SSE2 (_M_IX86_FP == 2) can flush denormals.

[Ken Russell (switch to Gerrit), 2014/07/18 18:46:56]

A little searching indicates that _M_IX86_FP isn't defined at all on 64-bit
Windows builds, but they implicitly have SSE2 support.

[Raymond Toy, 2014/07/18 20:08:34]

Should just probably get rid of this check, now that windows always uses sse2.

 #define HAVE_DENORMAL 1
 #endif
 
 #if COMPILER(GCC) && (CPU(X86) || CPU(X86_64))
+// X86 chips can flush denormals
 #define HAVE_DENORMAL 1
 #endif
 
+#if CPU(ARM) || CPU(ARM64)
+#define HAVE_DENORMAL 1
+#endif
+
 #if HAVE(DENORMAL)
 class DenormalDisabler {
 public:
     DenormalDisabler()
             : m_savedCSR(0)
     {
-#if OS(WIN) && COMPILER(MSVC)
-        // Save the current state, and set mode to flush denormals.
-        //
-        // http://stackoverflow.com/questions/637175/possible-bug-in-controlfp-s-may-not-restore-control-word-correctly
-        _controlfp_s(&m_savedCSR, 0, 0);
-        unsigned unused;
-        _controlfp_s(&unused, _DN_FLUSH, _MCW_DN);
-#else
-        m_savedCSR = getCSR();
-        setCSR(m_savedCSR | 0x8040);
-#endif
+        disableDenormals();
     }
 
     ~DenormalDisabler()
     {
-#if OS(WIN) && COMPILER(MSVC)
-        unsigned unused;
-        _controlfp_s(&unused, m_savedCSR, _MCW_DN);
-#else
-        setCSR(m_savedCSR);
-#endif
+        restoreState();
     }
 
     // This is a nop if we can flush denormals to zero in hardware.
     static inline float flushDenormalFloatToZero(float f)
     {
-#if OS(WIN) && COMPILER(MSVC) && (!_M_IX86_FP)
-        // For systems using x87 instead of sse, there's no hardware support
-        // to flush denormals automatically. Hence, we need to flush
-        // denormals to zero manually.
-        return (fabs(f) < FLT_MIN) ? 0.0f : f;
-#else
         return f;
-#endif
     }
 private:
+    unsigned m_savedCSR;
+
 #if COMPILER(GCC) && (CPU(X86) || CPU(X86_64))
+    inline void disableDenormals()
+    {
+        m_savedCSR = getCSR();
+        setCSR(m_savedCSR | 0x8040);
+    }
+
+    inline void restoreState()
+    {
+        setCSR(m_savedCSR);
+    }
+
     inline int getCSR()
     {
         int result;
         asm volatile("stmxcsr %0" : "=m" (result));
         return result;
     }
 
     inline void setCSR(int a)
     {
         int temp = a;
         asm volatile("ldmxcsr %0" : : "m" (temp));
     }
 
+#elif OS(WIN) && COMPILER(MSVC)

[Ken Russell (switch to Gerrit), 2014/07/18 18:46:56]

The conditions in this #elif don't match those in the #ifdef above.

+    inline void disableDenormals()
+    {
+        // Save the current state, and set mode to flush denormals.
+        //
+        // http://stackoverflow.com/questions/637175/possible-bug-in-controlfp-s-may-not-restore-control-word-correctly
+        _controlfp_s(&m_savedCSR, 0, 0);
+        unsigned unused;
+        _controlfp_s(&unused, _DN_FLUSH, _MCW_DN);
+    }
+
+    inline void restoreState()
+    {
+        unsigned unused;
+        _controlfp_s(&unused, m_savedCSR, _MCW_DN);
+    }
+#elif CPU(ARM) || CPU(ARM64)
+    inline void disableDenormals()
+    {
+        m_savedCSR = getStatusWord();
+        // Bit 24 is the flush-to-zero mode control bit. Setting it to 1 flushes denormals to 0.
+        setStatusWord(m_savedCSR | (1 << 24));
+    }
+
+    inline void restoreState()
+    {
+        setStatusWord(m_savedCSR);
+    }
+
+    inline int getStatusWord()
+    {
+        int result;
+#if CPU(ARM64)
+        asm volatile("mrs %[result], FPCR" : [result] "=r" (result));
+#else
+        asm volatile("vmrs %[result], FPSCR" : [result] "=r" (result));
+#endif
+        return result;
+    }
+
+    inline void setStatusWord(int a)
+    {
+#if CPU(ARM64)
+        asm volatile("msr FPCR, %[src]" : : [src] "r" (a));
+#else
+        asm volatile("vmsr FPSCR, %[src]" : : [src] "r" (a));
+#endif
+    }
+
 #endif
 
-    unsigned m_savedCSR;
 };
 
 #else
 // FIXME: add implementations for other architectures and compilers
 class DenormalDisabler {
 public:
     DenormalDisabler() { }
 
     // Assume the worst case that other architectures and compilers
     // need to flush denormals to zero manually.
     static inline float flushDenormalFloatToZero(float f)
     {
         return (fabs(f) < FLT_MIN) ? 0.0f : f;
     }
 };
 
 #endif
 
 } // WebCore
 
 #undef HAVE_DENORMAL
 #endif // DenormalDisabler_h