Merge bleeding_edge.

src/x64/assembler-x64.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 705 matching lines @@
   // Move the offset of the label location relative to the current
   // position (after the move) to the destination.
   void movl(const Operand& dst, Label* src);
 
   // Move sign extended immediate to memory location.
   void movq(const Operand& dst, Immediate value);
   // Instructions to load a 64-bit immediate into a register.
   // All 64-bit immediates must have a relocation mode.
   void movq(Register dst, void* ptr, RelocInfo::Mode rmode);
   void movq(Register dst, int64_t value, RelocInfo::Mode rmode);
-  void movq(Register dst, const char* s, RelocInfo::Mode rmode);
   // Moves the address of the external reference into the register.
   void movq(Register dst, ExternalReference ext);
   void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode);
 
   void movsxbq(Register dst, const Operand& src);
   void movsxwq(Register dst, const Operand& src);
   void movsxlq(Register dst, Register src);
   void movsxlq(Register dst, const Operand& src);
   void movzxbq(Register dst, const Operand& src);
   void movzxbl(Register dst, const Operand& src);
@@ skipping 12 matching lines @@
   void load_rax(void* ptr, RelocInfo::Mode rmode);
   void load_rax(ExternalReference ext);
 
   // Conditional moves.
   void cmovq(Condition cc, Register dst, Register src);
   void cmovq(Condition cc, Register dst, const Operand& src);
   void cmovl(Condition cc, Register dst, Register src);
   void cmovl(Condition cc, Register dst, const Operand& src);
 
   // Exchange two registers
-  void xchg(Register dst, Register src);
+  void xchgq(Register dst, Register src);
+  void xchgl(Register dst, Register src);
 
   // Arithmetics
   void addl(Register dst, Register src) {
     arithmetic_op_32(0x03, dst, src);
   }
 
   void addl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x0, dst, src);
   }
 
@@ skipping 214 matching lines @@
   }
 
   void orl(Register dst, const Operand& src) {
     arithmetic_op_32(0x0B, dst, src);
   }
 
   void or_(const Operand& dst, Register src) {
     arithmetic_op(0x09, src, dst);
   }
 
+  void orl(const Operand& dst, Register src) {
+    arithmetic_op_32(0x09, src, dst);
+  }
+
   void or_(Register dst, Immediate src) {
     immediate_arithmetic_op(0x1, dst, src);
   }
 
   void orl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x1, dst, src);
   }
 
   void or_(const Operand& dst, Immediate src) {
     immediate_arithmetic_op(0x1, dst, src);
   }
 
   void orl(const Operand& dst, Immediate src) {
     immediate_arithmetic_op_32(0x1, dst, src);
   }
 
 
   void rcl(Register dst, Immediate imm8) {
     shift(dst, imm8, 0x2);
   }
 
   void rol(Register dst, Immediate imm8) {
     shift(dst, imm8, 0x0);
   }
 
+  void roll(Register dst, Immediate imm8) {
+    shift_32(dst, imm8, 0x0);
+  }
+
   void rcr(Register dst, Immediate imm8) {
     shift(dst, imm8, 0x3);
   }
 
   void ror(Register dst, Immediate imm8) {
     shift(dst, imm8, 0x1);
   }
 
   void rorl(Register dst, Immediate imm8) {
     shift_32(dst, imm8, 0x1);
@@ skipping 87 matching lines @@
   }
 
   void subl(Register dst, Register src) {
     arithmetic_op_32(0x2B, dst, src);
   }
 
   void subl(Register dst, const Operand& src) {
     arithmetic_op_32(0x2B, dst, src);
   }
 
+  void subl(const Operand& dst, Register src) {
+    arithmetic_op_32(0x29, src, dst);
+  }
+
   void subl(const Operand& dst, Immediate src) {
     immediate_arithmetic_op_32(0x5, dst, src);
   }
 
   void subl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x5, dst, src);
   }
 
   void subb(Register dst, Immediate src) {
     immediate_arithmetic_op_8(0x5, dst, src);
   }
 
   void testb(Register dst, Register src);
   void testb(Register reg, Immediate mask);
   void testb(const Operand& op, Immediate mask);
   void testb(const Operand& op, Register reg);
   void testl(Register dst, Register src);
   void testl(Register reg, Immediate mask);
+  void testl(const Operand& op, Register reg);
   void testl(const Operand& op, Immediate mask);
   void testq(const Operand& op, Register reg);
   void testq(Register dst, Register src);
   void testq(Register dst, Immediate mask);
 
   void xor_(Register dst, Register src) {
     if (dst.code() == src.code()) {
       arithmetic_op_32(0x33, dst, src);
     } else {
       arithmetic_op(0x33, dst, src);
     }
   }
 
   void xorl(Register dst, Register src) {
     arithmetic_op_32(0x33, dst, src);
   }
 
   void xorl(Register dst, const Operand& src) {
     arithmetic_op_32(0x33, dst, src);
   }
 
   void xorl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x6, dst, src);
   }
 
+  void xorl(const Operand& dst, Register src) {
+    arithmetic_op_32(0x31, src, dst);
+  }
+
   void xorl(const Operand& dst, Immediate src) {
     immediate_arithmetic_op_32(0x6, dst, src);
   }
 
   void xor_(Register dst, const Operand& src) {
     arithmetic_op(0x33, dst, src);
   }
 
   void xor_(const Operand& dst, Register src) {
     arithmetic_op(0x31, src, dst);
@@ skipping 288 matching lines @@
   void long_at_put(int pos, uint32_t x)  {
     *reinterpret_cast<uint32_t*>(addr_at(pos)) = x;
   }
 
   // code emission
   void GrowBuffer();
 
   void emit(byte x) { *pc_++ = x; }
   inline void emitl(uint32_t x);
   inline void emitp(void* x, RelocInfo::Mode rmode);
-  inline void emitq(uint64_t x, RelocInfo::Mode rmode);
+  inline void emitq(uint64_t x);
   inline void emitw(uint16_t x);
   inline void emit_code_target(Handle<Code> target,
                                RelocInfo::Mode rmode,
                                TypeFeedbackId ast_id = TypeFeedbackId::None());
   inline void emit_runtime_entry(Address entry, RelocInfo::Mode rmode);
   void emit(Immediate x) { emitl(x.value_); }
 
   // Emits a REX prefix that encodes a 64-bit operand size and
   // the top bit of both register codes.
   // High bit of reg goes to REX.R, high bit of rm_reg goes to REX.B.
@@ skipping 193 matching lines @@
  private:
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_X64_ASSEMBLER_X64_H_