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Issue 39973003: Merge bleeding_edge. (Closed) Base URL: https://v8.googlecode.com/svn/branches/experimental/parser
Patch Set: again Created 7 years, 2 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1407 int Assembler::CallSize(Handle<Code> code, RelocInfo::Mode rmode) { 1407 int Assembler::CallSize(Handle<Code> code, RelocInfo::Mode rmode) {
1408 return 1 /* EMIT */ + sizeof(uint32_t) /* emit */; 1408 return 1 /* EMIT */ + sizeof(uint32_t) /* emit */;
1409 } 1409 }
1410 1410
1411 1411
1412 void Assembler::call(Handle<Code> code, 1412 void Assembler::call(Handle<Code> code,
1413 RelocInfo::Mode rmode, 1413 RelocInfo::Mode rmode,
1414 TypeFeedbackId ast_id) { 1414 TypeFeedbackId ast_id) {
1415 positions_recorder()->WriteRecordedPositions(); 1415 positions_recorder()->WriteRecordedPositions();
1416 EnsureSpace ensure_space(this); 1416 EnsureSpace ensure_space(this);
1417 ASSERT(RelocInfo::IsCodeTarget(rmode)); 1417 ASSERT(RelocInfo::IsCodeTarget(rmode)
1418 || rmode == RelocInfo::CODE_AGE_SEQUENCE);
1418 EMIT(0xE8); 1419 EMIT(0xE8);
1419 emit(code, rmode, ast_id); 1420 emit(code, rmode, ast_id);
1420 } 1421 }
1421 1422
1422 1423
1423 void Assembler::jmp(Label* L, Label::Distance distance) { 1424 void Assembler::jmp(Label* L, Label::Distance distance) {
1424 EnsureSpace ensure_space(this); 1425 EnsureSpace ensure_space(this);
1425 if (L->is_bound()) { 1426 if (L->is_bound()) {
1426 const int short_size = 2; 1427 const int short_size = 2;
1427 const int long_size = 5; 1428 const int long_size = 5;
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2060 2061
2061 void Assembler::xorps(XMMRegister dst, XMMRegister src) { 2062 void Assembler::xorps(XMMRegister dst, XMMRegister src) {
2062 EnsureSpace ensure_space(this); 2063 EnsureSpace ensure_space(this);
2063 EMIT(0x0F); 2064 EMIT(0x0F);
2064 EMIT(0x57); 2065 EMIT(0x57);
2065 emit_sse_operand(dst, src); 2066 emit_sse_operand(dst, src);
2066 } 2067 }
2067 2068
2068 2069
2069 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { 2070 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
2071 ASSERT(IsEnabled(SSE2));
2070 EnsureSpace ensure_space(this); 2072 EnsureSpace ensure_space(this);
2071 EMIT(0xF2); 2073 EMIT(0xF2);
2072 EMIT(0x0F); 2074 EMIT(0x0F);
2073 EMIT(0x51); 2075 EMIT(0x51);
2074 emit_sse_operand(dst, src); 2076 emit_sse_operand(dst, src);
2075 } 2077 }
2076 2078
2077 2079
2078 void Assembler::andpd(XMMRegister dst, XMMRegister src) { 2080 void Assembler::andpd(XMMRegister dst, XMMRegister src) {
2081 ASSERT(IsEnabled(SSE2));
2079 EnsureSpace ensure_space(this); 2082 EnsureSpace ensure_space(this);
2080 EMIT(0x66); 2083 EMIT(0x66);
2081 EMIT(0x0F); 2084 EMIT(0x0F);
2082 EMIT(0x54); 2085 EMIT(0x54);
2083 emit_sse_operand(dst, src); 2086 emit_sse_operand(dst, src);
2084 } 2087 }
2085 2088
2086 2089
2087 void Assembler::orpd(XMMRegister dst, XMMRegister src) { 2090 void Assembler::orpd(XMMRegister dst, XMMRegister src) {
2091 ASSERT(IsEnabled(SSE2));
2088 EnsureSpace ensure_space(this); 2092 EnsureSpace ensure_space(this);
2089 EMIT(0x66); 2093 EMIT(0x66);
2090 EMIT(0x0F); 2094 EMIT(0x0F);
2091 EMIT(0x56); 2095 EMIT(0x56);
2092 emit_sse_operand(dst, src); 2096 emit_sse_operand(dst, src);
2093 } 2097 }
2094 2098
2095 2099
2096 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { 2100 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
2097 ASSERT(IsEnabled(SSE2)); 2101 ASSERT(IsEnabled(SSE2));
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2240 ASSERT(is_uint2(level)); 2244 ASSERT(is_uint2(level));
2241 EnsureSpace ensure_space(this); 2245 EnsureSpace ensure_space(this);
2242 EMIT(0x0F); 2246 EMIT(0x0F);
2243 EMIT(0x18); 2247 EMIT(0x18);
2244 // Emit hint number in Reg position of RegR/M. 2248 // Emit hint number in Reg position of RegR/M.
2245 XMMRegister code = XMMRegister::from_code(level); 2249 XMMRegister code = XMMRegister::from_code(level);
2246 emit_sse_operand(code, src); 2250 emit_sse_operand(code, src);
2247 } 2251 }
2248 2252
2249 2253
2250 void Assembler::movdbl(XMMRegister dst, const Operand& src) {
2251 EnsureSpace ensure_space(this);
2252 movsd(dst, src);
2253 }
2254
2255
2256 void Assembler::movdbl(const Operand& dst, XMMRegister src) {
2257 EnsureSpace ensure_space(this);
2258 movsd(dst, src);
2259 }
2260
2261
2262 void Assembler::movsd(const Operand& dst, XMMRegister src ) { 2254 void Assembler::movsd(const Operand& dst, XMMRegister src ) {
2263 ASSERT(IsEnabled(SSE2)); 2255 ASSERT(IsEnabled(SSE2));
2264 EnsureSpace ensure_space(this); 2256 EnsureSpace ensure_space(this);
2265 EMIT(0xF2); // double 2257 EMIT(0xF2); // double
2266 EMIT(0x0F); 2258 EMIT(0x0F);
2267 EMIT(0x11); // store 2259 EMIT(0x11); // store
2268 emit_sse_operand(src, dst); 2260 emit_sse_operand(src, dst);
2269 } 2261 }
2270 2262
2271 2263
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2340 2332
2341 2333
2342 void Assembler::extractps(Register dst, XMMRegister src, byte imm8) { 2334 void Assembler::extractps(Register dst, XMMRegister src, byte imm8) {
2343 ASSERT(IsEnabled(SSE4_1)); 2335 ASSERT(IsEnabled(SSE4_1));
2344 ASSERT(is_uint8(imm8)); 2336 ASSERT(is_uint8(imm8));
2345 EnsureSpace ensure_space(this); 2337 EnsureSpace ensure_space(this);
2346 EMIT(0x66); 2338 EMIT(0x66);
2347 EMIT(0x0F); 2339 EMIT(0x0F);
2348 EMIT(0x3A); 2340 EMIT(0x3A);
2349 EMIT(0x17); 2341 EMIT(0x17);
2350 emit_sse_operand(dst, src); 2342 emit_sse_operand(src, dst);
2351 EMIT(imm8); 2343 EMIT(imm8);
2352 } 2344 }
2353 2345
2354 2346
2355 void Assembler::pand(XMMRegister dst, XMMRegister src) { 2347 void Assembler::pand(XMMRegister dst, XMMRegister src) {
2356 ASSERT(IsEnabled(SSE2)); 2348 ASSERT(IsEnabled(SSE2));
2357 EnsureSpace ensure_space(this); 2349 EnsureSpace ensure_space(this);
2358 EMIT(0x66); 2350 EMIT(0x66);
2359 EMIT(0x0F); 2351 EMIT(0x0F);
2360 EMIT(0xDB); 2352 EMIT(0xDB);
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2479 void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) { 2471 void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) {
2480 EMIT(0xC0 | dst.code() << 3 | src.code()); 2472 EMIT(0xC0 | dst.code() << 3 | src.code());
2481 } 2473 }
2482 2474
2483 2475
2484 void Assembler::emit_sse_operand(Register dst, XMMRegister src) { 2476 void Assembler::emit_sse_operand(Register dst, XMMRegister src) {
2485 EMIT(0xC0 | dst.code() << 3 | src.code()); 2477 EMIT(0xC0 | dst.code() << 3 | src.code());
2486 } 2478 }
2487 2479
2488 2480
2481 void Assembler::emit_sse_operand(XMMRegister dst, Register src) {
2482 EMIT(0xC0 | (dst.code() << 3) | src.code());
2483 }
2484
2485
2489 void Assembler::Print() { 2486 void Assembler::Print() {
2490 Disassembler::Decode(isolate(), stdout, buffer_, pc_); 2487 Disassembler::Decode(isolate(), stdout, buffer_, pc_);
2491 } 2488 }
2492 2489
2493 2490
2494 void Assembler::RecordJSReturn() { 2491 void Assembler::RecordJSReturn() {
2495 positions_recorder()->WriteRecordedPositions(); 2492 positions_recorder()->WriteRecordedPositions();
2496 EnsureSpace ensure_space(this); 2493 EnsureSpace ensure_space(this);
2497 RecordRelocInfo(RelocInfo::JS_RETURN); 2494 RecordRelocInfo(RelocInfo::JS_RETURN);
2498 } 2495 }
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2684 fprintf(coverage_log, "%s\n", file_line); 2681 fprintf(coverage_log, "%s\n", file_line);
2685 fflush(coverage_log); 2682 fflush(coverage_log);
2686 } 2683 }
2687 } 2684 }
2688 2685
2689 #endif 2686 #endif
2690 2687
2691 } } // namespace v8::internal 2688 } } // namespace v8::internal
2692 2689
2693 #endif // V8_TARGET_ARCH_IA32 2690 #endif // V8_TARGET_ARCH_IA32
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