Start processing function blocks in Subzero.

tests_lit/llvm2ice_tests/pnacl-reader.ll

Index: tests_lit/llvm2ice_tests/pnacl-reader.ll
diff --git a/tests_lit/llvm2ice_tests/pnacl-reader.ll b/tests_lit/llvm2ice_tests/pnacl-reader.ll
new file mode 100644
index 0000000000000000000000000000000000000000..3317d2fafda9033d3b3be673c63560e565a48536
--- /dev/null
+++ b/tests_lit/llvm2ice_tests/pnacl-reader.ll
@@ -0,0 +1,116 @@
+; Tests the current state of the translator using PNaCl bitcode.
+
+; RUN: llvm-as < %s | pnacl-freeze \
+; RUN:              | %llvm2ice -notranslate -verbose=inst -build-on-read \
+; RUN:              | FileCheck %s
+
+define i32 @Add(i32 %a, i32 %b) {
+  %add = add i32 %b, %a
+  ret i32 %add
+}
+
+; CHECK:      define i32 @Add(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = add i32 %__1, %__0
+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+
+define i32 @And(i32 %a, i32 %b) {
+  %and = and i32 %b, %a
+  ret i32 %and
+}
+
+; CHECK-NEXT: define i32 @And(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = and i32 %__1, %__0
+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+
+define i32 @Or(i32 %a, i32 %b) {
+  %or = or i32 %b, %a
+  ret i32 %or
+}
+
+; CHECK-NEXT: define i32 @Or(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = or i32 %__1, %__0
+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+
+define i32 @Xor(i32 %a, i32 %b) {
+  %xor = xor i32 %b, %a
+  ret i32 %xor
+}
+
+; CHECK-NEXT: define i32 @Xor(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = or i32 %__1, %__0

[jvoung (off chromium), 2014/07/17 23:57:56]

This doesn't look like xor ?

[Karl, 2014/07/18 20:27:43]

Done.

+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+
+define i32 @Sub(i32 %a, i32 %b) {
+  %sub = sub i32 %a, %b
+  ret i32 %sub
+}
+
+; CHECK-NEXT: define i32 @Sub(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = sub i32 %__0, %__1
+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+
+define i32 @Mul(i32 %a, i32 %b) {
+  %mul = mul i32 %b, %a
+  ret i32 %mul
+}
+
+; CHECK-NEXT: define i32 @Mul(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = mul i32 %__1, %__0
+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+
+define i32 @Sdiv(i32 %a, i32 %b) {
+  %div = sdiv i32 %a, %b
+  ret i32 %div
+}
+
+; CHECK-NEXT: define i32 @Sdiv(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = sdiv i32 %__0, %__1
+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+
+define i32 @Srem(i32 %a, i32 %b) {
+  %rem = srem i32 %a, %b
+  ret i32 %rem
+}
+
+; CHECK-NEXT: define i32 @Srem(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = srem i32 %__0, %__1
+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+
+define i32 @Udiv(i32 %a, i32 %b) {
+  %div = udiv i32 %a, %b
+  ret i32 %div
+}
+
+; CHECK-NEXT: define i32 @Udiv(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = udiv i32 %__0, %__1
+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+
+define i32 @Urem(i32 %a, i32 %b) {
+  %rem = urem i32 %a, %b
+  ret i32 %rem
+}
+
+; CHECK-NEXT: define i32 @Urem(i32 %__0, i32 %__1) {
+; CHECK-NEXT: bb0:
+; CHECK-NEXT:   %__2 = urem i32 %__0, %__1
+; CHECK-NEXT:   ret i32 %__2
+; CHECK-NEXT: }
+