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Issue 393693003: MIPS: Use register parameters in ElementsTransitionGenerator. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Add mips64 port. Created 6 years, 5 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #include "src/v8.h" 7 #include "src/v8.h"
8 8
9 #if V8_TARGET_ARCH_MIPS64 9 #if V8_TARGET_ARCH_MIPS64
10 10
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5855 bind(&loop_again); 5855 bind(&loop_again);
5856 ld(current, FieldMemOperand(current, HeapObject::kMapOffset)); 5856 ld(current, FieldMemOperand(current, HeapObject::kMapOffset));
5857 lb(scratch1, FieldMemOperand(current, Map::kBitField2Offset)); 5857 lb(scratch1, FieldMemOperand(current, Map::kBitField2Offset));
5858 DecodeField<Map::ElementsKindBits>(scratch1); 5858 DecodeField<Map::ElementsKindBits>(scratch1);
5859 Branch(found, eq, scratch1, Operand(DICTIONARY_ELEMENTS)); 5859 Branch(found, eq, scratch1, Operand(DICTIONARY_ELEMENTS));
5860 ld(current, FieldMemOperand(current, Map::kPrototypeOffset)); 5860 ld(current, FieldMemOperand(current, Map::kPrototypeOffset));
5861 Branch(&loop_again, ne, current, Operand(factory->null_value())); 5861 Branch(&loop_again, ne, current, Operand(factory->null_value()));
5862 } 5862 }
5863 5863
5864 5864
5865 bool AreAliased(Register r1, Register r2, Register r3, Register r4) { 5865 bool AreAliased(Register reg1,
5866 if (r1.is(r2)) return true; 5866 Register reg2,
5867 if (r1.is(r3)) return true; 5867 Register reg3,
5868 if (r1.is(r4)) return true; 5868 Register reg4,
5869 if (r2.is(r3)) return true; 5869 Register reg5,
5870 if (r2.is(r4)) return true; 5870 Register reg6,
5871 if (r3.is(r4)) return true; 5871 Register reg7,
5872 return false; 5872 Register reg8) {
5873 int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() +
5874 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
5875 reg7.is_valid() + reg8.is_valid();
5876
5877 RegList regs = 0;
5878 if (reg1.is_valid()) regs |= reg1.bit();
5879 if (reg2.is_valid()) regs |= reg2.bit();
5880 if (reg3.is_valid()) regs |= reg3.bit();
5881 if (reg4.is_valid()) regs |= reg4.bit();
5882 if (reg5.is_valid()) regs |= reg5.bit();
5883 if (reg6.is_valid()) regs |= reg6.bit();
5884 if (reg7.is_valid()) regs |= reg7.bit();
5885 if (reg8.is_valid()) regs |= reg8.bit();
5886 int n_of_non_aliasing_regs = NumRegs(regs);
5887
5888 return n_of_valid_regs != n_of_non_aliasing_regs;
5873 } 5889 }
5874 5890
5875 5891
5876 CodePatcher::CodePatcher(byte* address, 5892 CodePatcher::CodePatcher(byte* address,
5877 int instructions, 5893 int instructions,
5878 FlushICache flush_cache) 5894 FlushICache flush_cache)
5879 : address_(address), 5895 : address_(address),
5880 size_(instructions * Assembler::kInstrSize), 5896 size_(instructions * Assembler::kInstrSize),
5881 masm_(NULL, address, size_ + Assembler::kGap), 5897 masm_(NULL, address, size_ + Assembler::kGap),
5882 flush_cache_(flush_cache) { 5898 flush_cache_(flush_cache) {
(...skipping 65 matching lines...) Expand 10 before | Expand all | Expand 10 after
5948 } 5964 }
5949 if (ms.shift() > 0) sra(result, result, ms.shift()); 5965 if (ms.shift() > 0) sra(result, result, ms.shift());
5950 srl(at, dividend, 31); 5966 srl(at, dividend, 31);
5951 Addu(result, result, Operand(at)); 5967 Addu(result, result, Operand(at));
5952 } 5968 }
5953 5969
5954 5970
5955 } } // namespace v8::internal 5971 } } // namespace v8::internal
5956 5972
5957 #endif // V8_TARGET_ARCH_MIPS64 5973 #endif // V8_TARGET_ARCH_MIPS64
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