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Issue 393693003: MIPS: Use register parameters in ElementsTransitionGenerator. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Add mips64 port. Created 6 years, 5 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #include "src/v8.h" 7 #include "src/v8.h"
8 8
9 #if V8_TARGET_ARCH_MIPS 9 #if V8_TARGET_ARCH_MIPS
10 10
(...skipping 5656 matching lines...) Expand 10 before | Expand all | Expand 10 after
5667 bind(&loop_again); 5667 bind(&loop_again);
5668 lw(current, FieldMemOperand(current, HeapObject::kMapOffset)); 5668 lw(current, FieldMemOperand(current, HeapObject::kMapOffset));
5669 lb(scratch1, FieldMemOperand(current, Map::kBitField2Offset)); 5669 lb(scratch1, FieldMemOperand(current, Map::kBitField2Offset));
5670 DecodeField<Map::ElementsKindBits>(scratch1); 5670 DecodeField<Map::ElementsKindBits>(scratch1);
5671 Branch(found, eq, scratch1, Operand(DICTIONARY_ELEMENTS)); 5671 Branch(found, eq, scratch1, Operand(DICTIONARY_ELEMENTS));
5672 lw(current, FieldMemOperand(current, Map::kPrototypeOffset)); 5672 lw(current, FieldMemOperand(current, Map::kPrototypeOffset));
5673 Branch(&loop_again, ne, current, Operand(factory->null_value())); 5673 Branch(&loop_again, ne, current, Operand(factory->null_value()));
5674 } 5674 }
5675 5675
5676 5676
5677 bool AreAliased(Register r1, Register r2, Register r3, Register r4) { 5677 bool AreAliased(Register reg1,
5678 if (r1.is(r2)) return true; 5678 Register reg2,
5679 if (r1.is(r3)) return true; 5679 Register reg3,
5680 if (r1.is(r4)) return true; 5680 Register reg4,
5681 if (r2.is(r3)) return true; 5681 Register reg5,
5682 if (r2.is(r4)) return true; 5682 Register reg6,
5683 if (r3.is(r4)) return true; 5683 Register reg7,
5684 return false; 5684 Register reg8) {
5685 int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() +
5686 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
5687 reg7.is_valid() + reg8.is_valid();
5688
5689 RegList regs = 0;
5690 if (reg1.is_valid()) regs |= reg1.bit();
5691 if (reg2.is_valid()) regs |= reg2.bit();
5692 if (reg3.is_valid()) regs |= reg3.bit();
5693 if (reg4.is_valid()) regs |= reg4.bit();
5694 if (reg5.is_valid()) regs |= reg5.bit();
5695 if (reg6.is_valid()) regs |= reg6.bit();
5696 if (reg7.is_valid()) regs |= reg7.bit();
5697 if (reg8.is_valid()) regs |= reg8.bit();
5698 int n_of_non_aliasing_regs = NumRegs(regs);
5699
5700 return n_of_valid_regs != n_of_non_aliasing_regs;
5685 } 5701 }
5686 5702
5687 5703
5688 CodePatcher::CodePatcher(byte* address, 5704 CodePatcher::CodePatcher(byte* address,
5689 int instructions, 5705 int instructions,
5690 FlushICache flush_cache) 5706 FlushICache flush_cache)
5691 : address_(address), 5707 : address_(address),
5692 size_(instructions * Assembler::kInstrSize), 5708 size_(instructions * Assembler::kInstrSize),
5693 masm_(NULL, address, size_ + Assembler::kGap), 5709 masm_(NULL, address, size_ + Assembler::kGap),
5694 flush_cache_(flush_cache) { 5710 flush_cache_(flush_cache) {
(...skipping 66 matching lines...) Expand 10 before | Expand all | Expand 10 after
5761 } 5777 }
5762 if (ms.shift() > 0) sra(result, result, ms.shift()); 5778 if (ms.shift() > 0) sra(result, result, ms.shift());
5763 srl(at, dividend, 31); 5779 srl(at, dividend, 31);
5764 Addu(result, result, Operand(at)); 5780 Addu(result, result, Operand(at));
5765 } 5781 }
5766 5782
5767 5783
5768 } } // namespace v8::internal 5784 } } // namespace v8::internal
5769 5785
5770 #endif // V8_TARGET_ARCH_MIPS 5786 #endif // V8_TARGET_ARCH_MIPS
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