| OLD | NEW |
| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
| 6 #if defined(TARGET_ARCH_X64) | 6 #if defined(TARGET_ARCH_X64) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
| 10 #include "vm/heap.h" | 10 #include "vm/heap.h" |
| (...skipping 1412 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1423 | 1423 |
| 1424 void Assembler::xchgq(Register dst, Register src) { | 1424 void Assembler::xchgq(Register dst, Register src) { |
| 1425 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1425 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1426 Operand operand(src); | 1426 Operand operand(src); |
| 1427 EmitOperandREX(dst, operand, REX_W); | 1427 EmitOperandREX(dst, operand, REX_W); |
| 1428 EmitUint8(0x87); | 1428 EmitUint8(0x87); |
| 1429 EmitOperand(dst & 7, operand); | 1429 EmitOperand(dst & 7, operand); |
| 1430 } | 1430 } |
| 1431 | 1431 |
| 1432 | 1432 |
| 1433 void Assembler::cmpb(const Address& address, const Immediate& imm) { |
| 1434 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1435 EmitOperandREX(7, address, REX_NONE); |
| 1436 EmitUint8(0x80); |
| 1437 EmitOperand(7, address); |
| 1438 ASSERT(imm.is_int8()); |
| 1439 EmitUint8(imm.value() & 0xFF); |
| 1440 } |
| 1441 |
| 1442 |
| 1433 void Assembler::cmpl(Register reg, const Immediate& imm) { | 1443 void Assembler::cmpl(Register reg, const Immediate& imm) { |
| 1434 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1444 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1435 EmitRegisterREX(reg, REX_NONE); | 1445 EmitRegisterREX(reg, REX_NONE); |
| 1436 EmitComplex(7, Operand(reg), imm); | 1446 EmitComplex(7, Operand(reg), imm); |
| 1437 } | 1447 } |
| 1438 | 1448 |
| 1439 | 1449 |
| 1440 void Assembler::cmpl(Register reg0, Register reg1) { | 1450 void Assembler::cmpl(Register reg0, Register reg1) { |
| 1441 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1451 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1442 Operand operand(reg1); | 1452 Operand operand(reg1); |
| (...skipping 1930 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 3373 } | 3383 } |
| 3374 | 3384 |
| 3375 | 3385 |
| 3376 void Assembler::CompareClassId(Register object, intptr_t class_id) { | 3386 void Assembler::CompareClassId(Register object, intptr_t class_id) { |
| 3377 LoadClassId(TMP, object); | 3387 LoadClassId(TMP, object); |
| 3378 cmpl(TMP, Immediate(class_id)); | 3388 cmpl(TMP, Immediate(class_id)); |
| 3379 } | 3389 } |
| 3380 | 3390 |
| 3381 | 3391 |
| 3382 void Assembler::LoadTaggedClassIdMayBeSmi(Register result, Register object) { | 3392 void Assembler::LoadTaggedClassIdMayBeSmi(Register result, Register object) { |
| 3383 ASSERT(object != TMP); | 3393 ASSERT(result != object); |
| 3384 ASSERT(result != TMP); | |
| 3385 | 3394 |
| 3386 // Make a copy of object since result and object can be the same register. | |
| 3387 movq(TMP, object); | |
| 3388 // Load up a null object. We only need it so we can use LoadClassId on it in | 3395 // Load up a null object. We only need it so we can use LoadClassId on it in |
| 3389 // the case that object is a Smi. | 3396 // the case that object is a Smi. |
| 3390 LoadObject(result, Object::null_object(), PP); | 3397 LoadObject(result, Object::null_object(), PP); |
| 3391 // Check if the object is a Smi. | 3398 // Check if the object is a Smi. |
| 3392 testq(TMP, Immediate(kSmiTagMask)); | 3399 testq(object, Immediate(kSmiTagMask)); |
| 3393 // If the object *is* a Smi, load the null object into tmp. o/w leave alone. | 3400 // If the object *is* a Smi, use the null object instead. |
| 3394 cmoveq(TMP, result); | 3401 cmoveq(object, result); |
| 3395 // Loads either the cid of the object if it isn't a Smi, or the cid of null | 3402 // Loads either the cid of the object if it isn't a Smi, or the cid of null |
| 3396 // if it is a Smi, which will be ignored. | 3403 // if it is a Smi, which will be ignored. |
| 3397 LoadClassId(result, TMP); | 3404 LoadClassId(result, object); |
| 3398 | 3405 |
| 3399 movq(TMP, Immediate(kSmiCid)); | 3406 movq(object, Immediate(kSmiCid)); |
| 3400 // If object is a Smi, move the Smi cid into result. o/w leave alone. | 3407 // If object is a Smi, move the Smi cid into result. o/w leave alone. |
| 3401 cmoveq(result, TMP); | 3408 cmoveq(result, object); |
| 3402 // Finally, tag the result. | 3409 // Finally, tag the result. |
| 3403 SmiTag(result); | 3410 SmiTag(result); |
| 3404 } | 3411 } |
| 3405 | 3412 |
| 3406 | 3413 |
| 3407 static const char* cpu_reg_names[kNumberOfCpuRegisters] = { | 3414 static const char* cpu_reg_names[kNumberOfCpuRegisters] = { |
| 3408 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", | 3415 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", |
| 3409 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | 3416 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" |
| 3410 }; | 3417 }; |
| 3411 | 3418 |
| (...skipping 11 matching lines...) Expand all Loading... |
| 3423 | 3430 |
| 3424 | 3431 |
| 3425 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3432 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 3426 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); | 3433 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); |
| 3427 return xmm_reg_names[reg]; | 3434 return xmm_reg_names[reg]; |
| 3428 } | 3435 } |
| 3429 | 3436 |
| 3430 } // namespace dart | 3437 } // namespace dart |
| 3431 | 3438 |
| 3432 #endif // defined TARGET_ARCH_X64 | 3439 #endif // defined TARGET_ARCH_X64 |
| OLD | NEW |