OLD | NEW |
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_IA32) | 6 #if defined(TARGET_ARCH_IA32) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/code_generator.h" | 9 #include "vm/code_generator.h" |
10 #include "vm/cpu.h" | 10 #include "vm/cpu.h" |
(...skipping 1397 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1408 EmitOperand(reg, address); | 1408 EmitOperand(reg, address); |
1409 } | 1409 } |
1410 | 1410 |
1411 | 1411 |
1412 void Assembler::cmpl(const Address& address, const Immediate& imm) { | 1412 void Assembler::cmpl(const Address& address, const Immediate& imm) { |
1413 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1413 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
1414 EmitComplex(7, address, imm); | 1414 EmitComplex(7, address, imm); |
1415 } | 1415 } |
1416 | 1416 |
1417 | 1417 |
| 1418 void Assembler::cmpb(const Address& address, const Immediate& imm) { |
| 1419 ASSERT(imm.is_int8()); |
| 1420 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1421 EmitUint8(0x80); |
| 1422 EmitOperand(7, address); |
| 1423 EmitUint8(imm.value() & 0xFF); |
| 1424 } |
| 1425 |
| 1426 |
1418 void Assembler::testl(Register reg1, Register reg2) { | 1427 void Assembler::testl(Register reg1, Register reg2) { |
1419 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1428 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
1420 EmitUint8(0x85); | 1429 EmitUint8(0x85); |
1421 EmitRegisterOperand(reg1, reg2); | 1430 EmitRegisterOperand(reg1, reg2); |
1422 } | 1431 } |
1423 | 1432 |
1424 | 1433 |
1425 void Assembler::testl(Register reg, const Immediate& immediate) { | 1434 void Assembler::testl(Register reg, const Immediate& immediate) { |
1426 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1435 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
1427 // For registers that have a byte variant (EAX, EBX, ECX, and EDX) | 1436 // For registers that have a byte variant (EAX, EBX, ECX, and EDX) |
(...skipping 1277 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2705 | 2714 |
2706 | 2715 |
2707 void Assembler::CompareClassId(Register object, | 2716 void Assembler::CompareClassId(Register object, |
2708 intptr_t class_id, | 2717 intptr_t class_id, |
2709 Register scratch) { | 2718 Register scratch) { |
2710 LoadClassId(scratch, object); | 2719 LoadClassId(scratch, object); |
2711 cmpl(scratch, Immediate(class_id)); | 2720 cmpl(scratch, Immediate(class_id)); |
2712 } | 2721 } |
2713 | 2722 |
2714 | 2723 |
2715 void Assembler::LoadTaggedClassIdMayBeSmi( | 2724 void Assembler::LoadTaggedClassIdMayBeSmi(Register result, Register object) { |
2716 Register result, Register object, Register tmp) { | 2725 ASSERT(result != object); |
2717 ASSERT(object != tmp); | |
2718 ASSERT(result != tmp); | |
2719 static const intptr_t kSmiCidSource = kSmiCid << RawObject::kClassIdTagPos; | 2726 static const intptr_t kSmiCidSource = kSmiCid << RawObject::kClassIdTagPos; |
2720 | 2727 |
2721 if (result == object) { | |
2722 movl(tmp, object); | |
2723 } else { | |
2724 tmp = object; | |
2725 } | |
2726 | |
2727 // Make a dummy "Object" whose cid is kSmiCid. | 2728 // Make a dummy "Object" whose cid is kSmiCid. |
2728 movl(result, Immediate(reinterpret_cast<int32_t>(&kSmiCidSource) + 1)); | 2729 movl(result, Immediate(reinterpret_cast<int32_t>(&kSmiCidSource) + 1)); |
2729 | 2730 |
2730 // Check if object (in tmp) is a Smi. | 2731 // Check if object (in tmp) is a Smi. |
2731 testl(tmp, Immediate(kSmiTagMask)); | 2732 testl(object, Immediate(kSmiTagMask)); |
2732 | 2733 |
2733 // If the object is not a Smi, use the original object to load the cid. | 2734 // If the object is not a Smi, use the original object to load the cid. |
2734 // Otherwise, the dummy object is used, and the result is kSmiCid. | 2735 // Otherwise, the dummy object is used, and the result is kSmiCid. |
2735 cmovne(result, tmp); | 2736 cmovne(result, object); |
2736 LoadClassId(result, result); | 2737 LoadClassId(result, result); |
2737 | 2738 |
2738 // Tag the result. | 2739 // Tag the result. |
2739 SmiTag(result); | 2740 SmiTag(result); |
2740 } | 2741 } |
2741 | 2742 |
2742 | 2743 |
2743 static const char* cpu_reg_names[kNumberOfCpuRegisters] = { | 2744 static const char* cpu_reg_names[kNumberOfCpuRegisters] = { |
2744 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi" | 2745 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi" |
2745 }; | 2746 }; |
(...skipping 12 matching lines...) Expand all Loading... |
2758 | 2759 |
2759 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 2760 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
2760 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); | 2761 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); |
2761 return xmm_reg_names[reg]; | 2762 return xmm_reg_names[reg]; |
2762 } | 2763 } |
2763 | 2764 |
2764 | 2765 |
2765 } // namespace dart | 2766 } // namespace dart |
2766 | 2767 |
2767 #endif // defined TARGET_ARCH_IA32 | 2768 #endif // defined TARGET_ARCH_IA32 |
OLD | NEW |