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Issue 392343002: Cleanup of class id loading sequences. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 5 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/longjump.h" 10 #include "vm/longjump.h"
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1721 1721
1722 void Assembler::CompareClassId(Register object, 1722 void Assembler::CompareClassId(Register object,
1723 intptr_t class_id, 1723 intptr_t class_id,
1724 Register scratch) { 1724 Register scratch) {
1725 LoadClassId(scratch, object); 1725 LoadClassId(scratch, object);
1726 CompareImmediate(scratch, class_id); 1726 CompareImmediate(scratch, class_id);
1727 } 1727 }
1728 1728
1729 1729
1730 void Assembler::LoadTaggedClassIdMayBeSmi(Register result, Register object) { 1730 void Assembler::LoadTaggedClassIdMayBeSmi(Register result, Register object) {
1731 static const intptr_t kSmiCidSource = kSmiCid << RawObject::kClassIdTagPos;
1732
1733 LoadImmediate(TMP, reinterpret_cast<int32_t>(&kSmiCidSource) + 1);
1731 tst(object, Operand(kSmiTagMask)); 1734 tst(object, Operand(kSmiTagMask));
1732 LoadImmediate(result, Smi::RawValue(kSmiCid), EQ); 1735 mov(TMP, Operand(object), NE);
1733 LoadClassId(result, object, NE); 1736 LoadClassId(result, TMP);
1734 SmiTag(result, NE); 1737 SmiTag(result);
1735 } 1738 }
1736 1739
1737 1740
1738 static bool CanEncodeBranchOffset(int32_t offset) { 1741 static bool CanEncodeBranchOffset(int32_t offset) {
1739 ASSERT(Utils::IsAligned(offset, 4)); 1742 ASSERT(Utils::IsAligned(offset, 4));
1740 return Utils::IsInt(Utils::CountOneBits(kBranchOffsetMask), offset); 1743 return Utils::IsInt(Utils::CountOneBits(kBranchOffsetMask), offset);
1741 } 1744 }
1742 1745
1743 1746
1744 int32_t Assembler::EncodeBranchOffset(int32_t offset, int32_t inst) { 1747 int32_t Assembler::EncodeBranchOffset(int32_t offset, int32_t inst) {
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3242 3245
3243 3246
3244 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3247 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3245 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3248 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3246 return fpu_reg_names[reg]; 3249 return fpu_reg_names[reg];
3247 } 3250 }
3248 3251
3249 } // namespace dart 3252 } // namespace dart
3250 3253
3251 #endif // defined TARGET_ARCH_ARM 3254 #endif // defined TARGET_ARCH_ARM
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