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Issue 392343002: Cleanup of class id loading sequences. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 5 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/compiler.h" 10 #include "vm/compiler.h"
(...skipping 1414 matching lines...) Expand 10 before | Expand all | Expand 10 after
1425 __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag); 1425 __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
1426 // T0: points directly to the first ic data array element. 1426 // T0: points directly to the first ic data array element.
1427 1427
1428 // Get the receiver's class ID (first read number of arguments from 1428 // Get the receiver's class ID (first read number of arguments from
1429 // arguments descriptor array and then access the receiver from the stack). 1429 // arguments descriptor array and then access the receiver from the stack).
1430 __ lw(T1, FieldAddress(S4, ArgumentsDescriptor::count_offset())); 1430 __ lw(T1, FieldAddress(S4, ArgumentsDescriptor::count_offset()));
1431 __ LoadImmediate(TMP, Smi::RawValue(1)); 1431 __ LoadImmediate(TMP, Smi::RawValue(1));
1432 __ subu(T1, T1, TMP); 1432 __ subu(T1, T1, TMP);
1433 __ sll(T3, T1, 1); // T1 (argument_count - 1) is smi. 1433 __ sll(T3, T1, 1); // T1 (argument_count - 1) is smi.
1434 __ addu(T3, T3, SP); 1434 __ addu(T3, T3, SP);
1435 __ lw(T3, Address(T3)); 1435 __ lw(T4, Address(T3));
1436 __ LoadTaggedClassIdMayBeSmi(T3, T3); 1436 __ LoadTaggedClassIdMayBeSmi(T3, T4);
1437 1437
1438 // T1: argument_count - 1 (smi). 1438 // T1: argument_count - 1 (smi).
1439 // T3: receiver's class ID (smi). 1439 // T3: receiver's class ID (smi).
1440 __ b(&test); 1440 __ b(&test);
1441 __ delay_slot()->lw(T4, Address(T0)); // First class id (smi) to check. 1441 __ delay_slot()->lw(T4, Address(T0)); // First class id (smi) to check.
1442 1442
1443 __ Bind(&loop); 1443 __ Bind(&loop);
1444 for (int i = 0; i < num_args; i++) { 1444 for (int i = 0; i < num_args; i++) {
1445 if (i > 0) { 1445 if (i > 0) {
1446 // If not the first, load the next argument's class ID. 1446 // If not the first, load the next argument's class ID.
1447 __ LoadImmediate(T3, Smi::RawValue(-i)); 1447 __ LoadImmediate(T3, Smi::RawValue(-i));
1448 __ addu(T3, T1, T3); 1448 __ addu(T3, T1, T3);
1449 __ sll(T3, T3, 1); 1449 __ sll(T3, T3, 1);
1450 __ addu(T3, SP, T3); 1450 __ addu(T3, SP, T3);
1451 __ lw(T3, Address(T3)); 1451 __ lw(T4, Address(T3));
1452 __ LoadTaggedClassIdMayBeSmi(T3, T3); 1452 __ LoadTaggedClassIdMayBeSmi(T3, T4);
1453 // T3: next argument class ID (smi). 1453 // T3: next argument class ID (smi).
1454 __ lw(T4, Address(T0, i * kWordSize)); 1454 __ lw(T4, Address(T0, i * kWordSize));
1455 // T4: next class ID to check (smi). 1455 // T4: next class ID to check (smi).
1456 } 1456 }
1457 if (i < (num_args - 1)) { 1457 if (i < (num_args - 1)) {
1458 __ bne(T3, T4, &update); // Continue. 1458 __ bne(T3, T4, &update); // Continue.
1459 } else { 1459 } else {
1460 // Last check, all checks before matched. 1460 // Last check, all checks before matched.
1461 Label skip; 1461 Label skip;
1462 __ bne(T3, T4, &skip); 1462 __ bne(T3, T4, &skip);
1463 __ b(&found); // Break. 1463 __ b(&found); // Break.
1464 __ delay_slot()->mov(RA, T2); // Restore return address if found. 1464 __ delay_slot()->mov(RA, T2); // Restore return address if found.
1465 __ Bind(&skip); 1465 __ Bind(&skip);
1466 } 1466 }
1467 } 1467 }
1468 __ Bind(&update); 1468 __ Bind(&update);
1469 // Reload receiver class ID. It has not been destroyed when num_args == 1. 1469 // Reload receiver class ID. It has not been destroyed when num_args == 1.
1470 if (num_args > 1) { 1470 if (num_args > 1) {
1471 __ sll(T3, T1, 1); 1471 __ sll(T3, T1, 1);
1472 __ addu(T3, T3, SP); 1472 __ addu(T3, T3, SP);
1473 __ lw(T3, Address(T3)); 1473 __ lw(T4, Address(T3));
1474 __ LoadTaggedClassIdMayBeSmi(T3, T3); 1474 __ LoadTaggedClassIdMayBeSmi(T3, T4);
1475 } 1475 }
1476 1476
1477 const intptr_t entry_size = ICData::TestEntryLengthFor(num_args) * kWordSize; 1477 const intptr_t entry_size = ICData::TestEntryLengthFor(num_args) * kWordSize;
1478 __ AddImmediate(T0, entry_size); // Next entry. 1478 __ AddImmediate(T0, entry_size); // Next entry.
1479 __ lw(T4, Address(T0)); // Next class ID. 1479 __ lw(T4, Address(T0)); // Next class ID.
1480 1480
1481 __ Bind(&test); 1481 __ Bind(&test);
1482 __ BranchNotEqual(T4, Smi::RawValue(kIllegalCid), &loop); // Done? 1482 __ BranchNotEqual(T4, Smi::RawValue(kIllegalCid), &loop); // Done?
1483 1483
1484 // IC miss. 1484 // IC miss.
(...skipping 619 matching lines...) Expand 10 before | Expand all | Expand 10 after
2104 const Register right = T0; 2104 const Register right = T0;
2105 __ lw(left, Address(SP, 1 * kWordSize)); 2105 __ lw(left, Address(SP, 1 * kWordSize));
2106 __ lw(right, Address(SP, 0 * kWordSize)); 2106 __ lw(right, Address(SP, 0 * kWordSize));
2107 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); 2107 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
2108 __ Ret(); 2108 __ Ret();
2109 } 2109 }
2110 2110
2111 } // namespace dart 2111 } // namespace dart
2112 2112
2113 #endif // defined TARGET_ARCH_MIPS 2113 #endif // defined TARGET_ARCH_MIPS
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