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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/v8.h" | 5 #include "src/v8.h" |
6 | 6 |
7 #if V8_TARGET_ARCH_X64 | 7 #if V8_TARGET_ARCH_X64 |
8 | 8 |
9 #include "src/bootstrapper.h" | 9 #include "src/bootstrapper.h" |
10 #include "src/codegen.h" | 10 #include "src/codegen.h" |
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5013 | 5013 |
5014 call(function); | 5014 call(function); |
5015 ASSERT(base::OS::ActivationFrameAlignment() != 0); | 5015 ASSERT(base::OS::ActivationFrameAlignment() != 0); |
5016 ASSERT(num_arguments >= 0); | 5016 ASSERT(num_arguments >= 0); |
5017 int argument_slots_on_stack = | 5017 int argument_slots_on_stack = |
5018 ArgumentStackSlotsForCFunctionCall(num_arguments); | 5018 ArgumentStackSlotsForCFunctionCall(num_arguments); |
5019 movp(rsp, Operand(rsp, argument_slots_on_stack * kRegisterSize)); | 5019 movp(rsp, Operand(rsp, argument_slots_on_stack * kRegisterSize)); |
5020 } | 5020 } |
5021 | 5021 |
5022 | 5022 |
5023 bool AreAliased(Register r1, Register r2, Register r3, Register r4) { | 5023 #ifdef DEBUG |
5024 if (r1.is(r2)) return true; | 5024 bool AreAliased(Register reg1, |
5025 if (r1.is(r3)) return true; | 5025 Register reg2, |
5026 if (r1.is(r4)) return true; | 5026 Register reg3, |
5027 if (r2.is(r3)) return true; | 5027 Register reg4, |
5028 if (r2.is(r4)) return true; | 5028 Register reg5, |
5029 if (r3.is(r4)) return true; | 5029 Register reg6, |
5030 return false; | 5030 Register reg7, |
| 5031 Register reg8) { |
| 5032 int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() + |
| 5033 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + |
| 5034 reg7.is_valid() + reg8.is_valid(); |
| 5035 |
| 5036 RegList regs = 0; |
| 5037 if (reg1.is_valid()) regs |= reg1.bit(); |
| 5038 if (reg2.is_valid()) regs |= reg2.bit(); |
| 5039 if (reg3.is_valid()) regs |= reg3.bit(); |
| 5040 if (reg4.is_valid()) regs |= reg4.bit(); |
| 5041 if (reg5.is_valid()) regs |= reg5.bit(); |
| 5042 if (reg6.is_valid()) regs |= reg6.bit(); |
| 5043 if (reg7.is_valid()) regs |= reg7.bit(); |
| 5044 if (reg8.is_valid()) regs |= reg8.bit(); |
| 5045 int n_of_non_aliasing_regs = NumRegs(regs); |
| 5046 |
| 5047 return n_of_valid_regs != n_of_non_aliasing_regs; |
5031 } | 5048 } |
| 5049 #endif |
5032 | 5050 |
5033 | 5051 |
5034 CodePatcher::CodePatcher(byte* address, int size) | 5052 CodePatcher::CodePatcher(byte* address, int size) |
5035 : address_(address), | 5053 : address_(address), |
5036 size_(size), | 5054 size_(size), |
5037 masm_(NULL, address, size + Assembler::kGap) { | 5055 masm_(NULL, address, size + Assembler::kGap) { |
5038 // Create a new macro assembler pointing to the address of the code to patch. | 5056 // Create a new macro assembler pointing to the address of the code to patch. |
5039 // The size is adjusted with kGap on order for the assembler to generate size | 5057 // The size is adjusted with kGap on order for the assembler to generate size |
5040 // bytes of instructions without failing with buffer size constraints. | 5058 // bytes of instructions without failing with buffer size constraints. |
5041 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap); | 5059 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap); |
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5355 if (ms.shift() > 0) sarl(rdx, Immediate(ms.shift())); | 5373 if (ms.shift() > 0) sarl(rdx, Immediate(ms.shift())); |
5356 movl(rax, dividend); | 5374 movl(rax, dividend); |
5357 shrl(rax, Immediate(31)); | 5375 shrl(rax, Immediate(31)); |
5358 addl(rdx, rax); | 5376 addl(rdx, rax); |
5359 } | 5377 } |
5360 | 5378 |
5361 | 5379 |
5362 } } // namespace v8::internal | 5380 } } // namespace v8::internal |
5363 | 5381 |
5364 #endif // V8_TARGET_ARCH_X64 | 5382 #endif // V8_TARGET_ARCH_X64 |
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