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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 6 | 6 |
| 7 #include "src/v8.h" | 7 #include "src/v8.h" |
| 8 | 8 |
| 9 #if V8_TARGET_ARCH_ARM | 9 #if V8_TARGET_ARCH_ARM |
| 10 | 10 |
| (...skipping 4032 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 4043 b(ne, &loop_again); | 4043 b(ne, &loop_again); |
| 4044 } | 4044 } |
| 4045 | 4045 |
| 4046 | 4046 |
| 4047 #ifdef DEBUG | 4047 #ifdef DEBUG |
| 4048 bool AreAliased(Register reg1, | 4048 bool AreAliased(Register reg1, |
| 4049 Register reg2, | 4049 Register reg2, |
| 4050 Register reg3, | 4050 Register reg3, |
| 4051 Register reg4, | 4051 Register reg4, |
| 4052 Register reg5, | 4052 Register reg5, |
| 4053 Register reg6) { | 4053 Register reg6, |
| 4054 Register reg7, |
| 4055 Register reg8) { |
| 4054 int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() + | 4056 int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() + |
| 4055 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid(); | 4057 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + |
| 4058 reg7.is_valid() + reg8.is_valid(); |
| 4056 | 4059 |
| 4057 RegList regs = 0; | 4060 RegList regs = 0; |
| 4058 if (reg1.is_valid()) regs |= reg1.bit(); | 4061 if (reg1.is_valid()) regs |= reg1.bit(); |
| 4059 if (reg2.is_valid()) regs |= reg2.bit(); | 4062 if (reg2.is_valid()) regs |= reg2.bit(); |
| 4060 if (reg3.is_valid()) regs |= reg3.bit(); | 4063 if (reg3.is_valid()) regs |= reg3.bit(); |
| 4061 if (reg4.is_valid()) regs |= reg4.bit(); | 4064 if (reg4.is_valid()) regs |= reg4.bit(); |
| 4062 if (reg5.is_valid()) regs |= reg5.bit(); | 4065 if (reg5.is_valid()) regs |= reg5.bit(); |
| 4063 if (reg6.is_valid()) regs |= reg6.bit(); | 4066 if (reg6.is_valid()) regs |= reg6.bit(); |
| 4067 if (reg7.is_valid()) regs |= reg7.bit(); |
| 4068 if (reg8.is_valid()) regs |= reg8.bit(); |
| 4064 int n_of_non_aliasing_regs = NumRegs(regs); | 4069 int n_of_non_aliasing_regs = NumRegs(regs); |
| 4065 | 4070 |
| 4066 return n_of_valid_regs != n_of_non_aliasing_regs; | 4071 return n_of_valid_regs != n_of_non_aliasing_regs; |
| 4067 } | 4072 } |
| 4068 #endif | 4073 #endif |
| 4069 | 4074 |
| 4070 | 4075 |
| 4071 CodePatcher::CodePatcher(byte* address, | 4076 CodePatcher::CodePatcher(byte* address, |
| 4072 int instructions, | 4077 int instructions, |
| 4073 FlushICache flush_cache) | 4078 FlushICache flush_cache) |
| (...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 4127 sub(result, result, Operand(dividend)); | 4132 sub(result, result, Operand(dividend)); |
| 4128 } | 4133 } |
| 4129 if (ms.shift() > 0) mov(result, Operand(result, ASR, ms.shift())); | 4134 if (ms.shift() > 0) mov(result, Operand(result, ASR, ms.shift())); |
| 4130 add(result, result, Operand(dividend, LSR, 31)); | 4135 add(result, result, Operand(dividend, LSR, 31)); |
| 4131 } | 4136 } |
| 4132 | 4137 |
| 4133 | 4138 |
| 4134 } } // namespace v8::internal | 4139 } } // namespace v8::internal |
| 4135 | 4140 |
| 4136 #endif // V8_TARGET_ARCH_ARM | 4141 #endif // V8_TARGET_ARCH_ARM |
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