Moves infrequently used debugger code in CheckInlineCachestub.

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 1387 matching lines @@
     __ lw(T0, FieldAddress(S5, ICData::state_bits_offset()));
     ASSERT(ICData::NumArgsTestedShift() == 0);  // No shift needed.
     __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask()));
     __ BranchEqual(T0, num_args, &ok);
     __ Stop("Incorrect stub for IC data");
     __ Bind(&ok);
   }
 #endif  // DEBUG
 
 
+  Label stepping, done_stepping;
   if (FLAG_enable_debugger) {
     // Check single stepping.
-    Label not_stepping;
     __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
     __ lbu(T0, Address(T0, Isolate::single_step_offset()));
-    __ BranchEqual(T0, 0, &not_stepping);
-    // Call single step callback in debugger.
-    __ EnterStubFrame();
-    __ addiu(SP, SP, Immediate(-2 * kWordSize));
-    __ sw(S5, Address(SP, 1 * kWordSize));  // Preserve IC data.
-    __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
-    __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
-    __ lw(RA, Address(SP, 0 * kWordSize));
-    __ lw(S5, Address(SP, 1 * kWordSize));
-    __ addiu(SP, SP, Immediate(2 * kWordSize));
-    __ LeaveStubFrame();
-    __ Bind(&not_stepping);
+    __ BranchNotEqual(T0, 0, &stepping);
+    __ Bind(&done_stepping);
   }
 
   // Load argument descriptor into S4.
   __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
   // Preserve return address, since RA is needed for subroutine call.
   __ mov(T2, RA);
   // Loop that checks if there is an IC data match.
   Label loop, update, test, found;
   // S5: IC data object (preserved).
   __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
@@ skipping 114 matching lines @@
   __ movz(T4, T7, CMPRES1);
   __ sw(T4, Address(T0, count_offset));
 
   __ Bind(&call_target_function);
   // T0 <- T3: Target function.
   __ mov(T0, T3);
   Label is_compiled;
   __ lw(T4, FieldAddress(T0, Function::instructions_offset()));
   __ AddImmediate(T4, Instructions::HeaderSize() - kHeapObjectTag);
   __ jr(T4);
+
+  if (FLAG_enable_debugger) {
+    // Call single step callback in debugger.
+    __ Bind(&stepping);
+    __ EnterStubFrame();
+    __ addiu(SP, SP, Immediate(-2 * kWordSize));
+    __ sw(S5, Address(SP, 1 * kWordSize));  // Preserve IC data.
+    __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
+    __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
+    __ lw(RA, Address(SP, 0 * kWordSize));
+    __ lw(S5, Address(SP, 1 * kWordSize));
+    __ addiu(SP, SP, Immediate(2 * kWordSize));
+    __ LeaveStubFrame();
+    __ b(&done_stepping);
+  }
 }
 
 
 // Use inline cache data array to invoke the target or continue in inline
 // cache miss handler. Stub for 1-argument check (receiver class).
 //  RA: Return address.
 //  S5: Inline cache data object.
 // Inline cache data object structure:
 // 0: function-name
 // 1: N, number of arguments checked.
@@ skipping 493 matching lines @@
   const Register right = T0;
   __ lw(left, Address(SP, 1 * kWordSize));
   __ lw(right, Address(SP, 0 * kWordSize));
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS