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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
| 6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/code_generator.h" | 9 #include "vm/code_generator.h" |
| 10 #include "vm/cpu.h" | 10 #include "vm/cpu.h" |
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| 1245 __ ldr(R6, FieldAddress(R5, ICData::state_bits_offset())); | 1245 __ ldr(R6, FieldAddress(R5, ICData::state_bits_offset())); |
| 1246 ASSERT(ICData::NumArgsTestedShift() == 0); // No shift needed. | 1246 ASSERT(ICData::NumArgsTestedShift() == 0); // No shift needed. |
| 1247 __ and_(R6, R6, Operand(ICData::NumArgsTestedMask())); | 1247 __ and_(R6, R6, Operand(ICData::NumArgsTestedMask())); |
| 1248 __ CompareImmediate(R6, num_args); | 1248 __ CompareImmediate(R6, num_args); |
| 1249 __ b(&ok, EQ); | 1249 __ b(&ok, EQ); |
| 1250 __ Stop("Incorrect stub for IC data"); | 1250 __ Stop("Incorrect stub for IC data"); |
| 1251 __ Bind(&ok); | 1251 __ Bind(&ok); |
| 1252 } | 1252 } |
| 1253 #endif // DEBUG | 1253 #endif // DEBUG |
| 1254 | 1254 |
| 1255 Label stepping, done_stepping; |
| 1255 if (FLAG_enable_debugger) { | 1256 if (FLAG_enable_debugger) { |
| 1256 // Check single stepping. | 1257 // Check single stepping. |
| 1257 Label not_stepping; | |
| 1258 __ ldr(R6, FieldAddress(CTX, Context::isolate_offset())); | 1258 __ ldr(R6, FieldAddress(CTX, Context::isolate_offset())); |
| 1259 __ ldrb(R6, Address(R6, Isolate::single_step_offset())); | 1259 __ ldrb(R6, Address(R6, Isolate::single_step_offset())); |
| 1260 __ CompareImmediate(R6, 0); | 1260 __ CompareImmediate(R6, 0); |
| 1261 __ b(¬_stepping, EQ); | 1261 __ b(&stepping, NE); |
| 1262 __ EnterStubFrame(); | 1262 __ Bind(&done_stepping); |
| 1263 __ Push(R5); // Preserve IC data. | |
| 1264 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); | |
| 1265 __ Pop(R5); | |
| 1266 __ LeaveStubFrame(); | |
| 1267 __ Bind(¬_stepping); | |
| 1268 } | 1263 } |
| 1269 | 1264 |
| 1270 // Load arguments descriptor into R4. | 1265 // Load arguments descriptor into R4. |
| 1271 __ ldr(R4, FieldAddress(R5, ICData::arguments_descriptor_offset())); | 1266 __ ldr(R4, FieldAddress(R5, ICData::arguments_descriptor_offset())); |
| 1272 // Preserve return address, since LR is needed for subroutine call. | 1267 // Preserve return address, since LR is needed for subroutine call. |
| 1273 __ mov(R8, Operand(LR)); | 1268 __ mov(R8, Operand(LR)); |
| 1274 // Loop that checks if there is an IC data match. | 1269 // Loop that checks if there is an IC data match. |
| 1275 Label loop, update, test, found; | 1270 Label loop, update, test, found; |
| 1276 // R5: IC data object (preserved). | 1271 // R5: IC data object (preserved). |
| 1277 __ ldr(R6, FieldAddress(R5, ICData::ic_data_offset())); | 1272 __ ldr(R6, FieldAddress(R5, ICData::ic_data_offset())); |
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| 1367 __ LoadFromOffset(kWord, R1, R6, count_offset); | 1362 __ LoadFromOffset(kWord, R1, R6, count_offset); |
| 1368 __ adds(R1, R1, Operand(Smi::RawValue(1))); | 1363 __ adds(R1, R1, Operand(Smi::RawValue(1))); |
| 1369 __ LoadImmediate(R1, Smi::RawValue(Smi::kMaxValue), VS); // Overflow. | 1364 __ LoadImmediate(R1, Smi::RawValue(Smi::kMaxValue), VS); // Overflow. |
| 1370 __ StoreToOffset(kWord, R1, R6, count_offset); | 1365 __ StoreToOffset(kWord, R1, R6, count_offset); |
| 1371 | 1366 |
| 1372 __ Bind(&call_target_function); | 1367 __ Bind(&call_target_function); |
| 1373 // R0: target function. | 1368 // R0: target function. |
| 1374 __ ldr(R2, FieldAddress(R0, Function::instructions_offset())); | 1369 __ ldr(R2, FieldAddress(R0, Function::instructions_offset())); |
| 1375 __ AddImmediate(R2, Instructions::HeaderSize() - kHeapObjectTag); | 1370 __ AddImmediate(R2, Instructions::HeaderSize() - kHeapObjectTag); |
| 1376 __ bx(R2); | 1371 __ bx(R2); |
| 1372 |
| 1373 if (FLAG_enable_debugger) { |
| 1374 __ Bind(&stepping); |
| 1375 __ EnterStubFrame(); |
| 1376 __ Push(R5); // Preserve IC data. |
| 1377 __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0); |
| 1378 __ Pop(R5); |
| 1379 __ LeaveStubFrame(); |
| 1380 __ b(&done_stepping); |
| 1381 } |
| 1377 } | 1382 } |
| 1378 | 1383 |
| 1379 | 1384 |
| 1380 // Use inline cache data array to invoke the target or continue in inline | 1385 // Use inline cache data array to invoke the target or continue in inline |
| 1381 // cache miss handler. Stub for 1-argument check (receiver class). | 1386 // cache miss handler. Stub for 1-argument check (receiver class). |
| 1382 // LR: return address. | 1387 // LR: return address. |
| 1383 // R5: inline cache data object. | 1388 // R5: inline cache data object. |
| 1384 // Inline cache data object structure: | 1389 // Inline cache data object structure: |
| 1385 // 0: function-name | 1390 // 0: function-name |
| 1386 // 1: N, number of arguments checked. | 1391 // 1: N, number of arguments checked. |
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| 1832 const Register right = R0; | 1837 const Register right = R0; |
| 1833 __ ldr(left, Address(SP, 1 * kWordSize)); | 1838 __ ldr(left, Address(SP, 1 * kWordSize)); |
| 1834 __ ldr(right, Address(SP, 0 * kWordSize)); | 1839 __ ldr(right, Address(SP, 0 * kWordSize)); |
| 1835 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp); | 1840 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp); |
| 1836 __ Ret(); | 1841 __ Ret(); |
| 1837 } | 1842 } |
| 1838 | 1843 |
| 1839 } // namespace dart | 1844 } // namespace dart |
| 1840 | 1845 |
| 1841 #endif // defined TARGET_ARCH_ARM | 1846 #endif // defined TARGET_ARCH_ARM |
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