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Issue 384703002: Revert r38116 because of crashes. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 5 months ago
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1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/disassembler.h" 5 #include "vm/disassembler.h"
6 6
7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32.
8 #if defined(TARGET_ARCH_IA32) 8 #if defined(TARGET_ARCH_IA32)
9 #include "platform/utils.h" 9 #include "platform/utils.h"
10 #include "vm/allocation.h" 10 #include "vm/allocation.h"
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232 case 0x16: return "movlhps"; 232 case 0x16: return "movlhps";
233 case 0xA2: return "cpuid"; 233 case 0xA2: return "cpuid";
234 case 0x31: return "rdtsc"; 234 case 0x31: return "rdtsc";
235 case 0xBE: return "movsx_b"; 235 case 0xBE: return "movsx_b";
236 case 0xBF: return "movsx_w"; 236 case 0xBF: return "movsx_w";
237 case 0xB6: return "movzx_b"; 237 case 0xB6: return "movzx_b";
238 case 0xB7: return "movzx_w"; 238 case 0xB7: return "movzx_w";
239 case 0xAF: return "imul"; 239 case 0xAF: return "imul";
240 case 0xA5: return "shld"; 240 case 0xA5: return "shld";
241 case 0xAD: return "shrd"; 241 case 0xAD: return "shrd";
242 case 0xA3: return "bt";
243 case 0xAB: return "bts"; 242 case 0xAB: return "bts";
244 case 0xBD: return "bsr"; 243 case 0xBD: return "bsr";
245 case 0xB1: return "cmpxchg"; 244 case 0xB1: return "cmpxchg";
246 case 0x50: return "movmskps"; 245 case 0x50: return "movmskps";
247 case 0x51: return "sqrtps"; 246 case 0x51: return "sqrtps";
248 case 0x52: return "rqstps"; 247 case 0x52: return "rqstps";
249 case 0x53: return "rcpps"; 248 case 0x53: return "rcpps";
250 case 0x54: return "andps"; 249 case 0x54: return "andps";
251 case 0x56: return "orps"; 250 case 0x56: return "orps";
252 case 0x57: return "xorps"; 251 case 0x57: return "xorps";
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1403 *(data+3) == 0x00 && 1402 *(data+3) == 0x00 &&
1404 *(data+3) == 0x00 && 1403 *(data+3) == 0x00 &&
1405 *(data+4) == 0x00) { 1404 *(data+4) == 0x00) {
1406 Print("nop"); 1405 Print("nop");
1407 data += 8; 1406 data += 8;
1408 } else { 1407 } else {
1409 UNIMPLEMENTED(); 1408 UNIMPLEMENTED();
1410 } 1409 }
1411 } else { 1410 } else {
1412 data += 2; 1411 data += 2;
1413 if (f0byte == 0xAB || 1412 if (f0byte == 0xAB || f0byte == 0xA5 || f0byte == 0xAD) {
1414 f0byte == 0xA5 || 1413 // shrd, shld, bts
1415 f0byte == 0xAD ||
1416 f0byte == 0xA3) {
1417 // shrd, shld, bts, bt
1418 Print(f0mnem); 1414 Print(f0mnem);
1419 int mod, regop, rm; 1415 int mod, regop, rm;
1420 GetModRm(*data, &mod, &regop, &rm); 1416 GetModRm(*data, &mod, &regop, &rm);
1421 Print(" "); 1417 Print(" ");
1422 data += PrintRightOperand(data); 1418 data += PrintRightOperand(data);
1423 if (f0byte == 0xAB || f0byte == 0xA3) { 1419 if (f0byte == 0xAB) {
1424 Print(","); 1420 Print(",");
1425 PrintCPURegister(regop); 1421 PrintCPURegister(regop);
1426 } else { 1422 } else {
1427 Print(","); 1423 Print(",");
1428 PrintCPURegister(regop); 1424 PrintCPURegister(regop);
1429 Print(",cl"); 1425 Print(",cl");
1430 } 1426 }
1431 } else if ((f0byte == 0x10) || (f0byte == 0x11) || 1427 } else if ((f0byte == 0x10) || (f0byte == 0x11) ||
1432 IsTwoXmmRegInstruction(f0byte)) { 1428 IsTwoXmmRegInstruction(f0byte)) {
1433 data = SSEInstruction(0x0F, f0byte, data); 1429 data = SSEInstruction(0x0F, f0byte, data);
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1811 default: 1807 default:
1812 OS::Print("Unknown case %#x\n", *data); 1808 OS::Print("Unknown case %#x\n", *data);
1813 UNIMPLEMENTED(); 1809 UNIMPLEMENTED();
1814 } 1810 }
1815 } 1811 }
1816 1812
1817 int instr_len = data - reinterpret_cast<uint8_t*>(pc); 1813 int instr_len = data - reinterpret_cast<uint8_t*>(pc);
1818 ASSERT(instr_len > 0); // Ensure progress. 1814 ASSERT(instr_len > 0); // Ensure progress.
1819 1815
1820 return instr_len; 1816 return instr_len;
1821 } // NOLINT 1817 }
1822 1818
1823 1819
1824 void Disassembler::DecodeInstruction(char* hex_buffer, intptr_t hex_size, 1820 void Disassembler::DecodeInstruction(char* hex_buffer, intptr_t hex_size,
1825 char* human_buffer, intptr_t human_size, 1821 char* human_buffer, intptr_t human_size,
1826 int* out_instr_len, uword pc) { 1822 int* out_instr_len, uword pc) {
1827 ASSERT(hex_size > 0); 1823 ASSERT(hex_size > 0);
1828 ASSERT(human_size > 0); 1824 ASSERT(human_size > 0);
1829 X86Decoder decoder(human_buffer, human_size); 1825 X86Decoder decoder(human_buffer, human_size);
1830 int instruction_length = decoder.InstructionDecode(pc); 1826 int instruction_length = decoder.InstructionDecode(pc);
1831 uint8_t* pc_ptr = reinterpret_cast<uint8_t*>(pc); 1827 uint8_t* pc_ptr = reinterpret_cast<uint8_t*>(pc);
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1874 pc); 1870 pc);
1875 pc += instruction_length; 1871 pc += instruction_length;
1876 } 1872 }
1877 1873
1878 return; 1874 return;
1879 } 1875 }
1880 1876
1881 } // namespace dart 1877 } // namespace dart
1882 1878
1883 #endif // defined TARGET_ARCH_IA32 1879 #endif // defined TARGET_ARCH_IA32
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