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1 ; This file tests bitcasts of vector type. For most operations, these | |
2 ; should be lowered to a no-op on -O2. | |
3 | |
4 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s | |
5 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck %s --check-prefix=OPTM1 | |
6 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s | |
7 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s | |
8 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ | |
9 ; RUN: | FileCheck --check-prefix=DUMP %s | |
10 | |
11 define <16 x i8> @test_bitcast_v16i8_to_v16i8(<16 x i8> %arg) { | |
12 entry: | |
13 %res = bitcast <16 x i8> %arg to <16 x i8> | |
14 ret <16 x i8> %res | |
15 | |
16 ; CHECK-LABEL: test_bitcast_v16i8_to_v16i8: | |
17 ; CHECK: .L{{.*}}entry: | |
18 ; CHECK-NEXT: ret | |
19 } | |
20 | |
21 define <8 x i16> @test_bitcast_v16i8_to_v8i16(<16 x i8> %arg) { | |
22 entry: | |
23 %res = bitcast <16 x i8> %arg to <8 x i16> | |
24 ret <8 x i16> %res | |
25 | |
26 ; CHECK-LABEL: test_bitcast_v16i8_to_v8i16: | |
27 ; CHECK: .L{{.*}}entry: | |
28 ; CHECK-NEXT: ret | |
29 } | |
30 | |
31 define <4 x i32> @test_bitcast_v16i8_to_v4i32(<16 x i8> %arg) { | |
32 entry: | |
33 %res = bitcast <16 x i8> %arg to <4 x i32> | |
34 ret <4 x i32> %res | |
35 | |
36 ; CHECK-LABEL: test_bitcast_v16i8_to_v4i32: | |
37 ; CHECK: .L{{.*}}entry: | |
38 ; CHECK-NEXT: ret | |
39 } | |
40 | |
41 define <4 x float> @test_bitcast_v16i8_to_v4f32(<16 x i8> %arg) { | |
42 entry: | |
43 %res = bitcast <16 x i8> %arg to <4 x float> | |
44 ret <4 x float> %res | |
45 | |
46 ; CHECK-LABEL: test_bitcast_v16i8_to_v4f32: | |
47 ; CHECK: .L{{.*}}entry: | |
48 ; CHECK-NEXT: ret | |
49 } | |
50 | |
51 define <16 x i8> @test_bitcast_v8i16_to_v16i8(<8 x i16> %arg) { | |
52 entry: | |
53 %res = bitcast <8 x i16> %arg to <16 x i8> | |
54 ret <16 x i8> %res | |
55 | |
56 ; CHECK-LABEL: test_bitcast_v8i16_to_v16i8: | |
57 ; CHECK: .L{{.*}}entry: | |
58 ; CHECK-NEXT: ret | |
59 } | |
60 | |
61 define <8 x i16> @test_bitcast_v8i16_to_v8i16(<8 x i16> %arg) { | |
62 entry: | |
63 %res = bitcast <8 x i16> %arg to <8 x i16> | |
64 ret <8 x i16> %res | |
65 | |
66 ; CHECK-LABEL: test_bitcast_v8i16_to_v8i16: | |
67 ; CHECK: .L{{.*}}entry: | |
68 ; CHECK-NEXT: ret | |
69 } | |
70 | |
71 define <4 x i32> @test_bitcast_v8i16_to_v4i32(<8 x i16> %arg) { | |
72 entry: | |
73 %res = bitcast <8 x i16> %arg to <4 x i32> | |
74 ret <4 x i32> %res | |
75 | |
76 ; CHECK-LABEL: test_bitcast_v8i16_to_v4i32: | |
77 ; CHECK: .L{{.*}}entry: | |
78 ; CHECK-NEXT: ret | |
79 } | |
80 | |
81 define <4 x float> @test_bitcast_v8i16_to_v4f32(<8 x i16> %arg) { | |
82 entry: | |
83 %res = bitcast <8 x i16> %arg to <4 x float> | |
84 ret <4 x float> %res | |
85 | |
86 ; CHECK-LABEL: test_bitcast_v8i16_to_v4f32: | |
87 ; CHECK: .L{{.*}}entry: | |
88 ; CHECK-NEXT: ret | |
89 } | |
90 | |
91 define <16 x i8> @test_bitcast_v4i32_to_v16i8(<4 x i32> %arg) { | |
92 entry: | |
93 %res = bitcast <4 x i32> %arg to <16 x i8> | |
94 ret <16 x i8> %res | |
95 | |
96 ; CHECK-LABEL: test_bitcast_v4i32_to_v16i8: | |
97 ; CHECK: .L{{.*}}entry: | |
98 ; CHECK-NEXT: ret | |
99 } | |
100 | |
101 define <8 x i16> @test_bitcast_v4i32_to_v8i16(<4 x i32> %arg) { | |
102 entry: | |
103 %res = bitcast <4 x i32> %arg to <8 x i16> | |
104 ret <8 x i16> %res | |
105 | |
106 ; CHECK-LABEL: test_bitcast_v4i32_to_v8i16: | |
107 ; CHECK: .L{{.*}}entry: | |
108 ; CHECK-NEXT: ret | |
109 } | |
110 | |
111 define <4 x i32> @test_bitcast_v4i32_to_v4i32(<4 x i32> %arg) { | |
112 entry: | |
113 %res = bitcast <4 x i32> %arg to <4 x i32> | |
114 ret <4 x i32> %res | |
115 | |
116 ; CHECK-LABEL: test_bitcast_v4i32_to_v4i32: | |
117 ; CHECK: .L{{.*}}entry: | |
118 ; CHECK-NEXT: ret | |
119 } | |
120 | |
121 define <4 x float> @test_bitcast_v4i32_to_v4f32(<4 x i32> %arg) { | |
122 entry: | |
123 %res = bitcast <4 x i32> %arg to <4 x float> | |
124 ret <4 x float> %res | |
125 | |
126 ; CHECK-LABEL: test_bitcast_v4i32_to_v4f32: | |
127 ; CHECK: .L{{.*}}entry: | |
128 ; CHECK-NEXT: ret | |
129 } | |
130 | |
131 define <16 x i8> @test_bitcast_v4f32_to_v16i8(<4 x float> %arg) { | |
132 entry: | |
133 %res = bitcast <4 x float> %arg to <16 x i8> | |
134 ret <16 x i8> %res | |
135 | |
136 ; CHECK-LABEL: test_bitcast_v4f32_to_v16i8: | |
137 ; CHECK: .L{{.*}}entry: | |
138 ; CHECK-NEXT: ret | |
139 } | |
140 | |
141 define <8 x i16> @test_bitcast_v4f32_to_v8i16(<4 x float> %arg) { | |
142 entry: | |
143 %res = bitcast <4 x float> %arg to <8 x i16> | |
144 ret <8 x i16> %res | |
145 | |
146 ; CHECK-LABEL: test_bitcast_v4f32_to_v8i16: | |
147 ; CHECK: .L{{.*}}entry: | |
148 ; CHECK-NEXT: ret | |
149 } | |
150 | |
151 define <4 x i32> @test_bitcast_v4f32_to_v4i32(<4 x float> %arg) { | |
152 entry: | |
153 %res = bitcast <4 x float> %arg to <4 x i32> | |
154 ret <4 x i32> %res | |
155 | |
156 ; CHECK-LABEL: test_bitcast_v4f32_to_v4i32: | |
157 ; CHECK: .L{{.*}}entry: | |
158 ; CHECK-NEXT: ret | |
159 } | |
160 | |
161 define <4 x float> @test_bitcast_v4f32_to_v4f32(<4 x float> %arg) { | |
162 entry: | |
163 %res = bitcast <4 x float> %arg to <4 x float> | |
164 ret <4 x float> %res | |
165 | |
166 ; CHECK-LABEL: test_bitcast_v4f32_to_v4f32: | |
167 ; CHECK: .L{{.*}}entry: | |
168 ; CHECK-NEXT: ret | |
169 } | |
170 | |
171 define i8 @test_bitcast_v8i1_to_i8(<8 x i1> %arg) { | |
172 entry: | |
173 %res = bitcast <8 x i1> %arg to i8 | |
174 ret i8 %res | |
175 | |
176 ; CHECK-LABEL: test_bitcast_v8i1_to_i8: | |
177 ; CHECK: call Sz_bitcast_v8i1_to_i8 | |
178 | |
179 ; OPTM1-LABEL: test_bitcast_v8i1_to_i8: | |
180 ; OPMT1: call Sz_bitcast_v8i1_to_i8 | |
181 } | |
182 | |
183 define i16 @test_bitcast_v16i1_to_i16(<16 x i1> %arg) { | |
184 entry: | |
185 %res = bitcast <16 x i1> %arg to i16 | |
186 ret i16 %res | |
187 | |
188 ; CHECK-LABEL: test_bitcast_v16i1_to_i16: | |
189 ; CHECK: call Sz_bitcast_v16i1_to_i16 | |
jvoung (off chromium)
2014/07/16 00:01:38
Could add the OPTM1 check here too?
wala
2014/07/16 17:19:01
Done.
| |
190 } | |
191 | |
192 define <8 x i1> @test_bitcast_i8_to_v8i1(i8 %arg) { | |
jvoung (off chromium)
2014/07/16 00:01:38
Technically, the PNaCl bitcode ABI doesn't allow a
wala
2014/07/16 17:19:01
Done.
| |
193 entry: | |
194 %res = bitcast i8 %arg to <8 x i1> | |
195 ret <8 x i1> %res | |
196 | |
197 ; CHECK-LABEL: test_bitcast_i8_to_v8i1: | |
198 ; CHECK: call Sz_bitcast_i8_to_v8i1 | |
199 | |
200 ; OPTM1-LABEL: test_bitcast_i8_to_v8i1: | |
201 ; OPTM1: call Sz_bitcast_i8_to_v8i1 | |
202 } | |
203 | |
204 define <16 x i1> @test_bitcast_i16_to_v16i1(i16 %arg) { | |
205 entry: | |
206 %res = bitcast i16 %arg to <16 x i1> | |
207 ret <16 x i1> %res | |
208 | |
209 ; CHECK-LABEL: test_bitcast_i16_to_v16i1: | |
210 ; CHECK: call Sz_bitcast_i16_to_v16i1 | |
211 | |
212 ; OPTM1-LABEL: test_bitcast_i16_to_v16i1: | |
213 ; OPTM1: call Sz_bitcast_i16_to_v16i1 | |
214 } | |
215 | |
216 ; ERRORS-NOT: ICE translation error | |
217 ; DUMP-NOT: SZ | |
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