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| 1 ; This file checks that Subzero generates code in accordance with the |
| 2 ; calling convention for vectors. |
| 3 |
| 4 ; NOTE: CHECK / OPTM1 lines containing the following strings may be |
| 5 ; subject to change: |
| 6 ; |
| 7 ; * movups: The movups instruction may be changed to movaps when the |
| 8 ; load / store operation is 16 byte aligned. |
| 9 ; |
| 10 ; * stack offsets: These may need to be changed if stack alignment |
| 11 ; support is implemented. |
| 12 ; |
| 13 ; * stack adjustment operations |
| 14 |
| 15 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s |
| 16 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s |
| 17 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
| 18 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s |
| 19 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ |
| 20 ; RUN: | FileCheck --check-prefix=DUMP %s |
| 21 |
| 22 ; The first five functions test that vectors are moved from their |
| 23 ; correct argument location to xmm0. |
| 24 |
| 25 define <4 x float> @test_returning_arg0(<4 x float> %arg0, <4 x float> %arg1, <4
x float> %arg2, <4 x float> %arg3, <4 x float> %arg4, <4 x float> %arg5) { |
| 26 entry: |
| 27 ret <4 x float> %arg0 |
| 28 ; CHECK-LABEL: test_returning_arg0: |
| 29 ; CHECK-NOT: mov |
| 30 ; CHECK: ret |
| 31 |
| 32 ; OPTM1-LABEL: test_returning_arg0: |
| 33 ; OPTM1: movups xmmword ptr [[LOC:.*]], xmm0 |
| 34 ; OPTM1: movups xmm0, xmmword ptr [[LOC]] |
| 35 ; OPTM1: ret |
| 36 } |
| 37 |
| 38 define <4 x float> @test_returning_arg1(<4 x float> %arg0, <4 x float> %arg1, <4
x float> %arg2, <4 x float> %arg3, <4 x float> %arg4, <4 x float> %arg5) { |
| 39 entry: |
| 40 ret <4 x float> %arg1 |
| 41 ; CHECK-LABEL: test_returning_arg1: |
| 42 ; CHECK: movups xmm0, xmm1 |
| 43 ; CHECK: ret |
| 44 |
| 45 ; OPTM1-LABEL: test_returning_arg1: |
| 46 ; OPTM1: movups xmmword ptr [[LOC:.*]], xmm1 |
| 47 ; OPTM1: movups xmm0, xmmword ptr [[LOC]] |
| 48 ; OPTM1: ret |
| 49 } |
| 50 |
| 51 define <4 x float> @test_returning_arg2(<4 x float> %arg0, <4 x float> %arg1, <4
x float> %arg2, <4 x float> %arg3, <4 x float> %arg4, <4 x float> %arg5) { |
| 52 entry: |
| 53 ret <4 x float> %arg2 |
| 54 ; CHECK-LABEL: test_returning_arg2: |
| 55 ; CHECK: movups xmm0, xmm2 |
| 56 ; CHECK: ret |
| 57 |
| 58 ; OPTM1-LABEL: test_returning_arg2: |
| 59 ; OPTM1: movups xmmword ptr [[LOC:.*]], xmm2 |
| 60 ; OPTM1: movups xmm0, xmmword ptr [[LOC]] |
| 61 ; OPTM1: ret |
| 62 } |
| 63 |
| 64 define <4 x float> @test_returning_arg3(<4 x float> %arg0, <4 x float> %arg1, <4
x float> %arg2, <4 x float> %arg3, <4 x float> %arg4, <4 x float> %arg5) { |
| 65 entry: |
| 66 ret <4 x float> %arg3 |
| 67 ; CHECK-LABEL: test_returning_arg3: |
| 68 ; CHECK: movups xmm0, xmm3 |
| 69 ; CHECK: ret |
| 70 |
| 71 ; OPTM1-LABEL: test_returning_arg3: |
| 72 ; OPTM1: movups xmmword ptr [[LOC:.*]], xmm3 |
| 73 ; OPTM1: movups xmm0, xmmword ptr [[LOC]] |
| 74 ; OPTM1: ret |
| 75 } |
| 76 |
| 77 define <4 x float> @test_returning_arg4(<4 x float> %arg0, <4 x float> %arg1, <4
x float> %arg2, <4 x float> %arg3, <4 x float> %arg4, <4 x float> %arg5) { |
| 78 entry: |
| 79 ret <4 x float> %arg4 |
| 80 ; CHECK-LABEL: test_returning_arg4: |
| 81 ; CHECK: movups xmm0, xmmword ptr [esp+4] |
| 82 ; CHECK: ret |
| 83 |
| 84 ; OPTM1-LABEL: test_returning_arg4: |
| 85 ; OPTM1: movups xmm0, xmmword ptr {{.*}} |
| 86 ; OPTM1: ret |
| 87 } |
| 88 |
| 89 ; The next five functions check that xmm arguments are handled |
| 90 ; correctly when interspersed with stack arguments in the argument |
| 91 ; list. |
| 92 |
| 93 define <4 x float> @test_returning_interspersed_arg0(i32 %i32arg0, double %doubl
earg0, <4 x float> %arg0, <4 x float> %arg1, i32 %i32arg1, <4 x float> %arg2, do
uble %doublearg1, <4 x float> %arg3, i32 %i32arg2, double %doublearg2, float %fl
oatarg0, <4 x float> %arg4, <4 x float> %arg5, float %floatarg1) { |
| 94 entry: |
| 95 ret <4 x float> %arg0 |
| 96 ; CHECK-LABEL: test_returning_interspersed_arg0: |
| 97 ; CHECK-NOT: mov |
| 98 ; CHECK: ret |
| 99 |
| 100 ; OPTM1-LABEL: test_returning_interspersed_arg0: |
| 101 ; OPTM1: movups xmmword ptr [[LOC:.*]], xmm0 |
| 102 ; OPTM1: movups xmm0, xmmword ptr [[LOC]] |
| 103 ; OPTM1: ret |
| 104 } |
| 105 |
| 106 define <4 x float> @test_returning_interspersed_arg1(i32 %i32arg0, double %doubl
earg0, <4 x float> %arg0, <4 x float> %arg1, i32 %i32arg1, <4 x float> %arg2, do
uble %doublearg1, <4 x float> %arg3, i32 %i32arg2, double %doublearg2, float %fl
oatarg0, <4 x float> %arg4, <4 x float> %arg5, float %floatarg1) { |
| 107 entry: |
| 108 ret <4 x float> %arg1 |
| 109 ; CHECK-LABEL: test_returning_interspersed_arg1: |
| 110 ; CHECK: movups xmm0, xmm1 |
| 111 ; CHECK: ret |
| 112 |
| 113 ; OPTM1-LABEL: test_returning_interspersed_arg1: |
| 114 ; OPTM1: movups xmmword ptr [[LOC:.*]], xmm1 |
| 115 ; OPTM1: movups xmm0, xmmword ptr [[LOC]] |
| 116 ; OPTM1: ret |
| 117 } |
| 118 |
| 119 define <4 x float> @test_returning_interspersed_arg2(i32 %i32arg0, double %doubl
earg0, <4 x float> %arg0, <4 x float> %arg1, i32 %i32arg1, <4 x float> %arg2, do
uble %doublearg1, <4 x float> %arg3, i32 %i32arg2, double %doublearg2, float %fl
oatarg0, <4 x float> %arg4, <4 x float> %arg5, float %floatarg1) { |
| 120 entry: |
| 121 ret <4 x float> %arg2 |
| 122 ; CHECK-LABEL: test_returning_interspersed_arg2: |
| 123 ; CHECK: movups xmm0, xmm2 |
| 124 ; CHECK: ret |
| 125 |
| 126 ; OPTM1-LABEL: test_returning_interspersed_arg2: |
| 127 ; OPTM1: movups xmmword ptr [[LOC:.*]], xmm2 |
| 128 ; OPTM1: movups xmm0, xmmword ptr [[LOC]] |
| 129 ; OPTM1: ret |
| 130 } |
| 131 |
| 132 define <4 x float> @test_returning_interspersed_arg3(i32 %i32arg0, double %doubl
earg0, <4 x float> %arg0, <4 x float> %arg1, i32 %i32arg1, <4 x float> %arg2, do
uble %doublearg1, <4 x float> %arg3, i32 %i32arg2, double %doublearg2, float %fl
oatarg0, <4 x float> %arg4, <4 x float> %arg5, float %floatarg1) { |
| 133 entry: |
| 134 ret <4 x float> %arg3 |
| 135 ; CHECK-LABEL: test_returning_interspersed_arg3: |
| 136 ; CHECK: movups xmm0, xmm3 |
| 137 ; CHECK: ret |
| 138 |
| 139 ; OPTM1-LABEL: test_returning_interspersed_arg3: |
| 140 ; OPTM1: movups xmmword ptr [[LOC:.*]], xmm3 |
| 141 ; OPTM1: movups xmm0, xmmword ptr [[LOC]] |
| 142 ; OPTM1: ret |
| 143 } |
| 144 |
| 145 define <4 x float> @test_returning_interspersed_arg4(i32 %i32arg0, double %doubl
earg0, <4 x float> %arg0, <4 x float> %arg1, i32 %i32arg1, <4 x float> %arg2, do
uble %doublearg1, <4 x float> %arg3, i32 %i32arg2, double %doublearg2, float %fl
oatarg0, <4 x float> %arg4, <4 x float> %arg5, float %floatarg1) { |
| 146 entry: |
| 147 ret <4 x float> %arg4 |
| 148 ; CHECK-LABEL: test_returning_interspersed_arg4: |
| 149 ; CHECK: movups xmm0, xmmword ptr [esp+44] |
| 150 ; CHECK: ret |
| 151 |
| 152 ; OPTM1-LABEL: test_returning_interspersed_arg4: |
| 153 ; OPTM1: movups xmm0, xmmword ptr {{.*}} |
| 154 ; OPTM1: ret |
| 155 } |
| 156 |
| 157 ; Test that vectors are passed correctly as arguments to a function. |
| 158 |
| 159 declare void @VectorArgs(<4 x float>, <4 x float>, <4 x float>, <4 x float>, <4
x float>, <4 x float>) |
| 160 |
| 161 declare void @killXmmRegisters() |
| 162 |
| 163 define void @test_passing_vectors(<4 x float> %arg0, <4 x float> %arg1, <4 x flo
at> %arg2, <4 x float> %arg3, <4 x float> %arg4, <4 x float> %arg5, <4 x float>
%arg6, <4 x float> %arg7, <4 x float> %arg8, <4 x float> %arg9) { |
| 164 entry: |
| 165 ; Kills XMM registers so that no in-arg lowering code interferes |
| 166 ; with the test. |
| 167 call void @killXmmRegisters() |
| 168 call void @VectorArgs(<4 x float> %arg9, <4 x float> %arg8, <4 x float> %arg7,
<4 x float> %arg6, <4 x float> %arg5, <4 x float> %arg4) |
| 169 ret void |
| 170 ; CHECK-LABEL: test_passing_vectors: |
| 171 ; CHECK: movups [[ARG6:.*]], xmmword ptr [esp+4] |
| 172 ; CHECK: sub esp, 16 |
| 173 ; CHECK-NEXT: movups xmmword ptr [esp], [[ARG6]] |
| 174 ; CHECK: movups [[ARG5:.*]], xmmword ptr [esp+36] |
| 175 ; CHECK: sub esp, 16 |
| 176 ; CHECK-NEXT: movups xmmword ptr [esp], [[ARG5]] |
| 177 ; CHECK: movups xmm0, xmmword ptr [esp+116] |
| 178 ; CHECK: movups xmm1, xmmword ptr [esp+100] |
| 179 ; CHECK: movups xmm2, xmmword ptr [esp+84] |
| 180 ; CHECK: movups xmm3, xmmword ptr [esp+68] |
| 181 ; CHECK: call VectorArgs |
| 182 ; CHECK-NEXT: add esp, 32 |
| 183 ; CHECK: ret |
| 184 |
| 185 ; OPTM1-LABEL: test_passing_vectors: |
| 186 ; OPTM1: movups [[ARG6:.*]], xmmword ptr {{.*}} |
| 187 ; OPTM1: sub esp, 16 |
| 188 ; OPTM1: movups xmmword ptr [esp], [[ARG6]] |
| 189 ; OPTM1: movups [[ARG5:.*]], xmmword ptr {{.*}} |
| 190 ; OPTM1: sub esp, 16 |
| 191 ; OPTM1-NEXT: movups xmmword ptr [esp], [[ARG5]] |
| 192 ; OPTM1: movups xmm0, xmmword ptr {{.*}} |
| 193 ; OPTM1: movups xmm1, xmmword ptr {{.*}} |
| 194 ; OPTM1: movups xmm2, xmmword ptr {{.*}} |
| 195 ; OPTM1: movups xmm3, xmmword ptr {{.*}} |
| 196 ; OPTM1: call VectorArgs |
| 197 ; OPTM1: add esp, 32 |
| 198 ; OPTM1: ret |
| 199 } |
| 200 |
| 201 ; Test that a vector returned from a function is recognized to be in |
| 202 ; xmm0. |
| 203 |
| 204 declare <4 x float> @VectorReturn(<4 x float> %arg0) |
| 205 |
| 206 define void @test_receiving_vectors(<4 x float> %arg0) { |
| 207 entry: |
| 208 %result = call <4 x float> @VectorReturn(<4 x float> %arg0) |
| 209 %result2 = call <4 x float> @VectorReturn(<4 x float> %result) |
| 210 ret void |
| 211 ; CHECK-LABEL: test_receiving_vectors: |
| 212 ; CHECK: call VectorReturn |
| 213 ; CHECK-NOT: movups xmm0 |
| 214 ; CHECK: call VectorReturn |
| 215 ; CHECK: ret |
| 216 |
| 217 ; OPTM1-LABEL: test_receiving_vectors: |
| 218 ; OPTM1: call VectorReturn |
| 219 ; OPTM1: movups [[LOC:.*]], xmm0 |
| 220 ; OPTM1: movups xmm0, [[LOC]] |
| 221 ; OPTM1: call VectorReturn |
| 222 ; OPTM1: ret |
| 223 } |
| 224 |
| 225 ; ERRORS-NOT: ICE translation error |
| 226 ; DUMP-NOT: SZ |
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