OLD | NEW |
1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the TargetLoweringX8632 class, which | 10 // This file implements the TargetLoweringX8632 class, which |
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78 #undef X | 78 #undef X |
79 }; | 79 }; |
80 const size_t TableIcmp64Size = llvm::array_lengthof(TableIcmp64); | 80 const size_t TableIcmp64Size = llvm::array_lengthof(TableIcmp64); |
81 | 81 |
82 InstX8632Br::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) { | 82 InstX8632Br::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) { |
83 size_t Index = static_cast<size_t>(Cond); | 83 size_t Index = static_cast<size_t>(Cond); |
84 assert(Index < TableIcmp32Size); | 84 assert(Index < TableIcmp32Size); |
85 return TableIcmp32[Index].Mapping; | 85 return TableIcmp32[Index].Mapping; |
86 } | 86 } |
87 | 87 |
| 88 // The maximum number of arguments to pass in XMM registers |
| 89 const unsigned X86_MAX_XMM_ARGS = 4; |
| 90 |
88 // In some cases, there are x-macros tables for both high-level and | 91 // In some cases, there are x-macros tables for both high-level and |
89 // low-level instructions/operands that use the same enum key value. | 92 // low-level instructions/operands that use the same enum key value. |
90 // The tables are kept separate to maintain a proper separation | 93 // The tables are kept separate to maintain a proper separation |
91 // between abstraction layers. There is a risk that the tables | 94 // between abstraction layers. There is a risk that the tables |
92 // could get out of sync if enum values are reordered or if entries | 95 // could get out of sync if enum values are reordered or if entries |
93 // are added or deleted. This dummy function uses static_assert to | 96 // are added or deleted. This dummy function uses static_assert to |
94 // ensure everything is kept in sync. | 97 // ensure everything is kept in sync. |
95 void xMacroIntegrityCheck() { | 98 void xMacroIntegrityCheck() { |
96 // Validate the enum values in FCMPX8632_TABLE. | 99 // Validate the enum values in FCMPX8632_TABLE. |
97 { | 100 { |
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240 if (Func->hasError()) | 243 if (Func->hasError()) |
241 return; | 244 return; |
242 T_deletePhis.printElapsedUs(Context, "deletePhis()"); | 245 T_deletePhis.printElapsedUs(Context, "deletePhis()"); |
243 Func->dump("After Phi lowering"); | 246 Func->dump("After Phi lowering"); |
244 | 247 |
245 // Address mode optimization. | 248 // Address mode optimization. |
246 Timer T_doAddressOpt; | 249 Timer T_doAddressOpt; |
247 Func->doAddressOpt(); | 250 Func->doAddressOpt(); |
248 T_doAddressOpt.printElapsedUs(Context, "doAddressOpt()"); | 251 T_doAddressOpt.printElapsedUs(Context, "doAddressOpt()"); |
249 | 252 |
| 253 // Argument lowering |
| 254 Timer T_argLowering; |
| 255 Func->doArgLowering(); |
| 256 T_argLowering.printElapsedUs(Context, "lowerArguments()"); |
| 257 |
250 // Target lowering. This requires liveness analysis for some parts | 258 // Target lowering. This requires liveness analysis for some parts |
251 // of the lowering decisions, such as compare/branch fusing. If | 259 // of the lowering decisions, such as compare/branch fusing. If |
252 // non-lightweight liveness analysis is used, the instructions need | 260 // non-lightweight liveness analysis is used, the instructions need |
253 // to be renumbered first. TODO: This renumbering should only be | 261 // to be renumbered first. TODO: This renumbering should only be |
254 // necessary if we're actually calculating live intervals, which we | 262 // necessary if we're actually calculating live intervals, which we |
255 // only do for register allocation. | 263 // only do for register allocation. |
256 Timer T_renumber1; | 264 Timer T_renumber1; |
257 Func->renumberInstructions(); | 265 Func->renumberInstructions(); |
258 if (Func->hasError()) | 266 if (Func->hasError()) |
259 return; | 267 return; |
260 T_renumber1.printElapsedUs(Context, "renumberInstructions()"); | 268 T_renumber1.printElapsedUs(Context, "renumberInstructions()"); |
| 269 |
261 // TODO: It should be sufficient to use the fastest liveness | 270 // TODO: It should be sufficient to use the fastest liveness |
262 // calculation, i.e. livenessLightweight(). However, for some | 271 // calculation, i.e. livenessLightweight(). However, for some |
263 // reason that slows down the rest of the translation. Investigate. | 272 // reason that slows down the rest of the translation. Investigate. |
264 Timer T_liveness1; | 273 Timer T_liveness1; |
265 Func->liveness(Liveness_Basic); | 274 Func->liveness(Liveness_Basic); |
266 if (Func->hasError()) | 275 if (Func->hasError()) |
267 return; | 276 return; |
268 T_liveness1.printElapsedUs(Context, "liveness()"); | 277 T_liveness1.printElapsedUs(Context, "liveness()"); |
269 Func->dump("After x86 address mode opt"); | 278 Func->dump("After x86 address mode opt"); |
| 279 |
270 Timer T_genCode; | 280 Timer T_genCode; |
271 Func->genCode(); | 281 Func->genCode(); |
272 if (Func->hasError()) | 282 if (Func->hasError()) |
273 return; | 283 return; |
274 T_genCode.printElapsedUs(Context, "genCode()"); | 284 T_genCode.printElapsedUs(Context, "genCode()"); |
275 | 285 |
276 // Register allocation. This requires instruction renumbering and | 286 // Register allocation. This requires instruction renumbering and |
277 // full liveness analysis. | 287 // full liveness analysis. |
278 Timer T_renumber2; | 288 Timer T_renumber2; |
279 Func->renumberInstructions(); | 289 Func->renumberInstructions(); |
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322 if (Func->hasError()) | 332 if (Func->hasError()) |
323 return; | 333 return; |
324 T_placePhiStores.printElapsedUs(Context, "placePhiStores()"); | 334 T_placePhiStores.printElapsedUs(Context, "placePhiStores()"); |
325 Timer T_deletePhis; | 335 Timer T_deletePhis; |
326 Func->deletePhis(); | 336 Func->deletePhis(); |
327 if (Func->hasError()) | 337 if (Func->hasError()) |
328 return; | 338 return; |
329 T_deletePhis.printElapsedUs(Context, "deletePhis()"); | 339 T_deletePhis.printElapsedUs(Context, "deletePhis()"); |
330 Func->dump("After Phi lowering"); | 340 Func->dump("After Phi lowering"); |
331 | 341 |
| 342 Timer T_argLowering; |
| 343 Func->doArgLowering(); |
| 344 T_argLowering.printElapsedUs(Context, "lowerArguments()"); |
| 345 |
332 Timer T_genCode; | 346 Timer T_genCode; |
333 Func->genCode(); | 347 Func->genCode(); |
334 if (Func->hasError()) | 348 if (Func->hasError()) |
335 return; | 349 return; |
336 T_genCode.printElapsedUs(Context, "genCode()"); | 350 T_genCode.printElapsedUs(Context, "genCode()"); |
337 Func->dump("After initial x8632 codegen"); | 351 Func->dump("After initial x8632 codegen"); |
338 | 352 |
339 Timer T_genFrame; | 353 Timer T_genFrame; |
340 Func->genFrame(); | 354 Func->genFrame(); |
341 if (Func->hasError()) | 355 if (Func->hasError()) |
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405 if (!hasFramePointer()) | 419 if (!hasFramePointer()) |
406 Offset += getStackAdjustment(); | 420 Offset += getStackAdjustment(); |
407 if (Offset) { | 421 if (Offset) { |
408 if (Offset > 0) | 422 if (Offset > 0) |
409 Str << "+"; | 423 Str << "+"; |
410 Str << Offset; | 424 Str << Offset; |
411 } | 425 } |
412 Str << "]"; | 426 Str << "]"; |
413 } | 427 } |
414 | 428 |
415 // Helper function for addProlog(). Sets the frame offset for Arg, | 429 void TargetX8632::lowerArguments() { |
416 // updates InArgsSizeBytes according to Arg's width, and generates an | 430 VarList &Args = Func->getArgs(); |
417 // instruction to copy Arg into its assigned register if applicable. | 431 // The first four arguments of vector type, regardless of their |
418 // For an I64 arg that has been split into Lo and Hi components, it | 432 // position relative to the other arguments in the argument list, are |
419 // calls itself recursively on the components, taking care to handle | 433 // passed in registers xmm0 - xmm3. |
420 // Lo first because of the little-endian architecture. | 434 unsigned NumXmmArgs = 0; |
421 void TargetX8632::setArgOffsetAndCopy(Variable *Arg, Variable *FramePtr, | 435 |
422 size_t BasicFrameOffset, | 436 Context.init(Func->getEntryNode()); |
423 size_t &InArgsSizeBytes) { | 437 Context.setInsertPoint(Context.getCur()); |
| 438 |
| 439 for (SizeT I = 0, E = Args.size(); I < E && NumXmmArgs < X86_MAX_XMM_ARGS; |
| 440 ++I) { |
| 441 Variable *Arg = Args[I]; |
| 442 Type Ty = Arg->getType(); |
| 443 if (!isVectorType(Ty)) |
| 444 continue; |
| 445 // Replace Arg in the argument list with the home register. Then |
| 446 // generate an instruction in the prolog to copy the home register |
| 447 // to the assigned location of Arg. |
| 448 int32_t RegNum = Reg_xmm0 + NumXmmArgs; |
| 449 ++NumXmmArgs; |
| 450 IceString Name = "home_reg:" + Arg->getName(); |
| 451 const CfgNode *DefNode = NULL; |
| 452 Variable *RegisterArg = Func->makeVariable(Ty, DefNode, Name); |
| 453 RegisterArg->setRegNum(RegNum); |
| 454 RegisterArg->setIsArg(Func); |
| 455 Arg->setIsArg(Func, false); |
| 456 |
| 457 Args[I] = RegisterArg; |
| 458 Context.insert(InstAssign::create(Func, Arg, RegisterArg)); |
| 459 } |
| 460 } |
| 461 |
| 462 // Helper function for addProlog(). |
| 463 // |
| 464 // This assumes Arg is an argument passed on the stack. This sets the |
| 465 // frame offset for Arg and updates InArgsSizeBytes according to Arg's |
| 466 // width. For an I64 arg that has been split into Lo and Hi components, |
| 467 // it calls itself recursively on the components, taking care to handle |
| 468 // Lo first because of the little-endian architecture. Lastly, this |
| 469 // function generates an instruction to copy Arg into its assigned |
| 470 // register if applicable. |
| 471 void TargetX8632::finishArgumentLowering(Variable *Arg, Variable *FramePtr, |
| 472 size_t BasicFrameOffset, |
| 473 size_t &InArgsSizeBytes) { |
424 Variable *Lo = Arg->getLo(); | 474 Variable *Lo = Arg->getLo(); |
425 Variable *Hi = Arg->getHi(); | 475 Variable *Hi = Arg->getHi(); |
426 Type Ty = Arg->getType(); | 476 Type Ty = Arg->getType(); |
427 if (Lo && Hi && Ty == IceType_i64) { | 477 if (Lo && Hi && Ty == IceType_i64) { |
428 assert(Lo->getType() != IceType_i64); // don't want infinite recursion | 478 assert(Lo->getType() != IceType_i64); // don't want infinite recursion |
429 assert(Hi->getType() != IceType_i64); // don't want infinite recursion | 479 assert(Hi->getType() != IceType_i64); // don't want infinite recursion |
430 setArgOffsetAndCopy(Lo, FramePtr, BasicFrameOffset, InArgsSizeBytes); | 480 finishArgumentLowering(Lo, FramePtr, BasicFrameOffset, InArgsSizeBytes); |
431 setArgOffsetAndCopy(Hi, FramePtr, BasicFrameOffset, InArgsSizeBytes); | 481 finishArgumentLowering(Hi, FramePtr, BasicFrameOffset, InArgsSizeBytes); |
432 return; | 482 return; |
433 } | 483 } |
434 Arg->setStackOffset(BasicFrameOffset + InArgsSizeBytes); | 484 Arg->setStackOffset(BasicFrameOffset + InArgsSizeBytes); |
| 485 InArgsSizeBytes += typeWidthInBytesOnStack(Ty); |
435 if (Arg->hasReg()) { | 486 if (Arg->hasReg()) { |
436 assert(Ty != IceType_i64); | 487 assert(Ty != IceType_i64); |
437 OperandX8632Mem *Mem = OperandX8632Mem::create( | 488 OperandX8632Mem *Mem = OperandX8632Mem::create( |
438 Func, Ty, FramePtr, | 489 Func, Ty, FramePtr, |
439 Ctx->getConstantInt(IceType_i32, Arg->getStackOffset())); | 490 Ctx->getConstantInt(IceType_i32, Arg->getStackOffset())); |
440 _mov(Arg, Mem); | 491 if (isVectorType(Arg->getType())) { |
| 492 _movp(Arg, Mem); |
| 493 } else { |
| 494 _mov(Arg, Mem); |
| 495 } |
441 } | 496 } |
442 InArgsSizeBytes += typeWidthInBytesOnStack(Ty); | |
443 } | 497 } |
444 | 498 |
445 Type TargetX8632::stackSlotType() { return IceType_i32; } | 499 Type TargetX8632::stackSlotType() { return IceType_i32; } |
446 | 500 |
447 void TargetX8632::addProlog(CfgNode *Node) { | 501 void TargetX8632::addProlog(CfgNode *Node) { |
448 // If SimpleCoalescing is false, each variable without a register | 502 // If SimpleCoalescing is false, each variable without a register |
449 // gets its own unique stack slot, which leads to large stack | 503 // gets its own unique stack slot, which leads to large stack |
450 // frames. If SimpleCoalescing is true, then each "global" variable | 504 // frames. If SimpleCoalescing is true, then each "global" variable |
451 // without a register gets its own slot, but "local" variable slots | 505 // without a register gets its own slot, but "local" variable slots |
452 // are reused across basic blocks. E.g., if A and B are local to | 506 // are reused across basic blocks. E.g., if A and B are local to |
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482 RegsUsed = llvm::SmallBitVector(CalleeSaves.size()); | 536 RegsUsed = llvm::SmallBitVector(CalleeSaves.size()); |
483 const VarList &Variables = Func->getVariables(); | 537 const VarList &Variables = Func->getVariables(); |
484 const VarList &Args = Func->getArgs(); | 538 const VarList &Args = Func->getArgs(); |
485 for (VarList::const_iterator I = Variables.begin(), E = Variables.end(); | 539 for (VarList::const_iterator I = Variables.begin(), E = Variables.end(); |
486 I != E; ++I) { | 540 I != E; ++I) { |
487 Variable *Var = *I; | 541 Variable *Var = *I; |
488 if (Var->hasReg()) { | 542 if (Var->hasReg()) { |
489 RegsUsed[Var->getRegNum()] = true; | 543 RegsUsed[Var->getRegNum()] = true; |
490 continue; | 544 continue; |
491 } | 545 } |
492 // An argument passed on the stack already has a stack slot. | 546 // An argument either does not need a stack slot (if passed in a |
| 547 // register) or already has one (if passed on the stack). |
493 if (Var->getIsArg()) | 548 if (Var->getIsArg()) |
494 continue; | 549 continue; |
495 // An unreferenced variable doesn't need a stack slot. | 550 // An unreferenced variable doesn't need a stack slot. |
496 if (ComputedLiveRanges && Var->getLiveRange().isEmpty()) | 551 if (ComputedLiveRanges && Var->getLiveRange().isEmpty()) |
497 continue; | 552 continue; |
498 // A spill slot linked to a variable with a stack slot should reuse | 553 // A spill slot linked to a variable with a stack slot should reuse |
499 // that stack slot. | 554 // that stack slot. |
500 if (Var->getWeight() == RegWeight::Zero && Var->getRegisterOverlap()) { | 555 if (Var->getWeight() == RegWeight::Zero && Var->getRegisterOverlap()) { |
501 if (Variable *Linked = Var->getPreferredRegister()) { | 556 if (Variable *Linked = Var->getPreferredRegister()) { |
502 if (!Linked->hasReg()) | 557 if (!Linked->hasReg()) |
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540 _mov(ebp, esp); | 595 _mov(ebp, esp); |
541 } | 596 } |
542 | 597 |
543 // Generate "sub esp, LocalsSizeBytes" | 598 // Generate "sub esp, LocalsSizeBytes" |
544 if (LocalsSizeBytes) | 599 if (LocalsSizeBytes) |
545 _sub(getPhysicalRegister(Reg_esp), | 600 _sub(getPhysicalRegister(Reg_esp), |
546 Ctx->getConstantInt(IceType_i32, LocalsSizeBytes)); | 601 Ctx->getConstantInt(IceType_i32, LocalsSizeBytes)); |
547 | 602 |
548 resetStackAdjustment(); | 603 resetStackAdjustment(); |
549 | 604 |
550 // Fill in stack offsets for args, and copy args into registers for | 605 // Fill in stack offsets for stack args, and copy args into registers |
551 // those that were register-allocated. Args are pushed right to | 606 // for those that were register-allocated. Args are pushed right to |
552 // left, so Arg[0] is closest to the stack/frame pointer. | 607 // left, so Arg[0] is closest to the stack/frame pointer. |
553 // | |
554 // TODO: Make this right for different width args, calling | |
555 // conventions, etc. For one thing, args passed in registers will | |
556 // need to be copied/shuffled to their home registers (the | |
557 // RegManager code may have some permutation logic to leverage), | |
558 // and if they have no home register, home space will need to be | |
559 // allocated on the stack to copy into. | |
560 Variable *FramePtr = getPhysicalRegister(getFrameOrStackReg()); | 608 Variable *FramePtr = getPhysicalRegister(getFrameOrStackReg()); |
561 size_t BasicFrameOffset = PreservedRegsSizeBytes + RetIpSizeBytes; | 609 size_t BasicFrameOffset = PreservedRegsSizeBytes + RetIpSizeBytes; |
562 if (!IsEbpBasedFrame) | 610 if (!IsEbpBasedFrame) |
563 BasicFrameOffset += LocalsSizeBytes; | 611 BasicFrameOffset += LocalsSizeBytes; |
| 612 |
| 613 unsigned NumXmmArgs = 0; |
564 for (SizeT i = 0; i < Args.size(); ++i) { | 614 for (SizeT i = 0; i < Args.size(); ++i) { |
565 Variable *Arg = Args[i]; | 615 Variable *Arg = Args[i]; |
566 setArgOffsetAndCopy(Arg, FramePtr, BasicFrameOffset, InArgsSizeBytes); | 616 // Skip arguments passed in registers. |
| 617 if (isVectorType(Arg->getType()) && NumXmmArgs < X86_MAX_XMM_ARGS) { |
| 618 ++NumXmmArgs; |
| 619 continue; |
| 620 } |
| 621 finishArgumentLowering(Arg, FramePtr, BasicFrameOffset, InArgsSizeBytes); |
567 } | 622 } |
568 | 623 |
569 // Fill in stack offsets for locals. | 624 // Fill in stack offsets for locals. |
570 size_t TotalGlobalsSize = GlobalsSize; | 625 size_t TotalGlobalsSize = GlobalsSize; |
571 GlobalsSize = 0; | 626 GlobalsSize = 0; |
572 LocalsSize.assign(LocalsSize.size(), 0); | 627 LocalsSize.assign(LocalsSize.size(), 0); |
573 size_t NextStackOffset = 0; | 628 size_t NextStackOffset = 0; |
574 for (VarList::const_iterator I = Variables.begin(), E = Variables.end(); | 629 for (VarList::const_iterator I = Variables.begin(), E = Variables.end(); |
575 I != E; ++I) { | 630 I != E; ++I) { |
576 Variable *Var = *I; | 631 Variable *Var = *I; |
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1246 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); | 1301 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); |
1247 Variable *T_Lo = NULL, *T_Hi = NULL; | 1302 Variable *T_Lo = NULL, *T_Hi = NULL; |
1248 _mov(T_Lo, Src0Lo); | 1303 _mov(T_Lo, Src0Lo); |
1249 _mov(DestLo, T_Lo); | 1304 _mov(DestLo, T_Lo); |
1250 _mov(T_Hi, Src0Hi); | 1305 _mov(T_Hi, Src0Hi); |
1251 _mov(DestHi, T_Hi); | 1306 _mov(DestHi, T_Hi); |
1252 } else { | 1307 } else { |
1253 const bool AllowOverlap = true; | 1308 const bool AllowOverlap = true; |
1254 // RI is either a physical register or an immediate. | 1309 // RI is either a physical register or an immediate. |
1255 Operand *RI = legalize(Src0, Legal_Reg | Legal_Imm, AllowOverlap); | 1310 Operand *RI = legalize(Src0, Legal_Reg | Legal_Imm, AllowOverlap); |
1256 _mov(Dest, RI); | 1311 if (isVectorType(Dest->getType())) |
| 1312 _movp(Dest, RI); |
| 1313 else |
| 1314 _mov(Dest, RI); |
1257 } | 1315 } |
1258 } | 1316 } |
1259 | 1317 |
1260 void TargetX8632::lowerBr(const InstBr *Inst) { | 1318 void TargetX8632::lowerBr(const InstBr *Inst) { |
1261 if (Inst->isUnconditional()) { | 1319 if (Inst->isUnconditional()) { |
1262 _br(Inst->getTargetUnconditional()); | 1320 _br(Inst->getTargetUnconditional()); |
1263 } else { | 1321 } else { |
1264 Operand *Src0 = legalize(Inst->getCondition()); | 1322 Operand *Src0 = legalize(Inst->getCondition()); |
1265 Constant *Zero = Ctx->getConstantZero(IceType_i32); | 1323 Constant *Zero = Ctx->getConstantZero(IceType_i32); |
1266 _cmp(Src0, Zero); | 1324 _cmp(Src0, Zero); |
1267 _br(InstX8632Br::Br_ne, Inst->getTargetTrue(), Inst->getTargetFalse()); | 1325 _br(InstX8632Br::Br_ne, Inst->getTargetTrue(), Inst->getTargetFalse()); |
1268 } | 1326 } |
1269 } | 1327 } |
1270 | 1328 |
1271 void TargetX8632::lowerCall(const InstCall *Instr) { | 1329 void TargetX8632::lowerCall(const InstCall *Instr) { |
1272 // Generate a sequence of push instructions, pushing right to left, | 1330 // Classify each argument operand according to the location where the |
1273 // keeping track of stack offsets in case a push involves a stack | 1331 // argument is passed. |
1274 // operand and we are using an esp-based frame. | 1332 OperandList XmmArgs; |
| 1333 OperandList StackArgs; |
| 1334 for (SizeT i = 0, NumArgs = Instr->getNumArgs(); i < NumArgs; ++i) { |
| 1335 Operand *Arg = Instr->getArg(i); |
| 1336 if (isVectorType(Arg->getType()) && XmmArgs.size() < X86_MAX_XMM_ARGS) { |
| 1337 XmmArgs.push_back(Arg); |
| 1338 } else { |
| 1339 StackArgs.push_back(Arg); |
| 1340 } |
| 1341 } |
| 1342 // For stack arguments, generate a sequence of push instructions, |
| 1343 // pushing right to left, keeping track of stack offsets in case a |
| 1344 // push involves a stack operand and we are using an esp-based frame. |
1275 uint32_t StackOffset = 0; | 1345 uint32_t StackOffset = 0; |
| 1346 // TODO: Consolidate the stack adjustment for function calls by |
| 1347 // reserving enough space for the arguments only once. |
| 1348 // |
1276 // TODO: If for some reason the call instruction gets dead-code | 1349 // TODO: If for some reason the call instruction gets dead-code |
1277 // eliminated after lowering, we would need to ensure that the | 1350 // eliminated after lowering, we would need to ensure that the |
1278 // pre-call push instructions and the post-call esp adjustment get | 1351 // pre-call push instructions and the post-call esp adjustment get |
1279 // eliminated as well. | 1352 // eliminated as well. |
1280 for (SizeT NumArgs = Instr->getNumArgs(), i = 0; i < NumArgs; ++i) { | 1353 for (OperandList::reverse_iterator I = StackArgs.rbegin(), |
1281 Operand *Arg = legalize(Instr->getArg(NumArgs - i - 1)); | 1354 E = StackArgs.rend(); I != E; ++I) { |
| 1355 Operand *Arg = legalize(*I); |
1282 if (Arg->getType() == IceType_i64) { | 1356 if (Arg->getType() == IceType_i64) { |
1283 _push(hiOperand(Arg)); | 1357 _push(hiOperand(Arg)); |
1284 _push(loOperand(Arg)); | 1358 _push(loOperand(Arg)); |
1285 } else if (Arg->getType() == IceType_f64) { | 1359 } else if (Arg->getType() == IceType_f64 || isVectorType(Arg->getType())) { |
1286 // If the Arg turns out to be a memory operand, we need to push | 1360 // If the Arg turns out to be a memory operand, more than one push |
1287 // 8 bytes, which requires two push instructions. This ends up | 1361 // instruction is required. This ends up being somewhat clumsy in |
1288 // being somewhat clumsy in the current IR, so we use a | 1362 // the current IR, so we use a workaround. Force the operand into |
1289 // workaround. Force the operand into a (xmm) register, and | 1363 // a (xmm) register, and then push the register. An xmm register |
1290 // then push the register. An xmm register push is actually not | 1364 // push is actually not possible in x86, but the Push instruction |
1291 // possible in x86, but the Push instruction emitter handles | 1365 // emitter handles this by decrementing the stack pointer and |
1292 // this by decrementing the stack pointer and directly writing | 1366 // directly writing the xmm register value. |
1293 // the xmm register value. | 1367 _push(legalize(Arg, Legal_Reg)); |
1294 Variable *T = NULL; | |
1295 _mov(T, Arg); | |
1296 _push(T); | |
1297 } else { | 1368 } else { |
1298 // Otherwise PNaCl requires parameter types to be at least 32-bits. | 1369 // Otherwise PNaCl requires parameter types to be at least 32-bits. |
1299 assert(Arg->getType() == IceType_f32 || Arg->getType() == IceType_i32); | 1370 assert(Arg->getType() == IceType_f32 || Arg->getType() == IceType_i32); |
1300 _push(Arg); | 1371 _push(Arg); |
1301 } | 1372 } |
1302 StackOffset += typeWidthInBytesOnStack(Arg->getType()); | 1373 StackOffset += typeWidthInBytesOnStack(Arg->getType()); |
1303 } | 1374 } |
| 1375 // Copy arguments to be passed in registers to the appropriate |
| 1376 // registers. |
| 1377 // TODO: Investigate the impact of lowering arguments passed in |
| 1378 // registers after lowering stack arguments as opposed to the other |
| 1379 // way around. Lowering register arguments after stack arguments may |
| 1380 // reduce register pressure. On the other hand, lowering register |
| 1381 // arguments first (before stack arguments) may result in more compact |
| 1382 // code, as the memory operand displacements may end up being smaller |
| 1383 // before any stack adjustment is done. |
| 1384 for (SizeT i = 0, NumXmmArgs = XmmArgs.size(); i < NumXmmArgs; ++i) { |
| 1385 Variable *Reg = legalizeToVar(XmmArgs[i], false, Reg_xmm0 + i); |
| 1386 // Generate a FakeUse of register arguments so that they do not get |
| 1387 // dead code eliminated as a result of the FakeKill of scratch |
| 1388 // registers after the call. |
| 1389 Context.insert(InstFakeUse::create(Func, Reg)); |
| 1390 } |
1304 // Generate the call instruction. Assign its result to a temporary | 1391 // Generate the call instruction. Assign its result to a temporary |
1305 // with high register allocation weight. | 1392 // with high register allocation weight. |
1306 Variable *Dest = Instr->getDest(); | 1393 Variable *Dest = Instr->getDest(); |
1307 Variable *eax = NULL; // doubles as RegLo as necessary | 1394 // ReturnReg doubles as ReturnRegLo as necessary. |
1308 Variable *edx = NULL; | 1395 Variable *ReturnReg = NULL; |
| 1396 Variable *ReturnRegHi = NULL; |
1309 if (Dest) { | 1397 if (Dest) { |
1310 switch (Dest->getType()) { | 1398 switch (Dest->getType()) { |
1311 case IceType_NUM: | 1399 case IceType_NUM: |
1312 llvm_unreachable("Invalid Call dest type"); | 1400 llvm_unreachable("Invalid Call dest type"); |
1313 break; | 1401 break; |
1314 case IceType_void: | 1402 case IceType_void: |
1315 break; | 1403 break; |
1316 case IceType_i1: | 1404 case IceType_i1: |
1317 case IceType_i8: | 1405 case IceType_i8: |
1318 case IceType_i16: | 1406 case IceType_i16: |
1319 case IceType_i32: | 1407 case IceType_i32: |
1320 eax = makeReg(Dest->getType(), Reg_eax); | 1408 ReturnReg = makeReg(Dest->getType(), Reg_eax); |
1321 break; | 1409 break; |
1322 case IceType_i64: | 1410 case IceType_i64: |
1323 eax = makeReg(IceType_i32, Reg_eax); | 1411 ReturnReg = makeReg(IceType_i32, Reg_eax); |
1324 edx = makeReg(IceType_i32, Reg_edx); | 1412 ReturnRegHi = makeReg(IceType_i32, Reg_edx); |
1325 break; | 1413 break; |
1326 case IceType_f32: | 1414 case IceType_f32: |
1327 case IceType_f64: | 1415 case IceType_f64: |
1328 // Leave eax==edx==NULL, and capture the result with the fstp | 1416 // Leave ReturnReg==ReturnRegHi==NULL, and capture the result with |
1329 // instruction. | 1417 // the fstp instruction. |
1330 break; | 1418 break; |
1331 case IceType_v4i1: | 1419 case IceType_v4i1: |
1332 case IceType_v8i1: | 1420 case IceType_v8i1: |
1333 case IceType_v16i1: | 1421 case IceType_v16i1: |
1334 case IceType_v16i8: | 1422 case IceType_v16i8: |
1335 case IceType_v8i16: | 1423 case IceType_v8i16: |
1336 case IceType_v4i32: | 1424 case IceType_v4i32: |
1337 case IceType_v4f32: { | 1425 case IceType_v4f32: |
1338 // TODO(wala): Handle return values of vector type in the caller. | 1426 ReturnReg = makeReg(Dest->getType(), Reg_xmm0); |
1339 IceString Ty; | 1427 break; |
1340 llvm::raw_string_ostream BaseOS(Ty); | |
1341 Ostream OS(&BaseOS); | |
1342 OS << Dest->getType(); | |
1343 Func->setError("Unhandled dest type: " + BaseOS.str()); | |
1344 return; | |
1345 } | |
1346 } | 1428 } |
1347 } | 1429 } |
1348 // TODO(stichnot): LEAHACK: remove Legal_All (and use default) once | 1430 // TODO(stichnot): LEAHACK: remove Legal_All (and use default) once |
1349 // a proper emitter is used. | 1431 // a proper emitter is used. |
1350 Operand *CallTarget = legalize(Instr->getCallTarget(), Legal_All); | 1432 Operand *CallTarget = legalize(Instr->getCallTarget(), Legal_All); |
1351 Inst *NewCall = InstX8632Call::create(Func, eax, CallTarget); | 1433 Inst *NewCall = InstX8632Call::create(Func, ReturnReg, CallTarget); |
1352 Context.insert(NewCall); | 1434 Context.insert(NewCall); |
1353 if (edx) | 1435 if (ReturnRegHi) |
1354 Context.insert(InstFakeDef::create(Func, edx)); | 1436 Context.insert(InstFakeDef::create(Func, ReturnRegHi)); |
1355 | 1437 |
1356 // Add the appropriate offset to esp. | 1438 // Add the appropriate offset to esp. |
1357 if (StackOffset) { | 1439 if (StackOffset) { |
1358 Variable *esp = Func->getTarget()->getPhysicalRegister(Reg_esp); | 1440 Variable *esp = Func->getTarget()->getPhysicalRegister(Reg_esp); |
1359 _add(esp, Ctx->getConstantInt(IceType_i32, StackOffset)); | 1441 _add(esp, Ctx->getConstantInt(IceType_i32, StackOffset)); |
1360 } | 1442 } |
1361 | 1443 |
1362 // Insert a register-kill pseudo instruction. | 1444 // Insert a register-kill pseudo instruction. |
1363 VarList KilledRegs; | 1445 VarList KilledRegs; |
1364 for (SizeT i = 0; i < ScratchRegs.size(); ++i) { | 1446 for (SizeT i = 0; i < ScratchRegs.size(); ++i) { |
1365 if (ScratchRegs[i]) | 1447 if (ScratchRegs[i]) |
1366 KilledRegs.push_back(Func->getTarget()->getPhysicalRegister(i)); | 1448 KilledRegs.push_back(Func->getTarget()->getPhysicalRegister(i)); |
1367 } | 1449 } |
1368 Context.insert(InstFakeKill::create(Func, KilledRegs, NewCall)); | 1450 Context.insert(InstFakeKill::create(Func, KilledRegs, NewCall)); |
1369 | 1451 |
1370 // Generate a FakeUse to keep the call live if necessary. | 1452 // Generate a FakeUse to keep the call live if necessary. |
1371 if (Instr->hasSideEffects() && eax) { | 1453 if (Instr->hasSideEffects() && ReturnReg) { |
1372 Inst *FakeUse = InstFakeUse::create(Func, eax); | 1454 Inst *FakeUse = InstFakeUse::create(Func, ReturnReg); |
1373 Context.insert(FakeUse); | 1455 Context.insert(FakeUse); |
1374 } | 1456 } |
| 1457 |
| 1458 if (!Dest) |
| 1459 return; |
1375 | 1460 |
1376 // Generate Dest=eax assignment. | 1461 // Assign the result of the call to Dest. |
1377 if (Dest && eax) { | 1462 if (ReturnReg) { |
1378 if (edx) { | 1463 if (ReturnRegHi) { |
| 1464 assert(Dest->getType() == IceType_i64); |
1379 split64(Dest); | 1465 split64(Dest); |
1380 Variable *DestLo = Dest->getLo(); | 1466 Variable *DestLo = Dest->getLo(); |
1381 Variable *DestHi = Dest->getHi(); | 1467 Variable *DestHi = Dest->getHi(); |
1382 DestLo->setPreferredRegister(eax, false); | 1468 DestLo->setPreferredRegister(ReturnReg, false); |
1383 DestHi->setPreferredRegister(edx, false); | 1469 DestHi->setPreferredRegister(ReturnRegHi, false); |
1384 _mov(DestLo, eax); | 1470 _mov(DestLo, ReturnReg); |
1385 _mov(DestHi, edx); | 1471 _mov(DestHi, ReturnRegHi); |
1386 } else { | 1472 } else { |
1387 Dest->setPreferredRegister(eax, false); | 1473 assert(Dest->getType() == IceType_i32 || Dest->getType() == IceType_i16 || |
1388 _mov(Dest, eax); | 1474 Dest->getType() == IceType_i8 || Dest->getType() == IceType_i1 || |
| 1475 isVectorType(Dest->getType())); |
| 1476 Dest->setPreferredRegister(ReturnReg, false); |
| 1477 if (isVectorType(Dest->getType())) { |
| 1478 _movp(Dest, ReturnReg); |
| 1479 } else { |
| 1480 _mov(Dest, ReturnReg); |
| 1481 } |
1389 } | 1482 } |
1390 } | 1483 } else if (Dest->getType() == IceType_f32 || Dest->getType() == IceType_f64) { |
1391 | 1484 // Special treatment for an FP function which returns its result in |
1392 // Special treatment for an FP function which returns its result in | 1485 // st(0). |
1393 // st(0). | |
1394 if (Dest && | |
1395 (Dest->getType() == IceType_f32 || Dest->getType() == IceType_f64)) { | |
1396 _fstp(Dest); | 1486 _fstp(Dest); |
1397 // If Dest ends up being a physical xmm register, the fstp emit | 1487 // If Dest ends up being a physical xmm register, the fstp emit code |
1398 // code will route st(0) through a temporary stack slot. | 1488 // will route st(0) through a temporary stack slot. |
1399 } | 1489 } |
1400 } | 1490 } |
1401 | 1491 |
1402 void TargetX8632::lowerCast(const InstCast *Inst) { | 1492 void TargetX8632::lowerCast(const InstCast *Inst) { |
1403 // a = cast(b) ==> t=cast(b); a=t; (link t->b, link a->t, no overlap) | 1493 // a = cast(b) ==> t=cast(b); a=t; (link t->b, link a->t, no overlap) |
1404 InstCast::OpKind CastKind = Inst->getCastKind(); | 1494 InstCast::OpKind CastKind = Inst->getCastKind(); |
1405 Variable *Dest = Inst->getDest(); | 1495 Variable *Dest = Inst->getDest(); |
1406 switch (CastKind) { | 1496 switch (CastKind) { |
1407 default: | 1497 default: |
1408 Func->setError("Cast type not supported"); | 1498 Func->setError("Cast type not supported"); |
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2734 for (SizeT i = 0; i < Size; ++i) { | 2824 for (SizeT i = 0; i < Size; ++i) { |
2735 Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n"; | 2825 Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n"; |
2736 } | 2826 } |
2737 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; | 2827 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; |
2738 } | 2828 } |
2739 Str << "\t" << (IsInternal ? ".local" : ".global") << "\t" << MangledName | 2829 Str << "\t" << (IsInternal ? ".local" : ".global") << "\t" << MangledName |
2740 << "\n"; | 2830 << "\n"; |
2741 } | 2831 } |
2742 | 2832 |
2743 } // end of namespace Ice | 2833 } // end of namespace Ice |
OLD | NEW |