Chromium Code Reviews| OLD | NEW |
|---|---|
| 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file implements the TargetLoweringX8632 class, which | 10 // This file implements the TargetLoweringX8632 class, which |
| (...skipping 394 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 405 if (!hasFramePointer()) | 405 if (!hasFramePointer()) |
| 406 Offset += getStackAdjustment(); | 406 Offset += getStackAdjustment(); |
| 407 if (Offset) { | 407 if (Offset) { |
| 408 if (Offset > 0) | 408 if (Offset > 0) |
| 409 Str << "+"; | 409 Str << "+"; |
| 410 Str << Offset; | 410 Str << Offset; |
| 411 } | 411 } |
| 412 Str << "]"; | 412 Str << "]"; |
| 413 } | 413 } |
| 414 | 414 |
| 415 // Helper function for addProlog(). Sets the frame offset for Arg, | 415 // Classify each argument as stack or register. Add a hint to the |
|
Jim Stichnoth
2014/07/08 18:03:15
As we discussed in person, I think a simpler appro
wala
2014/07/08 22:38:57
Done.
| |
| 416 // updates InArgsSizeBytes according to Arg's width, and generates an | 416 // register allocator that register arguments should go in their home |
| 417 // instruction to copy Arg into its assigned register if applicable. | 417 // registers. |
| 418 // For an I64 arg that has been split into Lo and Hi components, it | 418 void TargetX8632::lowerArguments() { |
| 419 // calls itself recursively on the components, taking care to handle | 419 const VarList &Args = Func->getArgs(); |
| 420 // Lo first because of the little-endian architecture. | 420 unsigned NumXmmArgs = 0; |
| 421 void TargetX8632::setArgOffsetAndCopy(Variable *Arg, Variable *FramePtr, | 421 |
| 422 size_t BasicFrameOffset, | 422 for (VarList::const_iterator I = Args.begin(), E = Args.end(); I != E; ++I) { |
| 423 size_t &InArgsSizeBytes) { | 423 Variable *Arg = *I; |
| 424 Variable *Lo = Arg->getLo(); | 424 // The first four vector arguments go in xmm0 - xmm3. |
| 425 Variable *Hi = Arg->getHi(); | 425 if (isVectorType(Arg->getType()) && NumXmmArgs < 4) { |
| 426 Type Ty = Arg->getType(); | 426 Arg->setArgLoc(Variable::RegisterArgLoc); |
| 427 if (Lo && Hi && Ty == IceType_i64) { | 427 Variable *HomeReg = makeReg(Arg->getType(), Reg_xmm0 + NumXmmArgs); |
| 428 assert(Lo->getType() != IceType_i64); // don't want infinite recursion | 428 Arg->setPreferredRegister(HomeReg, false); |
| 429 assert(Hi->getType() != IceType_i64); // don't want infinite recursion | 429 Arg->setHomeRegister(HomeReg); |
| 430 setArgOffsetAndCopy(Lo, FramePtr, BasicFrameOffset, InArgsSizeBytes); | 430 ++NumXmmArgs; |
| 431 setArgOffsetAndCopy(Hi, FramePtr, BasicFrameOffset, InArgsSizeBytes); | 431 } else { |
| 432 return; | 432 Arg->setArgLoc(Variable::StackArgLoc); |
| 433 } | |
| 433 } | 434 } |
| 434 Arg->setStackOffset(BasicFrameOffset + InArgsSizeBytes); | 435 } |
| 435 if (Arg->hasReg()) { | 436 |
| 436 assert(Ty != IceType_i64); | 437 // Helper function for addProlog(). |
| 437 OperandX8632Mem *Mem = OperandX8632Mem::create( | 438 // |
| 438 Func, Ty, FramePtr, | 439 // If Arg is an argument passed on the stack, this sets the frame offset |
| 439 Ctx->getConstantInt(IceType_i32, Arg->getStackOffset())); | 440 // for Arg and updates InArgsSizeBytes according to Arg's width. For an |
| 440 _mov(Arg, Mem); | 441 // I64 arg that has been split into Lo and Hi components, it calls |
| 442 // itself recursively on the components, taking care to handle Lo first | |
| 443 // because of the little-endian architecture. Lastly, this function | |
| 444 // generates an instruction to copy Arg into its assigned register if | |
| 445 // applicable. | |
| 446 // | |
| 447 // If Arg is an argument passed in a register, this generates | |
| 448 // instructions to copy Arg from its home register into its assigned | |
| 449 // location. | |
| 450 void TargetX8632::finishArgumentLowering(Variable *Arg, Variable *FramePtr, | |
| 451 size_t BasicFrameOffset, | |
| 452 size_t &InArgsSizeBytes) { | |
| 453 if (Arg->getArgLoc() == Variable::StackArgLoc) { | |
| 454 Variable *Lo = Arg->getLo(); | |
| 455 Variable *Hi = Arg->getHi(); | |
| 456 Type Ty = Arg->getType(); | |
| 457 if (Lo && Hi && Ty == IceType_i64) { | |
| 458 assert(Lo->getType() != IceType_i64); // don't want infinite recursion | |
| 459 assert(Hi->getType() != IceType_i64); // don't want infinite recursion | |
| 460 finishArgumentLowering(Lo, FramePtr, BasicFrameOffset, InArgsSizeBytes); | |
| 461 finishArgumentLowering(Hi, FramePtr, BasicFrameOffset, InArgsSizeBytes); | |
| 462 return; | |
| 463 } | |
| 464 Arg->setStackOffset(BasicFrameOffset + InArgsSizeBytes); | |
| 465 InArgsSizeBytes += typeWidthInBytesOnStack(Ty); | |
| 466 if (Arg->hasReg()) { | |
| 467 assert(Ty != IceType_i64); | |
| 468 OperandX8632Mem *Mem = OperandX8632Mem::create( | |
| 469 Func, Ty, FramePtr, | |
| 470 Ctx->getConstantInt(IceType_i32, Arg->getStackOffset())); | |
| 471 if (isVectorType(Arg->getType())) { | |
| 472 _movp(Arg, Mem); | |
| 473 } else { | |
| 474 _mov(Arg, Mem); | |
| 475 } | |
| 476 } | |
| 477 } else if (Arg->getArgLoc() == Variable::RegisterArgLoc) { | |
| 478 // Make sure that Arg has a location before emitting the copy | |
| 479 // instruction. When using computed live ranges, Arg is not | |
| 480 // assigned any location if its live range is empty. | |
| 481 if (!ComputedLiveRanges || !Arg->getLiveRange().isEmpty()) { | |
| 482 _movp(Arg, Arg->getHomeRegister()); | |
| 483 } | |
| 441 } | 484 } |
| 442 InArgsSizeBytes += typeWidthInBytesOnStack(Ty); | |
| 443 } | 485 } |
| 444 | 486 |
| 445 Type TargetX8632::stackSlotType() { return IceType_i32; } | 487 Type TargetX8632::stackSlotType() { return IceType_i32; } |
| 446 | 488 |
| 447 void TargetX8632::addProlog(CfgNode *Node) { | 489 void TargetX8632::addProlog(CfgNode *Node) { |
| 448 // If SimpleCoalescing is false, each variable without a register | 490 // If SimpleCoalescing is false, each variable without a register |
| 449 // gets its own unique stack slot, which leads to large stack | 491 // gets its own unique stack slot, which leads to large stack |
| 450 // frames. If SimpleCoalescing is true, then each "global" variable | 492 // frames. If SimpleCoalescing is true, then each "global" variable |
| 451 // without a register gets its own slot, but "local" variable slots | 493 // without a register gets its own slot, but "local" variable slots |
| 452 // are reused across basic blocks. E.g., if A and B are local to | 494 // are reused across basic blocks. E.g., if A and B are local to |
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| 483 const VarList &Variables = Func->getVariables(); | 525 const VarList &Variables = Func->getVariables(); |
| 484 const VarList &Args = Func->getArgs(); | 526 const VarList &Args = Func->getArgs(); |
| 485 for (VarList::const_iterator I = Variables.begin(), E = Variables.end(); | 527 for (VarList::const_iterator I = Variables.begin(), E = Variables.end(); |
| 486 I != E; ++I) { | 528 I != E; ++I) { |
| 487 Variable *Var = *I; | 529 Variable *Var = *I; |
| 488 if (Var->hasReg()) { | 530 if (Var->hasReg()) { |
| 489 RegsUsed[Var->getRegNum()] = true; | 531 RegsUsed[Var->getRegNum()] = true; |
| 490 continue; | 532 continue; |
| 491 } | 533 } |
| 492 // An argument passed on the stack already has a stack slot. | 534 // An argument passed on the stack already has a stack slot. |
| 493 if (Var->getIsArg()) | 535 if (Var->getArgLoc() == Variable::StackArgLoc) |
| 494 continue; | 536 continue; |
| 495 // An unreferenced variable doesn't need a stack slot. | 537 // An unreferenced variable doesn't need a stack slot. |
| 496 if (ComputedLiveRanges && Var->getLiveRange().isEmpty()) | 538 if (ComputedLiveRanges && Var->getLiveRange().isEmpty()) |
| 497 continue; | 539 continue; |
| 498 // A spill slot linked to a variable with a stack slot should reuse | 540 // A spill slot linked to a variable with a stack slot should reuse |
| 499 // that stack slot. | 541 // that stack slot. |
| 500 if (Var->getWeight() == RegWeight::Zero && Var->getRegisterOverlap()) { | 542 if (Var->getWeight() == RegWeight::Zero && Var->getRegisterOverlap()) { |
| 501 if (Variable *Linked = Var->getPreferredRegister()) { | 543 if (Variable *Linked = Var->getPreferredRegister()) { |
| 502 if (!Linked->hasReg()) | 544 if (!Linked->hasReg()) |
| 503 continue; | 545 continue; |
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| 540 _mov(ebp, esp); | 582 _mov(ebp, esp); |
| 541 } | 583 } |
| 542 | 584 |
| 543 // Generate "sub esp, LocalsSizeBytes" | 585 // Generate "sub esp, LocalsSizeBytes" |
| 544 if (LocalsSizeBytes) | 586 if (LocalsSizeBytes) |
| 545 _sub(getPhysicalRegister(Reg_esp), | 587 _sub(getPhysicalRegister(Reg_esp), |
| 546 Ctx->getConstantInt(IceType_i32, LocalsSizeBytes)); | 588 Ctx->getConstantInt(IceType_i32, LocalsSizeBytes)); |
| 547 | 589 |
| 548 resetStackAdjustment(); | 590 resetStackAdjustment(); |
| 549 | 591 |
| 550 // Fill in stack offsets for args, and copy args into registers for | 592 // Fill in stack offsets for stack args, and copy args into registers |
| 551 // those that were register-allocated. Args are pushed right to | 593 // for those that were register-allocated. Args are pushed right to |
| 552 // left, so Arg[0] is closest to the stack/frame pointer. | 594 // left, so Arg[0] is closest to the stack/frame pointer. |
| 553 // | 595 // |
| 554 // TODO: Make this right for different width args, calling | 596 // Args passed in registers will need to be copied / shuffled into |
| 555 // conventions, etc. For one thing, args passed in registers will | 597 // their home locations. |
| 556 // need to be copied/shuffled to their home registers (the | |
| 557 // RegManager code may have some permutation logic to leverage), | |
| 558 // and if they have no home register, home space will need to be | |
| 559 // allocated on the stack to copy into. | |
| 560 Variable *FramePtr = getPhysicalRegister(getFrameOrStackReg()); | 598 Variable *FramePtr = getPhysicalRegister(getFrameOrStackReg()); |
| 561 size_t BasicFrameOffset = PreservedRegsSizeBytes + RetIpSizeBytes; | 599 size_t BasicFrameOffset = PreservedRegsSizeBytes + RetIpSizeBytes; |
| 562 if (!IsEbpBasedFrame) | 600 if (!IsEbpBasedFrame) |
| 563 BasicFrameOffset += LocalsSizeBytes; | 601 BasicFrameOffset += LocalsSizeBytes; |
| 564 for (SizeT i = 0; i < Args.size(); ++i) { | 602 for (SizeT i = 0; i < Args.size(); ++i) { |
| 565 Variable *Arg = Args[i]; | 603 Variable *Arg = Args[i]; |
| 566 setArgOffsetAndCopy(Arg, FramePtr, BasicFrameOffset, InArgsSizeBytes); | 604 finishArgumentLowering(Arg, FramePtr, BasicFrameOffset, InArgsSizeBytes); |
| 567 } | 605 } |
| 568 | 606 |
| 569 // Fill in stack offsets for locals. | 607 // Fill in stack offsets for locals. |
| 570 size_t TotalGlobalsSize = GlobalsSize; | 608 size_t TotalGlobalsSize = GlobalsSize; |
| 571 GlobalsSize = 0; | 609 GlobalsSize = 0; |
| 572 LocalsSize.assign(LocalsSize.size(), 0); | 610 LocalsSize.assign(LocalsSize.size(), 0); |
| 573 size_t NextStackOffset = 0; | 611 size_t NextStackOffset = 0; |
| 574 for (VarList::const_iterator I = Variables.begin(), E = Variables.end(); | 612 for (VarList::const_iterator I = Variables.begin(), E = Variables.end(); |
| 575 I != E; ++I) { | 613 I != E; ++I) { |
| 576 Variable *Var = *I; | 614 Variable *Var = *I; |
| 577 if (Var->hasReg()) { | 615 if (Var->hasReg()) { |
| 578 RegsUsed[Var->getRegNum()] = true; | 616 RegsUsed[Var->getRegNum()] = true; |
| 579 continue; | 617 continue; |
| 580 } | 618 } |
| 581 if (Var->getIsArg()) | 619 if (Var->getArgLoc() == Variable::StackArgLoc) |
| 582 continue; | 620 continue; |
| 583 if (ComputedLiveRanges && Var->getLiveRange().isEmpty()) | 621 if (ComputedLiveRanges && Var->getLiveRange().isEmpty()) |
| 584 continue; | 622 continue; |
| 585 if (Var->getWeight() == RegWeight::Zero && Var->getRegisterOverlap()) { | 623 if (Var->getWeight() == RegWeight::Zero && Var->getRegisterOverlap()) { |
| 586 if (Variable *Linked = Var->getPreferredRegister()) { | 624 if (Variable *Linked = Var->getPreferredRegister()) { |
| 587 if (!Linked->hasReg()) { | 625 if (!Linked->hasReg()) { |
| 588 // TODO: Make sure Linked has already been assigned a stack | 626 // TODO: Make sure Linked has already been assigned a stack |
| 589 // slot. | 627 // slot. |
| 590 Var->setStackOffset(Linked->getStackOffset()); | 628 Var->setStackOffset(Linked->getStackOffset()); |
| 591 continue; | 629 continue; |
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| 747 return; | 785 return; |
| 748 } | 786 } |
| 749 assert(Hi == NULL); | 787 assert(Hi == NULL); |
| 750 Lo = Func->makeVariable(IceType_i32, Context.getNode(), | 788 Lo = Func->makeVariable(IceType_i32, Context.getNode(), |
| 751 Var->getName() + "__lo"); | 789 Var->getName() + "__lo"); |
| 752 Hi = Func->makeVariable(IceType_i32, Context.getNode(), | 790 Hi = Func->makeVariable(IceType_i32, Context.getNode(), |
| 753 Var->getName() + "__hi"); | 791 Var->getName() + "__hi"); |
| 754 Var->setLoHi(Lo, Hi); | 792 Var->setLoHi(Lo, Hi); |
| 755 if (Var->getIsArg()) { | 793 if (Var->getIsArg()) { |
| 756 Lo->setIsArg(Func); | 794 Lo->setIsArg(Func); |
| 795 Lo->setArgLoc(Var->getArgLoc()); | |
| 757 Hi->setIsArg(Func); | 796 Hi->setIsArg(Func); |
| 797 Hi->setArgLoc(Var->getArgLoc()); | |
| 758 } | 798 } |
| 759 } | 799 } |
| 760 | 800 |
| 761 Operand *TargetX8632::loOperand(Operand *Operand) { | 801 Operand *TargetX8632::loOperand(Operand *Operand) { |
| 762 assert(Operand->getType() == IceType_i64); | 802 assert(Operand->getType() == IceType_i64); |
| 763 if (Operand->getType() != IceType_i64) | 803 if (Operand->getType() != IceType_i64) |
| 764 return Operand; | 804 return Operand; |
| 765 if (Variable *Var = llvm::dyn_cast<Variable>(Operand)) { | 805 if (Variable *Var = llvm::dyn_cast<Variable>(Operand)) { |
| 766 split64(Var); | 806 split64(Var); |
| 767 return Var->getLo(); | 807 return Var->getLo(); |
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| 1262 _br(Inst->getTargetUnconditional()); | 1302 _br(Inst->getTargetUnconditional()); |
| 1263 } else { | 1303 } else { |
| 1264 Operand *Src0 = legalize(Inst->getCondition()); | 1304 Operand *Src0 = legalize(Inst->getCondition()); |
| 1265 Constant *Zero = Ctx->getConstantZero(IceType_i32); | 1305 Constant *Zero = Ctx->getConstantZero(IceType_i32); |
| 1266 _cmp(Src0, Zero); | 1306 _cmp(Src0, Zero); |
| 1267 _br(InstX8632Br::Br_ne, Inst->getTargetTrue(), Inst->getTargetFalse()); | 1307 _br(InstX8632Br::Br_ne, Inst->getTargetTrue(), Inst->getTargetFalse()); |
| 1268 } | 1308 } |
| 1269 } | 1309 } |
| 1270 | 1310 |
| 1271 void TargetX8632::lowerCall(const InstCall *Instr) { | 1311 void TargetX8632::lowerCall(const InstCall *Instr) { |
| 1272 // Generate a sequence of push instructions, pushing right to left, | 1312 // For stack arguments, generate a sequence of push instructions, |
| 1273 // keeping track of stack offsets in case a push involves a stack | 1313 // pushing right to left, keeping track of stack offsets in case a |
| 1274 // operand and we are using an esp-based frame. | 1314 // push involves a stack operand and we are using an esp-based frame. |
| 1275 uint32_t StackOffset = 0; | 1315 uint32_t StackOffset = 0; |
| 1316 // Keep track of the number of xmm registers that get used to pass | |
| 1317 // arguments. | |
| 1318 unsigned NumXmmArgs = 0; | |
| 1319 VarList RegisterArgs; | |
| 1276 // TODO: If for some reason the call instruction gets dead-code | 1320 // TODO: If for some reason the call instruction gets dead-code |
| 1277 // eliminated after lowering, we would need to ensure that the | 1321 // eliminated after lowering, we would need to ensure that the |
| 1278 // pre-call push instructions and the post-call esp adjustment get | 1322 // pre-call push instructions and the post-call esp adjustment get |
| 1279 // eliminated as well. | 1323 // eliminated as well. |
| 1280 for (SizeT NumArgs = Instr->getNumArgs(), i = 0; i < NumArgs; ++i) { | 1324 for (SizeT NumArgs = Instr->getNumArgs(), i = 0; i < NumArgs; ++i) { |
| 1281 Operand *Arg = legalize(Instr->getArg(NumArgs - i - 1)); | 1325 Operand *Arg = legalize(Instr->getArg(NumArgs - i - 1)); |
| 1326 bool ArgInRegister = false; | |
| 1282 if (Arg->getType() == IceType_i64) { | 1327 if (Arg->getType() == IceType_i64) { |
| 1283 _push(hiOperand(Arg)); | 1328 _push(hiOperand(Arg)); |
| 1284 _push(loOperand(Arg)); | 1329 _push(loOperand(Arg)); |
| 1285 } else if (Arg->getType() == IceType_f64) { | 1330 } else if (Arg->getType() == IceType_f64) { |
| 1286 // If the Arg turns out to be a memory operand, we need to push | 1331 // If the Arg turns out to be a memory operand, we need to push |
| 1287 // 8 bytes, which requires two push instructions. This ends up | 1332 // 8 bytes, which requires two push instructions. This ends up |
| 1288 // being somewhat clumsy in the current IR, so we use a | 1333 // being somewhat clumsy in the current IR, so we use a |
| 1289 // workaround. Force the operand into a (xmm) register, and | 1334 // workaround. Force the operand into a (xmm) register, and |
| 1290 // then push the register. An xmm register push is actually not | 1335 // then push the register. An xmm register push is actually not |
| 1291 // possible in x86, but the Push instruction emitter handles | 1336 // possible in x86, but the Push instruction emitter handles |
| 1292 // this by decrementing the stack pointer and directly writing | 1337 // this by decrementing the stack pointer and directly writing |
| 1293 // the xmm register value. | 1338 // the xmm register value. |
| 1294 Variable *T = NULL; | 1339 Variable *T = NULL; |
| 1295 _mov(T, Arg); | 1340 _mov(T, Arg); |
| 1296 _push(T); | 1341 _push(T); |
| 1342 } else if (isVectorType(Arg->getType())) { | |
| 1343 if (NumXmmArgs < 4) { | |
| 1344 Variable *Reg = legalizeToVar(Arg, false, Reg_xmm0 + NumXmmArgs); | |
| 1345 ++NumXmmArgs; | |
| 1346 ArgInRegister = true; | |
| 1347 RegisterArgs.push_back(Reg); | |
| 1348 } else { | |
| 1349 // sub esp, 16 | |
| 1350 // movups [esp], legalize_to_reg(Arg) | |
| 1351 Variable *esp = getPhysicalRegister(Reg_esp); | |
| 1352 _sub(esp, Ctx->getConstantInt(IceType_i8, 16)); | |
|
Jim Stichnoth
2014/07/08 18:03:15
Use a symbolic constant instead of 16. (And reuse
wala
2014/07/08 22:38:58
Done, but by using the argument width directly wit
| |
| 1353 Constant *Zero = Ctx->getConstantZero(IceType_i8); | |
| 1354 OperandX8632Mem *Dest = | |
| 1355 OperandX8632Mem::create(Func, Arg->getType(), esp, Zero); | |
| 1356 _storep(legalize(Arg, Legal_Reg), Dest); | |
| 1357 } | |
| 1297 } else { | 1358 } else { |
| 1298 // Otherwise PNaCl requires parameter types to be at least 32-bits. | 1359 // Otherwise PNaCl requires parameter types to be at least 32-bits. |
| 1299 assert(Arg->getType() == IceType_f32 || Arg->getType() == IceType_i32); | 1360 assert(Arg->getType() == IceType_f32 || Arg->getType() == IceType_i32); |
| 1300 _push(Arg); | 1361 _push(Arg); |
| 1301 } | 1362 } |
| 1302 StackOffset += typeWidthInBytesOnStack(Arg->getType()); | 1363 if (!ArgInRegister) { |
| 1364 StackOffset += typeWidthInBytesOnStack(Arg->getType()); | |
| 1365 } | |
| 1366 } | |
| 1367 // Generate a FakeUse of all register arguments so that they do not | |
| 1368 // get dead code eliminated. | |
|
Jim Stichnoth
2014/07/08 18:03:15
Mention in the comment that the dead code eliminat
wala
2014/07/08 22:38:57
Done.
| |
| 1369 for (VarList::const_iterator I = RegisterArgs.begin(), E = RegisterArgs.end(); | |
| 1370 I != E; ++I) { | |
| 1371 Context.insert(InstFakeUse::create(Func, *I)); | |
| 1303 } | 1372 } |
| 1304 // Generate the call instruction. Assign its result to a temporary | 1373 // Generate the call instruction. Assign its result to a temporary |
| 1305 // with high register allocation weight. | 1374 // with high register allocation weight. |
| 1306 Variable *Dest = Instr->getDest(); | 1375 Variable *Dest = Instr->getDest(); |
| 1307 Variable *eax = NULL; // doubles as RegLo as necessary | 1376 Variable *eax = NULL; // doubles as RegLo as necessary |
| 1308 Variable *edx = NULL; | 1377 Variable *edx = NULL; |
| 1378 Variable *xmm0 = NULL; | |
|
Jim Stichnoth
2014/07/08 18:03:15
Can you rename variable eax (above) to something l
wala
2014/07/08 22:38:57
Done.
| |
| 1309 if (Dest) { | 1379 if (Dest) { |
| 1310 switch (Dest->getType()) { | 1380 switch (Dest->getType()) { |
| 1311 case IceType_NUM: | 1381 case IceType_NUM: |
| 1312 llvm_unreachable("Invalid Call dest type"); | 1382 llvm_unreachable("Invalid Call dest type"); |
| 1313 break; | 1383 break; |
| 1314 case IceType_void: | 1384 case IceType_void: |
| 1315 break; | 1385 break; |
| 1316 case IceType_i1: | 1386 case IceType_i1: |
| 1317 case IceType_i8: | 1387 case IceType_i8: |
| 1318 case IceType_i16: | 1388 case IceType_i16: |
| 1319 case IceType_i32: | 1389 case IceType_i32: |
| 1320 eax = makeReg(Dest->getType(), Reg_eax); | 1390 eax = makeReg(Dest->getType(), Reg_eax); |
| 1321 break; | 1391 break; |
| 1322 case IceType_i64: | 1392 case IceType_i64: |
| 1323 eax = makeReg(IceType_i32, Reg_eax); | 1393 eax = makeReg(IceType_i32, Reg_eax); |
| 1324 edx = makeReg(IceType_i32, Reg_edx); | 1394 edx = makeReg(IceType_i32, Reg_edx); |
| 1325 break; | 1395 break; |
| 1326 case IceType_f32: | 1396 case IceType_f32: |
| 1327 case IceType_f64: | 1397 case IceType_f64: |
| 1328 // Leave eax==edx==NULL, and capture the result with the fstp | 1398 // Leave eax==edx==NULL, and capture the result with the fstp |
| 1329 // instruction. | 1399 // instruction. |
| 1330 break; | 1400 break; |
| 1331 case IceType_v4i1: | 1401 case IceType_v4i1: |
| 1332 case IceType_v8i1: | 1402 case IceType_v8i1: |
| 1333 case IceType_v16i1: | 1403 case IceType_v16i1: |
| 1334 case IceType_v16i8: | 1404 case IceType_v16i8: |
| 1335 case IceType_v8i16: | 1405 case IceType_v8i16: |
| 1336 case IceType_v4i32: | 1406 case IceType_v4i32: |
| 1337 case IceType_v4f32: { | 1407 case IceType_v4f32: |
| 1338 // TODO(wala): Handle return values of vector type in the caller. | 1408 xmm0 = makeReg(Dest->getType(), Reg_xmm0); |
| 1339 IceString Ty; | 1409 break; |
| 1340 llvm::raw_string_ostream BaseOS(Ty); | |
| 1341 Ostream OS(&BaseOS); | |
| 1342 OS << Dest->getType(); | |
| 1343 Func->setError("Unhandled dest type: " + BaseOS.str()); | |
| 1344 return; | |
| 1345 } | |
| 1346 } | 1410 } |
| 1347 } | 1411 } |
| 1348 // TODO(stichnot): LEAHACK: remove Legal_All (and use default) once | 1412 // TODO(stichnot): LEAHACK: remove Legal_All (and use default) once |
| 1349 // a proper emitter is used. | 1413 // a proper emitter is used. |
| 1350 Operand *CallTarget = legalize(Instr->getCallTarget(), Legal_All); | 1414 Operand *CallTarget = legalize(Instr->getCallTarget(), Legal_All); |
| 1351 Inst *NewCall = InstX8632Call::create(Func, eax, CallTarget); | 1415 Inst *NewCall = InstX8632Call::create(Func, eax ? eax : xmm0, CallTarget); |
| 1352 Context.insert(NewCall); | 1416 Context.insert(NewCall); |
| 1353 if (edx) | 1417 if (edx) |
| 1354 Context.insert(InstFakeDef::create(Func, edx)); | 1418 Context.insert(InstFakeDef::create(Func, edx)); |
| 1355 | 1419 |
| 1356 // Add the appropriate offset to esp. | 1420 // Add the appropriate offset to esp. |
| 1357 if (StackOffset) { | 1421 if (StackOffset) { |
| 1358 Variable *esp = Func->getTarget()->getPhysicalRegister(Reg_esp); | 1422 Variable *esp = Func->getTarget()->getPhysicalRegister(Reg_esp); |
| 1359 _add(esp, Ctx->getConstantInt(IceType_i32, StackOffset)); | 1423 _add(esp, Ctx->getConstantInt(IceType_i32, StackOffset)); |
| 1360 } | 1424 } |
| 1361 | 1425 |
| 1362 // Insert a register-kill pseudo instruction. | 1426 // Insert a register-kill pseudo instruction. |
| 1363 VarList KilledRegs; | 1427 VarList KilledRegs; |
| 1364 for (SizeT i = 0; i < ScratchRegs.size(); ++i) { | 1428 for (SizeT i = 0; i < ScratchRegs.size(); ++i) { |
| 1365 if (ScratchRegs[i]) | 1429 if (ScratchRegs[i]) |
| 1366 KilledRegs.push_back(Func->getTarget()->getPhysicalRegister(i)); | 1430 KilledRegs.push_back(Func->getTarget()->getPhysicalRegister(i)); |
| 1367 } | 1431 } |
| 1368 Context.insert(InstFakeKill::create(Func, KilledRegs, NewCall)); | 1432 Context.insert(InstFakeKill::create(Func, KilledRegs, NewCall)); |
| 1369 | 1433 |
| 1370 // Generate a FakeUse to keep the call live if necessary. | 1434 // Generate a FakeUse to keep the call live if necessary. |
| 1371 if (Instr->hasSideEffects() && eax) { | 1435 if (Instr->hasSideEffects() && (eax || xmm0)) { |
| 1372 Inst *FakeUse = InstFakeUse::create(Func, eax); | 1436 Inst *FakeUse = InstFakeUse::create(Func, eax ? eax : xmm0); |
| 1373 Context.insert(FakeUse); | 1437 Context.insert(FakeUse); |
| 1374 } | 1438 } |
| 1375 | 1439 |
| 1376 // Generate Dest=eax assignment. | 1440 if (!Dest) { |
| 1377 if (Dest && eax) { | 1441 return; |
| 1442 } | |
| 1443 | |
| 1444 // Assign the result of the call to Dest. | |
| 1445 if (eax) { | |
| 1378 if (edx) { | 1446 if (edx) { |
| 1379 split64(Dest); | 1447 split64(Dest); |
| 1380 Variable *DestLo = Dest->getLo(); | 1448 Variable *DestLo = Dest->getLo(); |
| 1381 Variable *DestHi = Dest->getHi(); | 1449 Variable *DestHi = Dest->getHi(); |
| 1382 DestLo->setPreferredRegister(eax, false); | 1450 DestLo->setPreferredRegister(eax, false); |
| 1383 DestHi->setPreferredRegister(edx, false); | 1451 DestHi->setPreferredRegister(edx, false); |
| 1384 _mov(DestLo, eax); | 1452 _mov(DestLo, eax); |
| 1385 _mov(DestHi, edx); | 1453 _mov(DestHi, edx); |
| 1386 } else { | 1454 } else { |
| 1387 Dest->setPreferredRegister(eax, false); | 1455 Dest->setPreferredRegister(eax, false); |
| 1388 _mov(Dest, eax); | 1456 _mov(Dest, eax); |
| 1389 } | 1457 } |
| 1390 } | 1458 } else if (xmm0) { |
| 1391 | 1459 Dest->setPreferredRegister(xmm0, false); |
| 1392 // Special treatment for an FP function which returns its result in | 1460 _movp(Dest, xmm0); |
| 1393 // st(0). | 1461 } else if (Dest->getType() == IceType_f32 || Dest->getType() == IceType_f64) { |
| 1394 if (Dest && | 1462 // Special treatment for an FP function which returns its result in |
| 1395 (Dest->getType() == IceType_f32 || Dest->getType() == IceType_f64)) { | 1463 // st(0). |
| 1396 _fstp(Dest); | 1464 _fstp(Dest); |
| 1397 // If Dest ends up being a physical xmm register, the fstp emit | 1465 // If Dest ends up being a physical xmm register, the fstp emit code |
| 1398 // code will route st(0) through a temporary stack slot. | 1466 // will route st(0) through a temporary stack slot. |
| 1399 } | 1467 } |
| 1400 } | 1468 } |
| 1401 | 1469 |
| 1402 void TargetX8632::lowerCast(const InstCast *Inst) { | 1470 void TargetX8632::lowerCast(const InstCast *Inst) { |
| 1403 // a = cast(b) ==> t=cast(b); a=t; (link t->b, link a->t, no overlap) | 1471 // a = cast(b) ==> t=cast(b); a=t; (link t->b, link a->t, no overlap) |
| 1404 InstCast::OpKind CastKind = Inst->getCastKind(); | 1472 InstCast::OpKind CastKind = Inst->getCastKind(); |
| 1405 Variable *Dest = Inst->getDest(); | 1473 Variable *Dest = Inst->getDest(); |
| 1406 switch (CastKind) { | 1474 switch (CastKind) { |
| 1407 default: | 1475 default: |
| 1408 Func->setError("Cast type not supported"); | 1476 Func->setError("Cast type not supported"); |
| (...skipping 1325 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 2734 for (SizeT i = 0; i < Size; ++i) { | 2802 for (SizeT i = 0; i < Size; ++i) { |
| 2735 Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n"; | 2803 Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n"; |
| 2736 } | 2804 } |
| 2737 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; | 2805 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; |
| 2738 } | 2806 } |
| 2739 Str << "\t" << (IsInternal ? ".local" : ".global") << "\t" << MangledName | 2807 Str << "\t" << (IsInternal ? ".local" : ".global") << "\t" << MangledName |
| 2740 << "\n"; | 2808 << "\n"; |
| 2741 } | 2809 } |
| 2742 | 2810 |
| 2743 } // end of namespace Ice | 2811 } // end of namespace Ice |
| OLD | NEW |