Add support for passing and returning vectors in accordance with the x86 calling convention.

src/IceOperand.h

 //===- subzero/src/IceOperand.h - High-level operands -----------*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares the Operand class and its target-independent
@@ skipping 323 matching lines @@
   void setDefinition(Inst *Inst, const CfgNode *Node);
   void replaceDefinition(Inst *Inst, const CfgNode *Node);
 
   const CfgNode *getLocalUseNode() const { return DefNode; }
   bool isMultiblockLife() const { return (DefNode == NULL); }
   void setUse(const Inst *Inst, const CfgNode *Node);
 
   bool getIsArg() const { return IsArgument; }
   void setIsArg(Cfg *Func);
 
+  enum ArgLocInfo {
+    NoArgLoc,
+    RegisterArgLoc,
+    StackArgLoc
+  };
+
+  ArgLocInfo getArgLoc() const { return ArgLoc; }
+  void setArgLoc(ArgLocInfo Loc) { ArgLoc = Loc; }
+
   int32_t getStackOffset() const { return StackOffset; }
   void setStackOffset(int32_t Offset) { StackOffset = Offset; }
 
   static const int32_t NoRegister = -1;
   bool hasReg() const { return getRegNum() != NoRegister; }
   int32_t getRegNum() const { return RegNum; }
   void setRegNum(int32_t NewRegNum) {
     // Regnum shouldn't be set more than once.
     assert(!hasReg() || RegNum == NewRegNum);
     RegNum = NewRegNum;
   }
   bool hasRegTmp() const { return getRegNumTmp() != NoRegister; }
   int32_t getRegNumTmp() const { return RegNumTmp; }
   void setRegNumTmp(int32_t NewRegNum) { RegNumTmp = NewRegNum; }
 
+  Variable *getHomeRegister() const { return HomeRegister; }
+  void setHomeRegister(Variable *NewHomeRegister) {
+    HomeRegister = NewHomeRegister;
+  }
+
   RegWeight getWeight() const { return Weight; }
   void setWeight(uint32_t NewWeight) { Weight = NewWeight; }
   void setWeightInfinite() { Weight = RegWeight::Inf; }
 
   Variable *getPreferredRegister() const { return RegisterPreference; }
   bool getRegisterOverlap() const { return AllowRegisterOverlap; }
   void setPreferredRegister(Variable *Prefer, bool Overlap) {
     RegisterPreference = Prefer;
     AllowRegisterOverlap = Overlap;
   }
@@ skipping 34 matching lines @@
   }
 
   // The destructor is public because of the asType() method.
   virtual ~Variable() {}
 
 private:
   Variable(Type Ty, const CfgNode *Node, SizeT Index, const IceString &Name)
       : Operand(kVariable, Ty), Number(Index), Name(Name), DefInst(NULL),
         DefNode(Node), IsArgument(false), StackOffset(0), RegNum(NoRegister),
         RegNumTmp(NoRegister), Weight(1), RegisterPreference(NULL),
-        AllowRegisterOverlap(false), LoVar(NULL), HiVar(NULL) {
+        AllowRegisterOverlap(false), LoVar(NULL), HiVar(NULL),
+        ArgLoc(NoArgLoc), HomeRegister(NULL) {
     Vars = VarsReal;
     Vars[0] = this;
     NumVars = 1;
   }
   Variable(const Variable &) LLVM_DELETED_FUNCTION;
   Variable &operator=(const Variable &) LLVM_DELETED_FUNCTION;
   // Number is unique across all variables, and is used as a
   // (bit)vector index for liveness analysis.
   const SizeT Number;
   // Name is optional.
@@ skipping 31 matching lines @@
   LiveRange Live;
   // LoVar and HiVar are needed for lowering from 64 to 32 bits.  When
   // lowering from I64 to I32 on a 32-bit architecture, we split the
   // variable into two machine-size pieces.  LoVar is the low-order
   // machine-size portion, and HiVar is the remaining high-order
   // portion.  TODO: It's wasteful to penalize all variables on all
   // targets this way; use a sparser representation.  It's also
   // wasteful for a 64-bit target.
   Variable *LoVar;
   Variable *HiVar;
+  // ArgLoc records the assignment of the argument (stack or register)
+  // if this value is an argument.
+  ArgLocInfo ArgLoc;
+  // HomeRegister is the home register.
+  Variable *HomeRegister;
   // VarsReal (and Operand::Vars) are set up such that Vars[0] ==
   // this.
   Variable *VarsReal[1];
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEOPERAND_H