Add mips64 port.

src/mips64/macro-assembler-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <limits.h>  // For LONG_MIN, LONG_MAX.
 
 #include "src/v8.h"
 
-#if V8_TARGET_ARCH_MIPS
+#if V8_TARGET_ARCH_MIPS64
 
 #include "src/bootstrapper.h"
 #include "src/codegen.h"
 #include "src/cpu-profiler.h"
 #include "src/debug.h"
 #include "src/isolate-inl.h"
 #include "src/runtime.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 14 matching lines @@
                           Representation r) {
   ASSERT(!r.IsDouble());
   if (r.IsInteger8()) {
     lb(dst, src);
   } else if (r.IsUInteger8()) {
     lbu(dst, src);
   } else if (r.IsInteger16()) {
     lh(dst, src);
   } else if (r.IsUInteger16()) {
     lhu(dst, src);
+  } else if (r.IsInteger32()) {
+    lw(dst, src);
   } else {
-    lw(dst, src);
+    ld(dst, src);
   }
 }
 
 
 void MacroAssembler::Store(Register src,
                            const MemOperand& dst,
                            Representation r) {
   ASSERT(!r.IsDouble());
   if (r.IsInteger8() || r.IsUInteger8()) {
     sb(src, dst);
   } else if (r.IsInteger16() || r.IsUInteger16()) {
     sh(src, dst);
+  } else if (r.IsInteger32()) {
+    sw(src, dst);
   } else {
     if (r.IsHeapObject()) {
       AssertNotSmi(src);
     } else if (r.IsSmi()) {
       AssertSmi(src);
     }
-    sw(src, dst);
+    sd(src, dst);
   }
 }
 
 
 void MacroAssembler::LoadRoot(Register destination,
                               Heap::RootListIndex index) {
-  lw(destination, MemOperand(s6, index << kPointerSizeLog2));
+  ld(destination, MemOperand(s6, index << kPointerSizeLog2));
 }
 
 
 void MacroAssembler::LoadRoot(Register destination,
                               Heap::RootListIndex index,
                               Condition cond,
                               Register src1, const Operand& src2) {
   Branch(2, NegateCondition(cond), src1, src2);
-  lw(destination, MemOperand(s6, index << kPointerSizeLog2));
+  ld(destination, MemOperand(s6, index << kPointerSizeLog2));
 }
 
 
 void MacroAssembler::StoreRoot(Register source,
                                Heap::RootListIndex index) {
-  sw(source, MemOperand(s6, index << kPointerSizeLog2));
+  sd(source, MemOperand(s6, index << kPointerSizeLog2));
 }
 
 
 void MacroAssembler::StoreRoot(Register source,
                                Heap::RootListIndex index,
                                Condition cond,
                                Register src1, const Operand& src2) {
   Branch(2, NegateCondition(cond), src1, src2);
-  sw(source, MemOperand(s6, index << kPointerSizeLog2));
+  sd(source, MemOperand(s6, index << kPointerSizeLog2));
 }
 
 
 // Push and pop all registers that can hold pointers.
 void MacroAssembler::PushSafepointRegisters() {
   // Safepoints expect a block of kNumSafepointRegisters values on the
   // stack, so adjust the stack for unsaved registers.
   const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
   ASSERT(num_unsaved >= 0);
   if (num_unsaved > 0) {
-    Subu(sp, sp, Operand(num_unsaved * kPointerSize));
+    Dsubu(sp, sp, Operand(num_unsaved * kPointerSize));
   }
   MultiPush(kSafepointSavedRegisters);
 }
 
 
 void MacroAssembler::PopSafepointRegisters() {
   const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
   MultiPop(kSafepointSavedRegisters);
   if (num_unsaved > 0) {
-    Addu(sp, sp, Operand(num_unsaved * kPointerSize));
+    Daddu(sp, sp, Operand(num_unsaved * kPointerSize));
   }
 }
 
 
 void MacroAssembler::PushSafepointRegistersAndDoubles() {
   PushSafepointRegisters();
-  Subu(sp, sp, Operand(FPURegister::NumAllocatableRegisters() * kDoubleSize));
-  for (int i = 0; i < FPURegister::NumAllocatableRegisters(); i+=2) {
+  Dsubu(sp, sp, Operand(FPURegister::NumAllocatableRegisters() * kDoubleSize));
+  for (int i = 0; i < FPURegister::NumAllocatableRegisters(); i++) {
     FPURegister reg = FPURegister::FromAllocationIndex(i);
     sdc1(reg, MemOperand(sp, i * kDoubleSize));
   }
 }
 
 
 void MacroAssembler::PopSafepointRegistersAndDoubles() {
-  for (int i = 0; i < FPURegister::NumAllocatableRegisters(); i+=2) {
+  for (int i = 0; i < FPURegister::NumAllocatableRegisters(); i++) {
     FPURegister reg = FPURegister::FromAllocationIndex(i);
     ldc1(reg, MemOperand(sp, i * kDoubleSize));
   }
-  Addu(sp, sp, Operand(FPURegister::NumAllocatableRegisters() * kDoubleSize));
+  Daddu(sp, sp, Operand(FPURegister::NumAllocatableRegisters() * kDoubleSize));
   PopSafepointRegisters();
 }
 
 
 void MacroAssembler::StoreToSafepointRegistersAndDoublesSlot(Register src,
                                                              Register dst) {
-  sw(src, SafepointRegistersAndDoublesSlot(dst));
+  sd(src, SafepointRegistersAndDoublesSlot(dst));
 }
 
 
 void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) {
-  sw(src, SafepointRegisterSlot(dst));
+  sd(src, SafepointRegisterSlot(dst));
 }
 
 
 void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) {
-  lw(dst, SafepointRegisterSlot(src));
+  ld(dst, SafepointRegisterSlot(src));
 }
 
 
 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
   // The registers are pushed starting with the highest encoding,
   // which means that lowest encodings are closest to the stack pointer.
   return kSafepointRegisterStackIndexMap[reg_code];
 }
 
 
@@ skipping 39 matching lines @@
 
   // Skip barrier if writing a smi.
   if (smi_check == INLINE_SMI_CHECK) {
     JumpIfSmi(value, &done);
   }
 
   // Although the object register is tagged, the offset is relative to the start
   // of the object, so so offset must be a multiple of kPointerSize.
   ASSERT(IsAligned(offset, kPointerSize));
 
-  Addu(dst, object, Operand(offset - kHeapObjectTag));
+  Daddu(dst, object, Operand(offset - kHeapObjectTag));
   if (emit_debug_code()) {
     Label ok;
     And(t8, dst, Operand((1 << kPointerSizeLog2) - 1));
     Branch(&ok, eq, t8, Operand(zero_reg));
     stop("Unaligned cell in write barrier");
     bind(&ok);
   }
 
   RecordWrite(object,
               dst,
               value,
               ra_status,
               save_fp,
               remembered_set_action,
               OMIT_SMI_CHECK,
               pointers_to_here_check_for_value);
 
   bind(&done);
 
   // Clobber clobbered input registers when running with the debug-code flag
   // turned on to provoke errors.
   if (emit_debug_code()) {
-    li(value, Operand(BitCast<int32_t>(kZapValue + 4)));
-    li(dst, Operand(BitCast<int32_t>(kZapValue + 8)));
+    li(value, Operand(BitCast<int64_t>(kZapValue + 4)));
+    li(dst, Operand(BitCast<int64_t>(kZapValue + 8)));
   }
 }
 
 
 // Will clobber 4 registers: object, map, dst, ip.  The
 // register 'object' contains a heap object pointer.
 void MacroAssembler::RecordWriteForMap(Register object,
                                        Register map,
                                        Register dst,
                                        RAStatus ra_status,
                                        SaveFPRegsMode fp_mode) {
   if (emit_debug_code()) {
     ASSERT(!dst.is(at));
-    lw(dst, FieldMemOperand(map, HeapObject::kMapOffset));
+    ld(dst, FieldMemOperand(map, HeapObject::kMapOffset));
     Check(eq,
           kWrongAddressOrValuePassedToRecordWrite,
           dst,
           Operand(isolate()->factory()->meta_map()));
   }
 
   if (!FLAG_incremental_marking) {
     return;
   }
 
   // Count number of write barriers in generated code.
   isolate()->counters()->write_barriers_static()->Increment();
   // TODO(mstarzinger): Dynamic counter missing.
 
   if (emit_debug_code()) {
-    lw(at, FieldMemOperand(object, HeapObject::kMapOffset));
+    ld(at, FieldMemOperand(object, HeapObject::kMapOffset));
     Check(eq,
           kWrongAddressOrValuePassedToRecordWrite,
           map,
           Operand(at));
   }
 
   Label done;
 
   // A single check of the map's pages interesting flag suffices, since it is
   // only set during incremental collection, and then it's also guaranteed that
   // the from object's page's interesting flag is also set.  This optimization
   // relies on the fact that maps can never be in new space.
   CheckPageFlag(map,
                 map,  // Used as scratch.
                 MemoryChunk::kPointersToHereAreInterestingMask,
                 eq,
                 &done);
 
-  Addu(dst, object, Operand(HeapObject::kMapOffset - kHeapObjectTag));
+  Daddu(dst, object, Operand(HeapObject::kMapOffset - kHeapObjectTag));
   if (emit_debug_code()) {
     Label ok;
     And(at, dst, Operand((1 << kPointerSizeLog2) - 1));
     Branch(&ok, eq, at, Operand(zero_reg));
     stop("Unaligned cell in write barrier");
     bind(&ok);
   }
 
   // Record the actual write.
   if (ra_status == kRAHasNotBeenSaved) {
     push(ra);
   }
   RecordWriteStub stub(isolate(), object, map, dst, OMIT_REMEMBERED_SET,
                        fp_mode);
   CallStub(&stub);
   if (ra_status == kRAHasNotBeenSaved) {
     pop(ra);
   }
 
   bind(&done);
 
   // Clobber clobbered registers when running with the debug-code flag
   // turned on to provoke errors.
   if (emit_debug_code()) {
-    li(dst, Operand(BitCast<int32_t>(kZapValue + 12)));
-    li(map, Operand(BitCast<int32_t>(kZapValue + 16)));
+    li(dst, Operand(BitCast<int64_t>(kZapValue + 12)));
+    li(map, Operand(BitCast<int64_t>(kZapValue + 16)));
   }
 }
 
 
 // Will clobber 4 registers: object, address, scratch, ip.  The
 // register 'object' contains a heap object pointer.  The heap object
 // tag is shifted away.
 void MacroAssembler::RecordWrite(
     Register object,
     Register address,
     Register value,
     RAStatus ra_status,
     SaveFPRegsMode fp_mode,
     RememberedSetAction remembered_set_action,
     SmiCheck smi_check,
     PointersToHereCheck pointers_to_here_check_for_value) {
   ASSERT(!AreAliased(object, address, value, t8));
   ASSERT(!AreAliased(object, address, value, t9));
 
   if (emit_debug_code()) {
-    lw(at, MemOperand(address));
+    ld(at, MemOperand(address));
     Assert(
         eq, kWrongAddressOrValuePassedToRecordWrite, at, Operand(value));
   }
 
   if (remembered_set_action == OMIT_REMEMBERED_SET &&
       !FLAG_incremental_marking) {
     return;
   }
 
   // Count number of write barriers in generated code.
@@ skipping 31 matching lines @@
   CallStub(&stub);
   if (ra_status == kRAHasNotBeenSaved) {
     pop(ra);
   }
 
   bind(&done);
 
   // Clobber clobbered registers when running with the debug-code flag
   // turned on to provoke errors.
   if (emit_debug_code()) {
-    li(address, Operand(BitCast<int32_t>(kZapValue + 12)));
-    li(value, Operand(BitCast<int32_t>(kZapValue + 16)));
+    li(address, Operand(BitCast<int64_t>(kZapValue + 12)));
+    li(value, Operand(BitCast<int64_t>(kZapValue + 16)));
   }
 }
 
 
 void MacroAssembler::RememberedSetHelper(Register object,  // For debug tests.
                                          Register address,
                                          Register scratch,
                                          SaveFPRegsMode fp_mode,
                                          RememberedSetFinalAction and_then) {
   Label done;
   if (emit_debug_code()) {
     Label ok;
     JumpIfNotInNewSpace(object, scratch, &ok);
     stop("Remembered set pointer is in new space");
     bind(&ok);
   }
   // Load store buffer top.
   ExternalReference store_buffer =
       ExternalReference::store_buffer_top(isolate());
   li(t8, Operand(store_buffer));
-  lw(scratch, MemOperand(t8));
+  ld(scratch, MemOperand(t8));
   // Store pointer to buffer and increment buffer top.
-  sw(address, MemOperand(scratch));
-  Addu(scratch, scratch, kPointerSize);
+  sd(address, MemOperand(scratch));
+  Daddu(scratch, scratch, kPointerSize);
   // Write back new top of buffer.
-  sw(scratch, MemOperand(t8));
+  sd(scratch, MemOperand(t8));
   // Call stub on end of buffer.
   // Check for end of buffer.
   And(t8, scratch, Operand(StoreBuffer::kStoreBufferOverflowBit));
+  ASSERT(!scratch.is(t8));
   if (and_then == kFallThroughAtEnd) {
     Branch(&done, eq, t8, Operand(zero_reg));
   } else {
     ASSERT(and_then == kReturnAtEnd);
     Ret(eq, t8, Operand(zero_reg));
   }
   push(ra);
   StoreBufferOverflowStub store_buffer_overflow =
       StoreBufferOverflowStub(isolate(), fp_mode);
   CallStub(&store_buffer_overflow);
@@ skipping 12 matching lines @@
 void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
                                             Register scratch,
                                             Label* miss) {
   Label same_contexts;
 
   ASSERT(!holder_reg.is(scratch));
   ASSERT(!holder_reg.is(at));
   ASSERT(!scratch.is(at));
 
   // Load current lexical context from the stack frame.
-  lw(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
+  ld(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
   // In debug mode, make sure the lexical context is set.
 #ifdef DEBUG
   Check(ne, kWeShouldNotHaveAnEmptyLexicalContext,
       scratch, Operand(zero_reg));
 #endif
 
   // Load the native context of the current context.
   int offset =
       Context::kHeaderSize + Context::GLOBAL_OBJECT_INDEX * kPointerSize;
-  lw(scratch, FieldMemOperand(scratch, offset));
-  lw(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
+  ld(scratch, FieldMemOperand(scratch, offset));
+  ld(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
 
   // Check the context is a native context.
   if (emit_debug_code()) {
     push(holder_reg);  // Temporarily save holder on the stack.
     // Read the first word and compare to the native_context_map.
-    lw(holder_reg, FieldMemOperand(scratch, HeapObject::kMapOffset));
+    ld(holder_reg, FieldMemOperand(scratch, HeapObject::kMapOffset));
     LoadRoot(at, Heap::kNativeContextMapRootIndex);
     Check(eq, kJSGlobalObjectNativeContextShouldBeANativeContext,
           holder_reg, Operand(at));
     pop(holder_reg);  // Restore holder.
   }
 
   // Check if both contexts are the same.
-  lw(at, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
+  ld(at, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
   Branch(&same_contexts, eq, scratch, Operand(at));
 
   // Check the context is a native context.
   if (emit_debug_code()) {
     push(holder_reg);  // Temporarily save holder on the stack.
     mov(holder_reg, at);  // Move at to its holding place.
     LoadRoot(at, Heap::kNullValueRootIndex);
     Check(ne, kJSGlobalProxyContextShouldNotBeNull,
           holder_reg, Operand(at));
 
-    lw(holder_reg, FieldMemOperand(holder_reg, HeapObject::kMapOffset));
+    ld(holder_reg, FieldMemOperand(holder_reg, HeapObject::kMapOffset));
     LoadRoot(at, Heap::kNativeContextMapRootIndex);
     Check(eq, kJSGlobalObjectNativeContextShouldBeANativeContext,
           holder_reg, Operand(at));
     // Restore at is not needed. at is reloaded below.
     pop(holder_reg);  // Restore holder.
     // Restore at to holder's context.
-    lw(at, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
+    ld(at, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
   }
 
   // Check that the security token in the calling global object is
   // compatible with the security token in the receiving global
   // object.
   int token_offset = Context::kHeaderSize +
                      Context::SECURITY_TOKEN_INDEX * kPointerSize;
 
-  lw(scratch, FieldMemOperand(scratch, token_offset));
-  lw(at, FieldMemOperand(at, token_offset));
+  ld(scratch, FieldMemOperand(scratch, token_offset));
+  ld(at, FieldMemOperand(at, token_offset));
   Branch(miss, ne, scratch, Operand(at));
 
   bind(&same_contexts);
 }
 
 
 void MacroAssembler::GetNumberHash(Register reg0, Register scratch) {
   // First of all we assign the hash seed to scratch.
   LoadRoot(scratch, Heap::kHashSeedRootIndex);
   SmiUntag(scratch);
 
   // Xor original key with a seed.
   xor_(reg0, reg0, scratch);
 
   // Compute the hash code from the untagged key.  This must be kept in sync
   // with ComputeIntegerHash in utils.h.
   //
   // hash = ~hash + (hash << 15);
+  // The algorithm uses 32-bit integer values.
   nor(scratch, reg0, zero_reg);
   sll(at, reg0, 15);
   addu(reg0, scratch, at);
 
   // hash = hash ^ (hash >> 12);
   srl(at, reg0, 12);
   xor_(reg0, reg0, at);
 
   // hash = hash + (hash << 2);
   sll(at, reg0, 2);
@@ skipping 42 matching lines @@
   //
   // reg1 - Used to hold the capacity mask of the dictionary.
   //
   // reg2 - Used for the index into the dictionary.
   // at   - Temporary (avoid MacroAssembler instructions also using 'at').
   Label done;
 
   GetNumberHash(reg0, reg1);
 
   // Compute the capacity mask.
-  lw(reg1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset));
-  sra(reg1, reg1, kSmiTagSize);
-  Subu(reg1, reg1, Operand(1));
+  ld(reg1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset));
+  SmiUntag(reg1, reg1);
+  Dsubu(reg1, reg1, Operand(1));
 
   // Generate an unrolled loop that performs a few probes before giving up.
   for (int i = 0; i < kNumberDictionaryProbes; i++) {
     // Use reg2 for index calculations and keep the hash intact in reg0.
     mov(reg2, reg0);
     // Compute the masked index: (hash + i + i * i) & mask.
     if (i > 0) {
-      Addu(reg2, reg2, Operand(SeededNumberDictionary::GetProbeOffset(i)));
+      Daddu(reg2, reg2, Operand(SeededNumberDictionary::GetProbeOffset(i)));
     }
     and_(reg2, reg2, reg1);
 
     // Scale the index by multiplying by the element size.
     ASSERT(SeededNumberDictionary::kEntrySize == 3);
-    sll(at, reg2, 1);  // 2x.
-    addu(reg2, reg2, at);  // reg2 = reg2 * 3.
+    dsll(at, reg2, 1);  // 2x.
+    daddu(reg2, reg2, at);  // reg2 = reg2 * 3.
 
     // Check if the key is identical to the name.
-    sll(at, reg2, kPointerSizeLog2);
-    addu(reg2, elements, at);
+    dsll(at, reg2, kPointerSizeLog2);
+    daddu(reg2, elements, at);
 
-    lw(at, FieldMemOperand(reg2, SeededNumberDictionary::kElementsStartOffset));
+    ld(at, FieldMemOperand(reg2, SeededNumberDictionary::kElementsStartOffset));
     if (i != kNumberDictionaryProbes - 1) {
       Branch(&done, eq, key, Operand(at));
     } else {
       Branch(miss, ne, key, Operand(at));
     }
   }
 
   bind(&done);
   // Check that the value is a normal property.
   // reg2: elements + (index * kPointerSize).
   const int kDetailsOffset =
       SeededNumberDictionary::kElementsStartOffset + 2 * kPointerSize;
-  lw(reg1, FieldMemOperand(reg2, kDetailsOffset));
+  ld(reg1, FieldMemOperand(reg2, kDetailsOffset));
   And(at, reg1, Operand(Smi::FromInt(PropertyDetails::TypeField::kMask)));
   Branch(miss, ne, at, Operand(zero_reg));
 
   // Get the value at the masked, scaled index and return.
   const int kValueOffset =
       SeededNumberDictionary::kElementsStartOffset + kPointerSize;
-  lw(result, FieldMemOperand(reg2, kValueOffset));
+  ld(result, FieldMemOperand(reg2, kValueOffset));
 }
 
 
 // ---------------------------------------------------------------------------
 // Instruction macros.
 
 void MacroAssembler::Addu(Register rd, Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     addu(rd, rs, rt.rm());
   } else {
-    if (is_int16(rt.imm32_) && !MustUseReg(rt.rmode_)) {
-      addiu(rd, rs, rt.imm32_);
+    if (is_int16(rt.imm64_) && !MustUseReg(rt.rmode_)) {
+      addiu(rd, rs, rt.imm64_);
     } else {
       // li handles the relocation.
       ASSERT(!rs.is(at));
       li(at, rt);
       addu(rd, rs, at);
     }
   }
 }
 
 
+void MacroAssembler::Daddu(Register rd, Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    daddu(rd, rs, rt.rm());
+  } else {
+    if (is_int16(rt.imm64_) && !MustUseReg(rt.rmode_)) {
+      daddiu(rd, rs, rt.imm64_);
+    } else {
+      // li handles the relocation.
+      ASSERT(!rs.is(at));
+      li(at, rt);
+      daddu(rd, rs, at);
+    }
+  }
+}
+
+
 void MacroAssembler::Subu(Register rd, Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     subu(rd, rs, rt.rm());
   } else {
-    if (is_int16(rt.imm32_) && !MustUseReg(rt.rmode_)) {
-      addiu(rd, rs, -rt.imm32_);  // No subiu instr, use addiu(x, y, -imm).
+    if (is_int16(rt.imm64_) && !MustUseReg(rt.rmode_)) {
+      addiu(rd, rs, -rt.imm64_);  // No subiu instr, use addiu(x, y, -imm).
     } else {
       // li handles the relocation.
       ASSERT(!rs.is(at));
       li(at, rt);
       subu(rd, rs, at);
     }
   }
 }
 
 
+void MacroAssembler::Dsubu(Register rd, Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    dsubu(rd, rs, rt.rm());
+  } else {
+    if (is_int16(rt.imm64_) && !MustUseReg(rt.rmode_)) {
+      daddiu(rd, rs, -rt.imm64_);  // No subiu instr, use addiu(x, y, -imm).
+    } else {
+      // li handles the relocation.
+      ASSERT(!rs.is(at));
+      li(at, rt);
+      dsubu(rd, rs, at);
+    }
+  }
+}
+
+
 void MacroAssembler::Mul(Register rd, Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     if (kArchVariant == kLoongson) {
       mult(rs, rt.rm());
       mflo(rd);
     } else {
       mul(rd, rs, rt.rm());
     }
   } else {
     // li handles the relocation.
     ASSERT(!rs.is(at));
     li(at, rt);
     if (kArchVariant == kLoongson) {
       mult(rs, at);
       mflo(rd);
     } else {
       mul(rd, rs, at);
     }
   }
 }
 
 
+void MacroAssembler::Dmul(Register rd, Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    if (kArchVariant == kLoongson) {
+      dmult(rs, rt.rm());
+      mflo(rd);
+    } else {
+      // TODO(yuyin):
+      // dmul(rd, rs, rt.rm());
+      dmult(rs, rt.rm());
+      mflo(rd);
+    }
+  } else {
+    // li handles the relocation.
+    ASSERT(!rs.is(at));
+    li(at, rt);
+    if (kArchVariant == kLoongson) {
+      dmult(rs, at);
+      mflo(rd);
+    } else {
+      // TODO(yuyin):
+      // dmul(rd, rs, at);
+      dmult(rs, at);
+      mflo(rd);
+    }
+  }
+}
+
+
 void MacroAssembler::Mult(Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     mult(rs, rt.rm());
   } else {
     // li handles the relocation.
     ASSERT(!rs.is(at));
     li(at, rt);
     mult(rs, at);
   }
 }
 
 
+void MacroAssembler::Dmult(Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    dmult(rs, rt.rm());
+  } else {
+    // li handles the relocation.
+    ASSERT(!rs.is(at));
+    li(at, rt);
+    dmult(rs, at);
+  }
+}
+
+
 void MacroAssembler::Multu(Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     multu(rs, rt.rm());
   } else {
     // li handles the relocation.
     ASSERT(!rs.is(at));
     li(at, rt);
     multu(rs, at);
   }
 }
 
 
+void MacroAssembler::Dmultu(Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    dmultu(rs, rt.rm());
+  } else {
+    // li handles the relocation.
+    ASSERT(!rs.is(at));
+    li(at, rt);
+    dmultu(rs, at);
+  }
+}
+
+
 void MacroAssembler::Div(Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     div(rs, rt.rm());
   } else {
     // li handles the relocation.
     ASSERT(!rs.is(at));
     li(at, rt);
     div(rs, at);
   }
 }
 
 
+void MacroAssembler::Ddiv(Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    ddiv(rs, rt.rm());
+  } else {
+    // li handles the relocation.
+    ASSERT(!rs.is(at));
+    li(at, rt);
+    ddiv(rs, at);
+  }
+}
+
+
 void MacroAssembler::Divu(Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     divu(rs, rt.rm());
   } else {
     // li handles the relocation.
     ASSERT(!rs.is(at));
     li(at, rt);
     divu(rs, at);
   }
 }
 
 
+void MacroAssembler::Ddivu(Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    ddivu(rs, rt.rm());
+  } else {
+    // li handles the relocation.
+    ASSERT(!rs.is(at));
+    li(at, rt);
+    ddivu(rs, at);
+  }
+}
+
+
 void MacroAssembler::And(Register rd, Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     and_(rd, rs, rt.rm());
   } else {
-    if (is_uint16(rt.imm32_) && !MustUseReg(rt.rmode_)) {
-      andi(rd, rs, rt.imm32_);
+    if (is_uint16(rt.imm64_) && !MustUseReg(rt.rmode_)) {
+      andi(rd, rs, rt.imm64_);
     } else {
       // li handles the relocation.
       ASSERT(!rs.is(at));
       li(at, rt);
       and_(rd, rs, at);
     }
   }
 }
 
 
 void MacroAssembler::Or(Register rd, Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     or_(rd, rs, rt.rm());
   } else {
-    if (is_uint16(rt.imm32_) && !MustUseReg(rt.rmode_)) {
-      ori(rd, rs, rt.imm32_);
+    if (is_uint16(rt.imm64_) && !MustUseReg(rt.rmode_)) {
+      ori(rd, rs, rt.imm64_);
     } else {
       // li handles the relocation.
       ASSERT(!rs.is(at));
       li(at, rt);
       or_(rd, rs, at);
     }
   }
 }
 
 
 void MacroAssembler::Xor(Register rd, Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     xor_(rd, rs, rt.rm());
   } else {
-    if (is_uint16(rt.imm32_) && !MustUseReg(rt.rmode_)) {
-      xori(rd, rs, rt.imm32_);
+    if (is_uint16(rt.imm64_) && !MustUseReg(rt.rmode_)) {
+      xori(rd, rs, rt.imm64_);
     } else {
       // li handles the relocation.
       ASSERT(!rs.is(at));
       li(at, rt);
       xor_(rd, rs, at);
     }
   }
 }
 
 
@@ skipping 15 matching lines @@
   ASSERT(!at.is(rt.rm()));
   li(at, -1);
   xor_(rs, rt.rm(), at);
 }
 
 
 void MacroAssembler::Slt(Register rd, Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     slt(rd, rs, rt.rm());
   } else {
-    if (is_int16(rt.imm32_) && !MustUseReg(rt.rmode_)) {
-      slti(rd, rs, rt.imm32_);
+    if (is_int16(rt.imm64_) && !MustUseReg(rt.rmode_)) {
+      slti(rd, rs, rt.imm64_);
     } else {
       // li handles the relocation.
       ASSERT(!rs.is(at));
       li(at, rt);
       slt(rd, rs, at);
     }
   }
 }
 
 
 void MacroAssembler::Sltu(Register rd, Register rs, const Operand& rt) {
   if (rt.is_reg()) {
     sltu(rd, rs, rt.rm());
   } else {
-    if (is_uint16(rt.imm32_) && !MustUseReg(rt.rmode_)) {
-      sltiu(rd, rs, rt.imm32_);
+    if (is_int16(rt.imm64_) && !MustUseReg(rt.rmode_)) {
+      sltiu(rd, rs, rt.imm64_);
     } else {
       // li handles the relocation.
       ASSERT(!rs.is(at));
       li(at, rt);
       sltu(rd, rs, at);
     }
   }
 }
 
 
 void MacroAssembler::Ror(Register rd, Register rs, const Operand& rt) {
-  if (kArchVariant == kMips32r2) {
+  if (kArchVariant == kMips64r2) {
     if (rt.is_reg()) {
       rotrv(rd, rs, rt.rm());
     } else {
-      rotr(rd, rs, rt.imm32_);
+      rotr(rd, rs, rt.imm64_);
     }
   } else {
     if (rt.is_reg()) {
       subu(at, zero_reg, rt.rm());
       sllv(at, rs, at);
       srlv(rd, rs, rt.rm());
       or_(rd, rd, at);
     } else {
-      if (rt.imm32_ == 0) {
+      if (rt.imm64_ == 0) {
         srl(rd, rs, 0);
       } else {
-        srl(at, rs, rt.imm32_);
-        sll(rd, rs, (0x20 - rt.imm32_) & 0x1f);
+        srl(at, rs, rt.imm64_);
+        sll(rd, rs, (0x20 - rt.imm64_) & 0x1f);
         or_(rd, rd, at);
       }
     }
   }
 }
 
 
+void MacroAssembler::Dror(Register rd, Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    drotrv(rd, rs, rt.rm());
+  } else {
+    drotr(rd, rs, rt.imm64_);
+  }
+}
+
+
 void MacroAssembler::Pref(int32_t hint, const MemOperand& rs) {
   if (kArchVariant == kLoongson) {
     lw(zero_reg, rs);
   } else {
     pref(hint, rs);
   }
 }
 
 
 // ------------Pseudo-instructions-------------
 
 void MacroAssembler::Ulw(Register rd, const MemOperand& rs) {
   lwr(rd, rs);
   lwl(rd, MemOperand(rs.rm(), rs.offset() + 3));
 }
 
 
 void MacroAssembler::Usw(Register rd, const MemOperand& rs) {
   swr(rd, rs);
   swl(rd, MemOperand(rs.rm(), rs.offset() + 3));
 }
 
 
+// Do 64-bit load from unaligned address. Note this only handles
+// the specific case of 32-bit aligned, but not 64-bit aligned.
+void MacroAssembler::Uld(Register rd, const MemOperand& rs, Register scratch) {
+  // Assert fail if the offset from start of object IS actually aligned.
+  // ONLY use with known misalignment, since there is performance cost.
+  ASSERT((rs.offset() + kHeapObjectTag) & (kPointerSize - 1));
+  // TODO(plind): endian dependency.
+  lwu(rd, rs);
+  lw(scratch, MemOperand(rs.rm(), rs.offset() + kPointerSize / 2));
+  dsll32(scratch, scratch, 0);
+  Daddu(rd, rd, scratch);
+}
+
+
+// Do 64-bit store to unaligned address. Note this only handles
+// the specific case of 32-bit aligned, but not 64-bit aligned.
+void MacroAssembler::Usd(Register rd, const MemOperand& rs, Register scratch) {
+  // Assert fail if the offset from start of object IS actually aligned.
+  // ONLY use with known misalignment, since there is performance cost.
+  ASSERT((rs.offset() + kHeapObjectTag) & (kPointerSize - 1));
+  // TODO(plind): endian dependency.
+  sw(rd, rs);
+  dsrl32(scratch, rd, 0);
+  sw(scratch, MemOperand(rs.rm(), rs.offset() + kPointerSize / 2));
+}
+
+
 void MacroAssembler::li(Register dst, Handle<Object> value, LiFlags mode) {
   AllowDeferredHandleDereference smi_check;
   if (value->IsSmi()) {
     li(dst, Operand(value), mode);
   } else {
     ASSERT(value->IsHeapObject());
     if (isolate()->heap()->InNewSpace(*value)) {
       Handle<Cell> cell = isolate()->factory()->NewCell(value);
       li(dst, Operand(cell));
-      lw(dst, FieldMemOperand(dst, Cell::kValueOffset));
+      ld(dst, FieldMemOperand(dst, Cell::kValueOffset));
     } else {
       li(dst, Operand(value));
     }
   }
 }
 
 
 void MacroAssembler::li(Register rd, Operand j, LiFlags mode) {
   ASSERT(!j.is_reg());
   BlockTrampolinePoolScope block_trampoline_pool(this);
   if (!MustUseReg(j.rmode_) && mode == OPTIMIZE_SIZE) {
     // Normal load of an immediate value which does not need Relocation Info.
-    if (is_int16(j.imm32_)) {
-      addiu(rd, zero_reg, j.imm32_);
-    } else if (!(j.imm32_ & kHiMask)) {
-      ori(rd, zero_reg, j.imm32_);
-    } else if (!(j.imm32_ & kImm16Mask)) {
-      lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
+    if (is_int32(j.imm64_)) {
+      if (is_int16(j.imm64_)) {
+        daddiu(rd, zero_reg, (j.imm64_ & kImm16Mask));
+      } else if (!(j.imm64_ & kHiMask)) {
+        ori(rd, zero_reg, (j.imm64_ & kImm16Mask));
+      } else if (!(j.imm64_ & kImm16Mask)) {
+        lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
+      } else {
+        lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
+        ori(rd, rd, (j.imm64_ & kImm16Mask));
+      }
     } else {
-      lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
-      ori(rd, rd, (j.imm32_ & kImm16Mask));
+      lui(rd, (j.imm64_ >> 48) & kImm16Mask);
+      ori(rd, rd, (j.imm64_ >> 32) & kImm16Mask);
+      dsll(rd, rd, 16);
+      ori(rd, rd, (j.imm64_ >> 16) & kImm16Mask);
+      dsll(rd, rd, 16);
+      ori(rd, rd, j.imm64_ & kImm16Mask);
     }
+  } else if (MustUseReg(j.rmode_)) {
+    RecordRelocInfo(j.rmode_, j.imm64_);
+    lui(rd, (j.imm64_ >> 32) & kImm16Mask);
+    ori(rd, rd, (j.imm64_ >> 16) & kImm16Mask);
+    dsll(rd, rd, 16);
+    ori(rd, rd, j.imm64_ & kImm16Mask);
+  } else if (mode == ADDRESS_LOAD)  {
+    // We always need the same number of instructions as we may need to patch
+    // this code to load another value which may need all 4 instructions.
+    lui(rd, (j.imm64_ >> 32) & kImm16Mask);
+    ori(rd, rd, (j.imm64_ >> 16) & kImm16Mask);
+    dsll(rd, rd, 16);
+    ori(rd, rd, j.imm64_ & kImm16Mask);
   } else {
-    if (MustUseReg(j.rmode_)) {
-      RecordRelocInfo(j.rmode_, j.imm32_);
-    }
-    // We always need the same number of instructions as we may need to patch
-    // this code to load another value which may need 2 instructions to load.
-    lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
-    ori(rd, rd, (j.imm32_ & kImm16Mask));
+    lui(rd, (j.imm64_ >> 48) & kImm16Mask);
+    ori(rd, rd, (j.imm64_ >> 32) & kImm16Mask);
+    dsll(rd, rd, 16);
+    ori(rd, rd, (j.imm64_ >> 16) & kImm16Mask);
+    dsll(rd, rd, 16);
+    ori(rd, rd, j.imm64_ & kImm16Mask);
   }
 }
 
 
 void MacroAssembler::MultiPush(RegList regs) {
   int16_t num_to_push = NumberOfBitsSet(regs);
   int16_t stack_offset = num_to_push * kPointerSize;
 
-  Subu(sp, sp, Operand(stack_offset));
+  Dsubu(sp, sp, Operand(stack_offset));
   for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
     if ((regs & (1 << i)) != 0) {
       stack_offset -= kPointerSize;
-      sw(ToRegister(i), MemOperand(sp, stack_offset));
+      sd(ToRegister(i), MemOperand(sp, stack_offset));
     }
   }
 }
 
 
 void MacroAssembler::MultiPushReversed(RegList regs) {
   int16_t num_to_push = NumberOfBitsSet(regs);
   int16_t stack_offset = num_to_push * kPointerSize;
 
-  Subu(sp, sp, Operand(stack_offset));
+  Dsubu(sp, sp, Operand(stack_offset));
   for (int16_t i = 0; i < kNumRegisters; i++) {
     if ((regs & (1 << i)) != 0) {
       stack_offset -= kPointerSize;
-      sw(ToRegister(i), MemOperand(sp, stack_offset));
+      sd(ToRegister(i), MemOperand(sp, stack_offset));
     }
   }
 }
 
 
 void MacroAssembler::MultiPop(RegList regs) {
   int16_t stack_offset = 0;
 
   for (int16_t i = 0; i < kNumRegisters; i++) {
     if ((regs & (1 << i)) != 0) {
-      lw(ToRegister(i), MemOperand(sp, stack_offset));
+      ld(ToRegister(i), MemOperand(sp, stack_offset));
       stack_offset += kPointerSize;
     }
   }
-  addiu(sp, sp, stack_offset);
+  daddiu(sp, sp, stack_offset);
 }
 
 
 void MacroAssembler::MultiPopReversed(RegList regs) {
   int16_t stack_offset = 0;
 
   for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
     if ((regs & (1 << i)) != 0) {
-      lw(ToRegister(i), MemOperand(sp, stack_offset));
+      ld(ToRegister(i), MemOperand(sp, stack_offset));
       stack_offset += kPointerSize;
     }
   }
-  addiu(sp, sp, stack_offset);
+  daddiu(sp, sp, stack_offset);
 }
 
 
 void MacroAssembler::MultiPushFPU(RegList regs) {
   int16_t num_to_push = NumberOfBitsSet(regs);
   int16_t stack_offset = num_to_push * kDoubleSize;
 
-  Subu(sp, sp, Operand(stack_offset));
+  Dsubu(sp, sp, Operand(stack_offset));
   for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
     if ((regs & (1 << i)) != 0) {
       stack_offset -= kDoubleSize;
       sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
     }
   }
 }
 
 
 void MacroAssembler::MultiPushReversedFPU(RegList regs) {
   int16_t num_to_push = NumberOfBitsSet(regs);
   int16_t stack_offset = num_to_push * kDoubleSize;
 
-  Subu(sp, sp, Operand(stack_offset));
+  Dsubu(sp, sp, Operand(stack_offset));
   for (int16_t i = 0; i < kNumRegisters; i++) {
     if ((regs & (1 << i)) != 0) {
       stack_offset -= kDoubleSize;
       sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
     }
   }
 }
 
 
 void MacroAssembler::MultiPopFPU(RegList regs) {
   int16_t stack_offset = 0;
 
   for (int16_t i = 0; i < kNumRegisters; i++) {
     if ((regs & (1 << i)) != 0) {
       ldc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
       stack_offset += kDoubleSize;
     }
   }
-  addiu(sp, sp, stack_offset);
+  daddiu(sp, sp, stack_offset);
 }
 
 
 void MacroAssembler::MultiPopReversedFPU(RegList regs) {
   int16_t stack_offset = 0;
 
   for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
     if ((regs & (1 << i)) != 0) {
       ldc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
       stack_offset += kDoubleSize;
     }
   }
-  addiu(sp, sp, stack_offset);
+  daddiu(sp, sp, stack_offset);
 }
 
 
 void MacroAssembler::FlushICache(Register address, unsigned instructions) {
   RegList saved_regs = kJSCallerSaved | ra.bit();
   MultiPush(saved_regs);
   AllowExternalCallThatCantCauseGC scope(this);
 
-  // Save to a0 in case address == t0.
+  // Save to a0 in case address == a4.
   Move(a0, address);
-  PrepareCallCFunction(2, t0);
+  PrepareCallCFunction(2, a4);
 
   li(a1, instructions * kInstrSize);
   CallCFunction(ExternalReference::flush_icache_function(isolate()), 2);
   MultiPop(saved_regs);
 }
 
 
 void MacroAssembler::Ext(Register rt,
                          Register rs,
                          uint16_t pos,
                          uint16_t size) {
   ASSERT(pos < 32);
   ASSERT(pos + size < 33);
-
-  if (kArchVariant == kMips32r2) {
-    ext_(rt, rs, pos, size);
-  } else {
-    // Move rs to rt and shift it left then right to get the
-    // desired bitfield on the right side and zeroes on the left.
-    int shift_left = 32 - (pos + size);
-    sll(rt, rs, shift_left);  // Acts as a move if shift_left == 0.
-
-    int shift_right = 32 - size;
-    if (shift_right > 0) {
-      srl(rt, rt, shift_right);
-    }
-  }
+  ext_(rt, rs, pos, size);
 }
 
 
 void MacroAssembler::Ins(Register rt,
                          Register rs,
                          uint16_t pos,
                          uint16_t size) {
   ASSERT(pos < 32);
   ASSERT(pos + size <= 32);
   ASSERT(size != 0);
-
-  if (kArchVariant == kMips32r2) {
-    ins_(rt, rs, pos, size);
-  } else {
-    ASSERT(!rt.is(t8) && !rs.is(t8));
-    Subu(at, zero_reg, Operand(1));
-    srl(at, at, 32 - size);
-    and_(t8, rs, at);
-    sll(t8, t8, pos);
-    sll(at, at, pos);
-    nor(at, at, zero_reg);
-    and_(at, rt, at);
-    or_(rt, t8, at);
-  }
+  ins_(rt, rs, pos, size);
 }
 
 
 void MacroAssembler::Cvt_d_uw(FPURegister fd,
                               FPURegister fs,
                               FPURegister scratch) {
   // Move the data from fs to t8.
   mfc1(t8, fs);
   Cvt_d_uw(fd, t8, scratch);
 }
 
 
 void MacroAssembler::Cvt_d_uw(FPURegister fd,
                               Register rs,
                               FPURegister scratch) {
   // Convert rs to a FP value in fd (and fd + 1).
   // We do this by converting rs minus the MSB to avoid sign conversion,
   // then adding 2^31 to the result (if needed).
 
   ASSERT(!fd.is(scratch));
   ASSERT(!rs.is(t9));
   ASSERT(!rs.is(at));
 
   // Save rs's MSB to t9.
   Ext(t9, rs, 31, 1);
   // Remove rs's MSB.
   Ext(at, rs, 0, 31);
   // Move the result to fd.
   mtc1(at, fd);
+  mthc1(zero_reg, fd);
 
   // Convert fd to a real FP value.
   cvt_d_w(fd, fd);
 
   Label conversion_done;
 
   // If rs's MSB was 0, it's done.
   // Otherwise we need to add that to the FP register.
   Branch(&conversion_done, eq, t9, Operand(zero_reg));
 
   // Load 2^31 into f20 as its float representation.
   li(at, 0x41E00000);
-  mtc1(at, FPURegister::from_code(scratch.code() + 1));
   mtc1(zero_reg, scratch);
+  mthc1(at, scratch);
   // Add it to fd.
   add_d(fd, fd, scratch);
 
   bind(&conversion_done);
 }
 
 
+void MacroAssembler::Round_l_d(FPURegister fd, FPURegister fs) {
+  round_l_d(fd, fs);
+}
+
+
+void MacroAssembler::Floor_l_d(FPURegister fd, FPURegister fs) {
+  floor_l_d(fd, fs);
+}
+
+
+void MacroAssembler::Ceil_l_d(FPURegister fd, FPURegister fs) {
+  ceil_l_d(fd, fs);
+}
+
+
+void MacroAssembler::Trunc_l_d(FPURegister fd, FPURegister fs) {
+  trunc_l_d(fd, fs);
+}
+
+
+void MacroAssembler::Trunc_l_ud(FPURegister fd,
+                                FPURegister fs,
+                                FPURegister scratch) {
+  // Load to GPR.
+  dmfc1(t8, fs);
+  // Reset sign bit.
+  li(at, 0x7fffffffffffffff);
+  and_(t8, t8, at);
+  dmtc1(t8, fs);
+  trunc_l_d(fd, fs);
+}
+
+
 void MacroAssembler::Trunc_uw_d(FPURegister fd,
                                 FPURegister fs,
                                 FPURegister scratch) {
   Trunc_uw_d(fs, t8, scratch);
   mtc1(t8, fd);
 }
 
 
 void MacroAssembler::Trunc_w_d(FPURegister fd, FPURegister fs) {
-  if (kArchVariant == kLoongson && fd.is(fs)) {
-    mfc1(t8, FPURegister::from_code(fs.code() + 1));
-    trunc_w_d(fd, fs);
-    mtc1(t8, FPURegister::from_code(fs.code() + 1));
-  } else {
-    trunc_w_d(fd, fs);
-  }
+  trunc_w_d(fd, fs);
 }
 
 
 void MacroAssembler::Round_w_d(FPURegister fd, FPURegister fs) {
-  if (kArchVariant == kLoongson && fd.is(fs)) {
-    mfc1(t8, FPURegister::from_code(fs.code() + 1));
-    round_w_d(fd, fs);
-    mtc1(t8, FPURegister::from_code(fs.code() + 1));
-  } else {
-    round_w_d(fd, fs);
-  }
+  round_w_d(fd, fs);
 }
 
 
 void MacroAssembler::Floor_w_d(FPURegister fd, FPURegister fs) {
-  if (kArchVariant == kLoongson && fd.is(fs)) {
-    mfc1(t8, FPURegister::from_code(fs.code() + 1));
-    floor_w_d(fd, fs);
-    mtc1(t8, FPURegister::from_code(fs.code() + 1));
-  } else {
-    floor_w_d(fd, fs);
-  }
+  floor_w_d(fd, fs);
 }
 
 
 void MacroAssembler::Ceil_w_d(FPURegister fd, FPURegister fs) {
-  if (kArchVariant == kLoongson && fd.is(fs)) {
-    mfc1(t8, FPURegister::from_code(fs.code() + 1));
-    ceil_w_d(fd, fs);
-    mtc1(t8, FPURegister::from_code(fs.code() + 1));
-  } else {
-    ceil_w_d(fd, fs);
-  }
+  ceil_w_d(fd, fs);
 }
 
 
 void MacroAssembler::Trunc_uw_d(FPURegister fd,
                                 Register rs,
                                 FPURegister scratch) {
   ASSERT(!fd.is(scratch));
   ASSERT(!rs.is(at));
 
   // Load 2^31 into scratch as its float representation.
   li(at, 0x41E00000);
-  mtc1(at, FPURegister::from_code(scratch.code() + 1));
   mtc1(zero_reg, scratch);
+  mthc1(at, scratch);
   // Test if scratch > fd.
   // If fd < 2^31 we can convert it normally.
   Label simple_convert;
   BranchF(&simple_convert, NULL, lt, fd, scratch);
 
   // First we subtract 2^31 from fd, then trunc it to rs
   // and add 2^31 to rs.
   sub_d(scratch, fd, scratch);
   trunc_w_d(scratch, scratch);
   mfc1(rs, scratch);
   Or(rs, rs, 1 << 31);
 
   Label done;
   Branch(&done);
   // Simple conversion.
   bind(&simple_convert);
   trunc_w_d(scratch, fd);
   mfc1(rs, scratch);
 
   bind(&done);
 }
 
 
+void MacroAssembler::Madd_d(FPURegister fd, FPURegister fr, FPURegister fs,
+    FPURegister ft, FPURegister scratch) {
+  if (0) {  // TODO(plind): find reasonable arch-variant symbol names.
+    madd_d(fd, fr, fs, ft);
+  } else {
+    // Can not change source regs's value.
+    ASSERT(!fr.is(scratch) && !fs.is(scratch) && !ft.is(scratch));
+    mul_d(scratch, fs, ft);
+    add_d(fd, fr, scratch);
+  }
+}
+
+
 void MacroAssembler::BranchF(Label* target,
                              Label* nan,
                              Condition cc,
                              FPURegister cmp1,
                              FPURegister cmp2,
                              BranchDelaySlot bd) {
   BlockTrampolinePoolScope block_trampoline_pool(this);
   if (cc == al) {
     Branch(bd, target);
     return;
@@ skipping 60 matching lines @@
   DoubleRepresentation value_rep(imm);
   // Handle special values first.
   bool force_load = dst.is(kDoubleRegZero);
   if (value_rep == zero && !force_load) {
     mov_d(dst, kDoubleRegZero);
   } else if (value_rep == minus_zero && !force_load) {
     neg_d(dst, kDoubleRegZero);
   } else {
     uint32_t lo, hi;
     DoubleAsTwoUInt32(imm, &lo, &hi);
-    // Move the low part of the double into the lower of the corresponding FPU
-    // register of FPU register pair.
+    // Move the low part of the double into the lower bits of the corresponding
+    // FPU register.
     if (lo != 0) {
       li(at, Operand(lo));
       mtc1(at, dst);
     } else {
       mtc1(zero_reg, dst);
     }
-    // Move the high part of the double into the higher of the corresponding FPU
-    // register of FPU register pair.
+    // Move the high part of the double into the high bits of the corresponding
+    // FPU register.
     if (hi != 0) {
       li(at, Operand(hi));
-      mtc1(at, dst.high());
+      mthc1(at, dst);
     } else {
-      mtc1(zero_reg, dst.high());
+      mthc1(zero_reg, dst);
     }
   }
 }
 
 
 void MacroAssembler::Movz(Register rd, Register rs, Register rt) {
   if (kArchVariant == kLoongson) {
     Label done;
     Branch(&done, ne, rt, Operand(zero_reg));
     mov(rd, rs);
@@ skipping 10 matching lines @@
     Branch(&done, eq, rt, Operand(zero_reg));
     mov(rd, rs);
     bind(&done);
   } else {
     movn(rd, rs, rt);
   }
 }
 
 
 void MacroAssembler::Movt(Register rd, Register rs, uint16_t cc) {
-  if (kArchVariant == kLoongson) {
-    // Tests an FP condition code and then conditionally move rs to rd.
-    // We do not currently use any FPU cc bit other than bit 0.
-    ASSERT(cc == 0);
-    ASSERT(!(rs.is(t8) || rd.is(t8)));
-    Label done;
-    Register scratch = t8;
-    // For testing purposes we need to fetch content of the FCSR register and
-    // than test its cc (floating point condition code) bit (for cc = 0, it is
-    // 24. bit of the FCSR).
-    cfc1(scratch, FCSR);
-    // For the MIPS I, II and III architectures, the contents of scratch is
-    // UNPREDICTABLE for the instruction immediately following CFC1.
-    nop();
-    srl(scratch, scratch, 16);
-    andi(scratch, scratch, 0x0080);
-    Branch(&done, eq, scratch, Operand(zero_reg));
-    mov(rd, rs);
-    bind(&done);
-  } else {
-    movt(rd, rs, cc);
-  }
+  movt(rd, rs, cc);
 }
 
 
 void MacroAssembler::Movf(Register rd, Register rs, uint16_t cc) {
-  if (kArchVariant == kLoongson) {
-    // Tests an FP condition code and then conditionally move rs to rd.
-    // We do not currently use any FPU cc bit other than bit 0.
-    ASSERT(cc == 0);
-    ASSERT(!(rs.is(t8) || rd.is(t8)));
-    Label done;
-    Register scratch = t8;
-    // For testing purposes we need to fetch content of the FCSR register and
-    // than test its cc (floating point condition code) bit (for cc = 0, it is
-    // 24. bit of the FCSR).
-    cfc1(scratch, FCSR);
-    // For the MIPS I, II and III architectures, the contents of scratch is
-    // UNPREDICTABLE for the instruction immediately following CFC1.
-    nop();
-    srl(scratch, scratch, 16);
-    andi(scratch, scratch, 0x0080);
-    Branch(&done, ne, scratch, Operand(zero_reg));
-    mov(rd, rs);
-    bind(&done);
-  } else {
-    movf(rd, rs, cc);
-  }
+  movf(rd, rs, cc);
 }
 
 
 void MacroAssembler::Clz(Register rd, Register rs) {
-  if (kArchVariant == kLoongson) {
-    ASSERT(!(rd.is(t8) || rd.is(t9)) && !(rs.is(t8) || rs.is(t9)));
-    Register mask = t8;
-    Register scratch = t9;
-    Label loop, end;
-    mov(at, rs);
-    mov(rd, zero_reg);
-    lui(mask, 0x8000);
-    bind(&loop);
-    and_(scratch, at, mask);
-    Branch(&end, ne, scratch, Operand(zero_reg));
-    addiu(rd, rd, 1);
-    Branch(&loop, ne, mask, Operand(zero_reg), USE_DELAY_SLOT);
-    srl(mask, mask, 1);
-    bind(&end);
-  } else {
-    clz(rd, rs);
-  }
+  clz(rd, rs);
 }
 
 
 void MacroAssembler::EmitFPUTruncate(FPURoundingMode rounding_mode,
                                      Register result,
                                      DoubleRegister double_input,
                                      Register scratch,
                                      DoubleRegister double_scratch,
                                      Register except_flag,
                                      CheckForInexactConversion check_inexact) {
@@ skipping 80 matching lines @@
 
 
 void MacroAssembler::TruncateDoubleToI(Register result,
                                        DoubleRegister double_input) {
   Label done;
 
   TryInlineTruncateDoubleToI(result, double_input, &done);
 
   // If we fell through then inline version didn't succeed - call stub instead.
   push(ra);
-  Subu(sp, sp, Operand(kDoubleSize));  // Put input on stack.
+  Dsubu(sp, sp, Operand(kDoubleSize));  // Put input on stack.
   sdc1(double_input, MemOperand(sp, 0));
 
   DoubleToIStub stub(isolate(), sp, result, 0, true, true);
   CallStub(&stub);
 
-  Addu(sp, sp, Operand(kDoubleSize));
+  Daddu(sp, sp, Operand(kDoubleSize));
   pop(ra);
 
   bind(&done);
 }
 
 
 void MacroAssembler::TruncateHeapNumberToI(Register result, Register object) {
   Label done;
   DoubleRegister double_scratch = f12;
   ASSERT(!result.is(object));
@@ skipping 29 matching lines @@
   JumpIfNotHeapNumber(object, heap_number_map, scratch, not_number);
   TruncateHeapNumberToI(result, object);
 
   bind(&done);
 }
 
 
 void MacroAssembler::GetLeastBitsFromSmi(Register dst,
                                          Register src,
                                          int num_least_bits) {
-  Ext(dst, src, kSmiTagSize, num_least_bits);
+  // Ext(dst, src, kSmiTagSize, num_least_bits);
+  SmiUntag(dst, src);
+  And(dst, dst, Operand((1 << num_least_bits) - 1));
 }
 
 
 void MacroAssembler::GetLeastBitsFromInt32(Register dst,
                                            Register src,
                                            int num_least_bits) {
+  ASSERT(!src.is(dst));
   And(dst, src, Operand((1 << num_least_bits) - 1));
 }
 
 
 // Emulated condtional branches do not emit a nop in the branch delay slot.
 //
 // BRANCH_ARGS_CHECK checks that conditional jump arguments are correct.
 #define BRANCH_ARGS_CHECK(cond, rs, rt) ASSERT(                                \
     (cond == cc_always && rs.is(zero_reg) && rt.rm().is(zero_reg)) ||          \
     (cond != cc_always && (!rs.is(zero_reg) || !rt.rm().is(zero_reg))))
@@ skipping 193 matching lines @@
         break;
       case ne:
         // We don't want any other register but scratch clobbered.
         ASSERT(!scratch.is(rs));
         r2 = scratch;
         li(r2, rt);
         bne(rs, r2, offset);
         break;
       // Signed comparison.
       case greater:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           bgtz(rs, offset);
         } else {
           r2 = scratch;
           li(r2, rt);
           slt(scratch, r2, rs);
           bne(scratch, zero_reg, offset);
         }
         break;
       case greater_equal:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           bgez(rs, offset);
-        } else if (is_int16(rt.imm32_)) {
-          slti(scratch, rs, rt.imm32_);
+        } else if (is_int16(rt.imm64_)) {
+          slti(scratch, rs, rt.imm64_);
           beq(scratch, zero_reg, offset);
         } else {
           r2 = scratch;
           li(r2, rt);
           slt(scratch, rs, r2);
           beq(scratch, zero_reg, offset);
         }
         break;
       case less:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           bltz(rs, offset);
-        } else if (is_int16(rt.imm32_)) {
-          slti(scratch, rs, rt.imm32_);
+        } else if (is_int16(rt.imm64_)) {
+          slti(scratch, rs, rt.imm64_);
           bne(scratch, zero_reg, offset);
         } else {
           r2 = scratch;
           li(r2, rt);
           slt(scratch, rs, r2);
           bne(scratch, zero_reg, offset);
         }
         break;
       case less_equal:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           blez(rs, offset);
         } else {
           r2 = scratch;
           li(r2, rt);
           slt(scratch, r2, rs);
           beq(scratch, zero_reg, offset);
        }
        break;
       // Unsigned comparison.
       case Ugreater:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           bgtz(rs, offset);
         } else {
           r2 = scratch;
           li(r2, rt);
           sltu(scratch, r2, rs);
           bne(scratch, zero_reg, offset);
         }
         break;
       case Ugreater_equal:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           bgez(rs, offset);
-        } else if (is_int16(rt.imm32_)) {
-          sltiu(scratch, rs, rt.imm32_);
+        } else if (is_int16(rt.imm64_)) {
+          sltiu(scratch, rs, rt.imm64_);
           beq(scratch, zero_reg, offset);
         } else {
           r2 = scratch;
           li(r2, rt);
           sltu(scratch, rs, r2);
           beq(scratch, zero_reg, offset);
         }
         break;
       case Uless:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           // No code needs to be emitted.
           return;
-        } else if (is_int16(rt.imm32_)) {
-          sltiu(scratch, rs, rt.imm32_);
+        } else if (is_int16(rt.imm64_)) {
+          sltiu(scratch, rs, rt.imm64_);
           bne(scratch, zero_reg, offset);
         } else {
           r2 = scratch;
           li(r2, rt);
           sltu(scratch, rs, r2);
           bne(scratch, zero_reg, offset);
         }
         break;
       case Uless_equal:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           b(offset);
         } else {
           r2 = scratch;
           li(r2, rt);
           sltu(scratch, r2, rs);
           beq(scratch, zero_reg, offset);
         }
         break;
       default:
         UNREACHABLE();
@@ skipping 148 matching lines @@
         break;
       case ne:
         ASSERT(!scratch.is(rs));
         r2 = scratch;
         li(r2, rt);
         offset = shifted_branch_offset(L, false);
         bne(rs, r2, offset);
         break;
       // Signed comparison.
       case greater:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           offset = shifted_branch_offset(L, false);
           bgtz(rs, offset);
         } else {
           ASSERT(!scratch.is(rs));
           r2 = scratch;
           li(r2, rt);
           slt(scratch, r2, rs);
           offset = shifted_branch_offset(L, false);
           bne(scratch, zero_reg, offset);
         }
         break;
       case greater_equal:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           offset = shifted_branch_offset(L, false);
           bgez(rs, offset);
-        } else if (is_int16(rt.imm32_)) {
-          slti(scratch, rs, rt.imm32_);
+        } else if (is_int16(rt.imm64_)) {
+          slti(scratch, rs, rt.imm64_);
           offset = shifted_branch_offset(L, false);
           beq(scratch, zero_reg, offset);
         } else {
           ASSERT(!scratch.is(rs));
           r2 = scratch;
           li(r2, rt);
           slt(scratch, rs, r2);
           offset = shifted_branch_offset(L, false);
           beq(scratch, zero_reg, offset);
         }
         break;
       case less:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           offset = shifted_branch_offset(L, false);
           bltz(rs, offset);
-        } else if (is_int16(rt.imm32_)) {
-          slti(scratch, rs, rt.imm32_);
+        } else if (is_int16(rt.imm64_)) {
+          slti(scratch, rs, rt.imm64_);
           offset = shifted_branch_offset(L, false);
           bne(scratch, zero_reg, offset);
         } else {
           ASSERT(!scratch.is(rs));
           r2 = scratch;
           li(r2, rt);
           slt(scratch, rs, r2);
           offset = shifted_branch_offset(L, false);
           bne(scratch, zero_reg, offset);
         }
         break;
       case less_equal:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           offset = shifted_branch_offset(L, false);
           blez(rs, offset);
         } else {
           ASSERT(!scratch.is(rs));
           r2 = scratch;
           li(r2, rt);
           slt(scratch, r2, rs);
           offset = shifted_branch_offset(L, false);
           beq(scratch, zero_reg, offset);
         }
         break;
       // Unsigned comparison.
       case Ugreater:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           offset = shifted_branch_offset(L, false);
           bne(rs, zero_reg, offset);
         } else {
           ASSERT(!scratch.is(rs));
           r2 = scratch;
           li(r2, rt);
           sltu(scratch, r2, rs);
           offset = shifted_branch_offset(L, false);
           bne(scratch, zero_reg, offset);
         }
         break;
       case Ugreater_equal:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           offset = shifted_branch_offset(L, false);
           bgez(rs, offset);
-        } else if (is_int16(rt.imm32_)) {
-          sltiu(scratch, rs, rt.imm32_);
+        } else if (is_int16(rt.imm64_)) {
+          sltiu(scratch, rs, rt.imm64_);
           offset = shifted_branch_offset(L, false);
           beq(scratch, zero_reg, offset);
         } else {
           ASSERT(!scratch.is(rs));
           r2 = scratch;
           li(r2, rt);
           sltu(scratch, rs, r2);
           offset = shifted_branch_offset(L, false);
           beq(scratch, zero_reg, offset);
         }
         break;
      case Uless:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           // No code needs to be emitted.
           return;
-        } else if (is_int16(rt.imm32_)) {
-          sltiu(scratch, rs, rt.imm32_);
+        } else if (is_int16(rt.imm64_)) {
+          sltiu(scratch, rs, rt.imm64_);
           offset = shifted_branch_offset(L, false);
           bne(scratch, zero_reg, offset);
         } else {
           ASSERT(!scratch.is(rs));
           r2 = scratch;
           li(r2, rt);
           sltu(scratch, rs, r2);
           offset = shifted_branch_offset(L, false);
           bne(scratch, zero_reg, offset);
         }
         break;
       case Uless_equal:
-        if (rt.imm32_ == 0) {
+        if (rt.imm64_ == 0) {
           offset = shifted_branch_offset(L, false);
           beq(rs, zero_reg, offset);
         } else {
           ASSERT(!scratch.is(rs));
           r2 = scratch;
           li(r2, rt);
           sltu(scratch, r2, rs);
           offset = shifted_branch_offset(L, false);
           beq(scratch, zero_reg, offset);
         }
@@ skipping 106 matching lines @@
         break;
       case ne:
         beq(rs, r2, 2);
         nop();
         bal(offset);
         break;
 
       // Signed comparison.
       case greater:
         slt(scratch, r2, rs);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         bgezal(scratch, offset);
         break;
       case greater_equal:
         slt(scratch, rs, r2);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         bltzal(scratch, offset);
         break;
       case less:
         slt(scratch, rs, r2);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         bgezal(scratch, offset);
         break;
       case less_equal:
         slt(scratch, r2, rs);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         bltzal(scratch, offset);
         break;
 
       // Unsigned comparison.
       case Ugreater:
         sltu(scratch, r2, rs);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         bgezal(scratch, offset);
         break;
       case Ugreater_equal:
         sltu(scratch, rs, r2);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         bltzal(scratch, offset);
         break;
       case Uless:
         sltu(scratch, rs, r2);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         bgezal(scratch, offset);
         break;
       case Uless_equal:
         sltu(scratch, r2, rs);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         bltzal(scratch, offset);
         break;
 
       default:
         UNREACHABLE();
     }
   }
   // Emit a nop in the branch delay slot if required.
   if (bdslot == PROTECT)
     nop();
@@ skipping 40 matching lines @@
       case ne:
         beq(rs, r2, 2);
         nop();
         offset = shifted_branch_offset(L, false);
         bal(offset);
         break;
 
       // Signed comparison.
       case greater:
         slt(scratch, r2, rs);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         offset = shifted_branch_offset(L, false);
         bgezal(scratch, offset);
         break;
       case greater_equal:
         slt(scratch, rs, r2);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         offset = shifted_branch_offset(L, false);
         bltzal(scratch, offset);
         break;
       case less:
         slt(scratch, rs, r2);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         offset = shifted_branch_offset(L, false);
         bgezal(scratch, offset);
         break;
       case less_equal:
         slt(scratch, r2, rs);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         offset = shifted_branch_offset(L, false);
         bltzal(scratch, offset);
         break;
 
       // Unsigned comparison.
       case Ugreater:
         sltu(scratch, r2, rs);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         offset = shifted_branch_offset(L, false);
         bgezal(scratch, offset);
         break;
       case Ugreater_equal:
         sltu(scratch, rs, r2);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         offset = shifted_branch_offset(L, false);
         bltzal(scratch, offset);
         break;
       case Uless:
         sltu(scratch, rs, r2);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         offset = shifted_branch_offset(L, false);
         bgezal(scratch, offset);
         break;
       case Uless_equal:
         sltu(scratch, r2, rs);
-        addiu(scratch, scratch, -1);
+        daddiu(scratch, scratch, -1);
         offset = shifted_branch_offset(L, false);
         bltzal(scratch, offset);
         break;
 
       default:
         UNREACHABLE();
     }
   }
   // Check that offset could actually hold on an int16_t.
   ASSERT(is_int16(offset));
@@ skipping 109 matching lines @@
 }
 
 
 int MacroAssembler::CallSize(Address target,
                              RelocInfo::Mode rmode,
                              Condition cond,
                              Register rs,
                              const Operand& rt,
                              BranchDelaySlot bd) {
   int size = CallSize(t9, cond, rs, rt, bd);
-  return size + 2 * kInstrSize;
+  return size + 4 * kInstrSize;
 }
 
 
 void MacroAssembler::Call(Address target,
                           RelocInfo::Mode rmode,
                           Condition cond,
                           Register rs,
                           const Operand& rt,
                           BranchDelaySlot bd) {
   BlockTrampolinePoolScope block_trampoline_pool(this);
   Label start;
   bind(&start);
-  int32_t target_int = reinterpret_cast<int32_t>(target);
+  int64_t target_int = reinterpret_cast<int64_t>(target);
   // Must record previous source positions before the
   // li() generates a new code target.
   positions_recorder()->WriteRecordedPositions();
-  li(t9, Operand(target_int, rmode), CONSTANT_SIZE);
+  li(t9, Operand(target_int, rmode), ADDRESS_LOAD);
   Call(t9, cond, rs, rt, bd);
   ASSERT_EQ(CallSize(target, rmode, cond, rs, rt, bd),
             SizeOfCodeGeneratedSince(&start));
 }
 
 
 int MacroAssembler::CallSize(Handle<Code> code,
                              RelocInfo::Mode rmode,
                              TypeFeedbackId ast_id,
                              Condition cond,
@@ skipping 32 matching lines @@
                          Register rs,
                          const Operand& rt,
                          BranchDelaySlot bd) {
   Jump(ra, cond, rs, rt, bd);
 }
 
 
 void MacroAssembler::J(Label* L, BranchDelaySlot bdslot) {
   BlockTrampolinePoolScope block_trampoline_pool(this);
 
-  uint32_t imm28;
+  uint64_t imm28;
   imm28 = jump_address(L);
   imm28 &= kImm28Mask;
   { BlockGrowBufferScope block_buf_growth(this);
     // Buffer growth (and relocation) must be blocked for internal references
     // until associated instructions are emitted and available to be patched.
     RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE);
     j(imm28);
   }
   // Emit a nop in the branch delay slot if required.
   if (bdslot == PROTECT)
     nop();
 }
 
 
 void MacroAssembler::Jr(Label* L, BranchDelaySlot bdslot) {
   BlockTrampolinePoolScope block_trampoline_pool(this);
 
-  uint32_t imm32;
-  imm32 = jump_address(L);
+  uint64_t imm64;
+  imm64 = jump_address(L);
   { BlockGrowBufferScope block_buf_growth(this);
     // Buffer growth (and relocation) must be blocked for internal references
     // until associated instructions are emitted and available to be patched.
     RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE);
-    lui(at, (imm32 & kHiMask) >> kLuiShift);
-    ori(at, at, (imm32 & kImm16Mask));
+    li(at, Operand(imm64), ADDRESS_LOAD);
   }
   jr(at);
 
   // Emit a nop in the branch delay slot if required.
   if (bdslot == PROTECT)
     nop();
 }
 
 
 void MacroAssembler::Jalr(Label* L, BranchDelaySlot bdslot) {
   BlockTrampolinePoolScope block_trampoline_pool(this);
 
-  uint32_t imm32;
-  imm32 = jump_address(L);
+  uint64_t imm64;
+  imm64 = jump_address(L);
   { BlockGrowBufferScope block_buf_growth(this);
     // Buffer growth (and relocation) must be blocked for internal references
     // until associated instructions are emitted and available to be patched.
     RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE);
-    lui(at, (imm32 & kHiMask) >> kLuiShift);
-    ori(at, at, (imm32 & kImm16Mask));
+    li(at, Operand(imm64), ADDRESS_LOAD);
   }
   jalr(at);
 
   // Emit a nop in the branch delay slot if required.
   if (bdslot == PROTECT)
     nop();
 }
 
 
 void MacroAssembler::DropAndRet(int drop) {
   Ret(USE_DELAY_SLOT);
-  addiu(sp, sp, drop * kPointerSize);
+  daddiu(sp, sp, drop * kPointerSize);
 }
 
 void MacroAssembler::DropAndRet(int drop,
                                 Condition cond,
                                 Register r1,
                                 const Operand& r2) {
   // Both Drop and Ret need to be conditional.
   Label skip;
   if (cond != cc_always) {
     Branch(&skip, NegateCondition(cond), r1, r2);
@@ skipping 15 matching lines @@
   if (count <= 0) {
     return;
   }
 
   Label skip;
 
   if (cond != al) {
      Branch(&skip, NegateCondition(cond), reg, op);
   }
 
-  addiu(sp, sp, count * kPointerSize);
+  daddiu(sp, sp, count * kPointerSize);
 
   if (cond != al) {
     bind(&skip);
   }
 }
 
 
 
 void MacroAssembler::Swap(Register reg1,
                           Register reg2,
@@ skipping 14 matching lines @@
   BranchAndLink(target);
 }
 
 
 void MacroAssembler::Push(Handle<Object> handle) {
   li(at, Operand(handle));
   push(at);
 }
 
 
+void MacroAssembler::PushRegisterAsTwoSmis(Register src, Register scratch) {
+  ASSERT(!src.is(scratch));
+  mov(scratch, src);
+  dsrl32(src, src, 0);
+  dsll32(src, src, 0);
+  push(src);
+  dsll32(scratch, scratch, 0);
+  push(scratch);
+}
+
+
+void MacroAssembler::PopRegisterAsTwoSmis(Register dst, Register scratch) {
+  ASSERT(!dst.is(scratch));
+  pop(scratch);
+  dsrl32(scratch, scratch, 0);
+  pop(dst);
+  dsrl32(dst, dst, 0);
+  dsll32(dst, dst, 0);
+  or_(dst, dst, scratch);
+}
+
+
 void MacroAssembler::DebugBreak() {
   PrepareCEntryArgs(0);
   PrepareCEntryFunction(ExternalReference(Runtime::kDebugBreak, isolate()));
   CEntryStub ces(isolate(), 1);
   ASSERT(AllowThisStubCall(&ces));
   Call(ces.GetCode(), RelocInfo::DEBUG_BREAK);
 }
 
 
 // ---------------------------------------------------------------------------
 // Exception handling.
 
 void MacroAssembler::PushTryHandler(StackHandler::Kind kind,
                                     int handler_index) {
   // Adjust this code if not the case.
   STATIC_ASSERT(StackHandlerConstants::kSize == 5 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kCodeOffset == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
 
   // For the JSEntry handler, we must preserve a0-a3 and s0.
-  // t1-t3 are available. We will build up the handler from the bottom by
+  // a5-a7 are available. We will build up the handler from the bottom by
   // pushing on the stack.
-  // Set up the code object (t1) and the state (t2) for pushing.
+  // Set up the code object (a5) and the state (a6) for pushing.
   unsigned state =
       StackHandler::IndexField::encode(handler_index) |
       StackHandler::KindField::encode(kind);
-  li(t1, Operand(CodeObject()), CONSTANT_SIZE);
-  li(t2, Operand(state));
+  li(a5, Operand(CodeObject()), CONSTANT_SIZE);
+  li(a6, Operand(state));
 
   // Push the frame pointer, context, state, and code object.
   if (kind == StackHandler::JS_ENTRY) {
     ASSERT_EQ(Smi::FromInt(0), 0);
     // The second zero_reg indicates no context.
     // The first zero_reg is the NULL frame pointer.
     // The operands are reversed to match the order of MultiPush/Pop.
-    Push(zero_reg, zero_reg, t2, t1);
+    Push(zero_reg, zero_reg, a6, a5);
   } else {
-    MultiPush(t1.bit() | t2.bit() | cp.bit() | fp.bit());
+    MultiPush(a5.bit() | a6.bit() | cp.bit() | fp.bit());
   }
 
   // Link the current handler as the next handler.
-  li(t2, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
-  lw(t1, MemOperand(t2));
-  push(t1);
+  li(a6, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
+  ld(a5, MemOperand(a6));
+  push(a5);
   // Set this new handler as the current one.
-  sw(sp, MemOperand(t2));
+  sd(sp, MemOperand(a6));
 }
 
 
 void MacroAssembler::PopTryHandler() {
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
   pop(a1);
-  Addu(sp, sp, Operand(StackHandlerConstants::kSize - kPointerSize));
+  Daddu(sp, sp, Operand(StackHandlerConstants::kSize - kPointerSize));
   li(at, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
-  sw(a1, MemOperand(at));
+  sd(a1, MemOperand(at));
 }
 
 
 void MacroAssembler::JumpToHandlerEntry() {
   // Compute the handler entry address and jump to it.  The handler table is
   // a fixed array of (smi-tagged) code offsets.
   // v0 = exception, a1 = code object, a2 = state.
-  lw(a3, FieldMemOperand(a1, Code::kHandlerTableOffset));  // Handler table.
-  Addu(a3, a3, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
-  srl(a2, a2, StackHandler::kKindWidth);  // Handler index.
-  sll(a2, a2, kPointerSizeLog2);
-  Addu(a2, a3, a2);
-  lw(a2, MemOperand(a2));  // Smi-tagged offset.
-  Addu(a1, a1, Operand(Code::kHeaderSize - kHeapObjectTag));  // Code start.
-  sra(t9, a2, kSmiTagSize);
-  Addu(t9, t9, a1);
+  Uld(a3, FieldMemOperand(a1, Code::kHandlerTableOffset));
+  Daddu(a3, a3, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+  dsrl(a2, a2, StackHandler::kKindWidth);  // Handler index.
+  dsll(a2, a2, kPointerSizeLog2);
+  Daddu(a2, a3, a2);
+  ld(a2, MemOperand(a2));  // Smi-tagged offset.
+  Daddu(a1, a1, Operand(Code::kHeaderSize - kHeapObjectTag));  // Code start.
+  dsra32(t9, a2, 0);
+  Daddu(t9, t9, a1);
   Jump(t9);  // Jump.
 }
 
 
 void MacroAssembler::Throw(Register value) {
   // Adjust this code if not the case.
   STATIC_ASSERT(StackHandlerConstants::kSize == 5 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
   STATIC_ASSERT(StackHandlerConstants::kCodeOffset == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
 
   // The exception is expected in v0.
   Move(v0, value);
 
   // Drop the stack pointer to the top of the top handler.
   li(a3, Operand(ExternalReference(Isolate::kHandlerAddress,
                                    isolate())));
-  lw(sp, MemOperand(a3));
+  ld(sp, MemOperand(a3));
 
   // Restore the next handler.
   pop(a2);
-  sw(a2, MemOperand(a3));
+  sd(a2, MemOperand(a3));
 
   // Get the code object (a1) and state (a2).  Restore the context and frame
   // pointer.
   MultiPop(a1.bit() | a2.bit() | cp.bit() | fp.bit());
 
   // If the handler is a JS frame, restore the context to the frame.
   // (kind == ENTRY) == (fp == 0) == (cp == 0), so we could test either fp
   // or cp.
   Label done;
   Branch(&done, eq, cp, Operand(zero_reg));
-  sw(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+  sd(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
   bind(&done);
 
   JumpToHandlerEntry();
 }
 
 
 void MacroAssembler::ThrowUncatchable(Register value) {
   // Adjust this code if not the case.
   STATIC_ASSERT(StackHandlerConstants::kSize == 5 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kCodeOffset == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
 
   // The exception is expected in v0.
   if (!value.is(v0)) {
     mov(v0, value);
   }
   // Drop the stack pointer to the top of the top stack handler.
   li(a3, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
-  lw(sp, MemOperand(a3));
+  ld(sp, MemOperand(a3));
 
   // Unwind the handlers until the ENTRY handler is found.
   Label fetch_next, check_kind;
   jmp(&check_kind);
   bind(&fetch_next);
-  lw(sp, MemOperand(sp, StackHandlerConstants::kNextOffset));
+  ld(sp, MemOperand(sp, StackHandlerConstants::kNextOffset));
 
   bind(&check_kind);
   STATIC_ASSERT(StackHandler::JS_ENTRY == 0);
-  lw(a2, MemOperand(sp, StackHandlerConstants::kStateOffset));
+  ld(a2, MemOperand(sp, StackHandlerConstants::kStateOffset));
   And(a2, a2, Operand(StackHandler::KindField::kMask));
   Branch(&fetch_next, ne, a2, Operand(zero_reg));
 
   // Set the top handler address to next handler past the top ENTRY handler.
   pop(a2);
-  sw(a2, MemOperand(a3));
+  sd(a2, MemOperand(a3));
 
   // Get the code object (a1) and state (a2).  Clear the context and frame
   // pointer (0 was saved in the handler).
   MultiPop(a1.bit() | a2.bit() | cp.bit() | fp.bit());
 
   JumpToHandlerEntry();
 }
 
 
 void MacroAssembler::Allocate(int object_size,
@@ skipping 18 matching lines @@
   ASSERT(!result.is(scratch2));
   ASSERT(!scratch1.is(scratch2));
   ASSERT(!scratch1.is(t9));
   ASSERT(!scratch2.is(t9));
   ASSERT(!result.is(t9));
 
   // Make object size into bytes.
   if ((flags & SIZE_IN_WORDS) != 0) {
     object_size *= kPointerSize;
   }
-  ASSERT_EQ(0, object_size & kObjectAlignmentMask);
+  ASSERT(0 == (object_size & kObjectAlignmentMask));
 
   // Check relative positions of allocation top and limit addresses.
   // ARM adds additional checks to make sure the ldm instruction can be
   // used. On MIPS we don't have ldm so we don't need additional checks either.
   ExternalReference allocation_top =
       AllocationUtils::GetAllocationTopReference(isolate(), flags);
   ExternalReference allocation_limit =
       AllocationUtils::GetAllocationLimitReference(isolate(), flags);
 
   intptr_t top   =
       reinterpret_cast<intptr_t>(allocation_top.address());
   intptr_t limit =
       reinterpret_cast<intptr_t>(allocation_limit.address());
   ASSERT((limit - top) == kPointerSize);
 
   // Set up allocation top address and object size registers.
   Register topaddr = scratch1;
   li(topaddr, Operand(allocation_top));
 
   // This code stores a temporary value in t9.
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
     // Load allocation top into result and allocation limit into t9.
-    lw(result, MemOperand(topaddr));
-    lw(t9, MemOperand(topaddr, kPointerSize));
+    ld(result, MemOperand(topaddr));
+    ld(t9, MemOperand(topaddr, kPointerSize));
   } else {
     if (emit_debug_code()) {
       // Assert that result actually contains top on entry. t9 is used
       // immediately below so this use of t9 does not cause difference with
       // respect to register content between debug and release mode.
-      lw(t9, MemOperand(topaddr));
+      ld(t9, MemOperand(topaddr));
       Check(eq, kUnexpectedAllocationTop, result, Operand(t9));
     }
     // Load allocation limit into t9. Result already contains allocation top.
-    lw(t9, MemOperand(topaddr, limit - top));
+    ld(t9, MemOperand(topaddr, limit - top));
   }
 
-  if ((flags & DOUBLE_ALIGNMENT) != 0) {
-    // Align the next allocation. Storing the filler map without checking top is
-    // safe in new-space because the limit of the heap is aligned there.
-    ASSERT((flags & PRETENURE_OLD_POINTER_SPACE) == 0);
-    ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
-    And(scratch2, result, Operand(kDoubleAlignmentMask));
-    Label aligned;
-    Branch(&aligned, eq, scratch2, Operand(zero_reg));
-    if ((flags & PRETENURE_OLD_DATA_SPACE) != 0) {
-      Branch(gc_required, Ugreater_equal, result, Operand(t9));
-    }
-    li(scratch2, Operand(isolate()->factory()->one_pointer_filler_map()));
-    sw(scratch2, MemOperand(result));
-    Addu(result, result, Operand(kDoubleSize / 2));
-    bind(&aligned);
+  ASSERT(kPointerSize == kDoubleSize);
+  if (emit_debug_code()) {
+    And(at, result, Operand(kDoubleAlignmentMask));
+    Check(eq, kAllocationIsNotDoubleAligned, at, Operand(zero_reg));
   }
 
   // Calculate new top and bail out if new space is exhausted. Use result
   // to calculate the new top.
-  Addu(scratch2, result, Operand(object_size));
+  Daddu(scratch2, result, Operand(object_size));
   Branch(gc_required, Ugreater, scratch2, Operand(t9));
-  sw(scratch2, MemOperand(topaddr));
+  sd(scratch2, MemOperand(topaddr));
 
   // Tag object if requested.
   if ((flags & TAG_OBJECT) != 0) {
-    Addu(result, result, Operand(kHeapObjectTag));
+    Daddu(result, result, Operand(kHeapObjectTag));
   }
 }
 
 
 void MacroAssembler::Allocate(Register object_size,
                               Register result,
                               Register scratch1,
                               Register scratch2,
                               Label* gc_required,
                               AllocationFlags flags) {
@@ skipping 27 matching lines @@
       reinterpret_cast<intptr_t>(allocation_limit.address());
   ASSERT((limit - top) == kPointerSize);
 
   // Set up allocation top address and object size registers.
   Register topaddr = scratch1;
   li(topaddr, Operand(allocation_top));
 
   // This code stores a temporary value in t9.
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
     // Load allocation top into result and allocation limit into t9.
-    lw(result, MemOperand(topaddr));
-    lw(t9, MemOperand(topaddr, kPointerSize));
+    ld(result, MemOperand(topaddr));
+    ld(t9, MemOperand(topaddr, kPointerSize));
   } else {
     if (emit_debug_code()) {
       // Assert that result actually contains top on entry. t9 is used
       // immediately below so this use of t9 does not cause difference with
       // respect to register content between debug and release mode.
-      lw(t9, MemOperand(topaddr));
+      ld(t9, MemOperand(topaddr));
       Check(eq, kUnexpectedAllocationTop, result, Operand(t9));
     }
     // Load allocation limit into t9. Result already contains allocation top.
-    lw(t9, MemOperand(topaddr, limit - top));
+    ld(t9, MemOperand(topaddr, limit - top));
   }
 
-  if ((flags & DOUBLE_ALIGNMENT) != 0) {
-    // Align the next allocation. Storing the filler map without checking top is
-    // safe in new-space because the limit of the heap is aligned there.
-    ASSERT((flags & PRETENURE_OLD_POINTER_SPACE) == 0);
-    ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
-    And(scratch2, result, Operand(kDoubleAlignmentMask));
-    Label aligned;
-    Branch(&aligned, eq, scratch2, Operand(zero_reg));
-    if ((flags & PRETENURE_OLD_DATA_SPACE) != 0) {
-      Branch(gc_required, Ugreater_equal, result, Operand(t9));
-    }
-    li(scratch2, Operand(isolate()->factory()->one_pointer_filler_map()));
-    sw(scratch2, MemOperand(result));
-    Addu(result, result, Operand(kDoubleSize / 2));
-    bind(&aligned);
+  ASSERT(kPointerSize == kDoubleSize);
+  if (emit_debug_code()) {
+    And(at, result, Operand(kDoubleAlignmentMask));
+    Check(eq, kAllocationIsNotDoubleAligned, at, Operand(zero_reg));
   }
 
   // Calculate new top and bail out if new space is exhausted. Use result
   // to calculate the new top. Object size may be in words so a shift is
   // required to get the number of bytes.
   if ((flags & SIZE_IN_WORDS) != 0) {
-    sll(scratch2, object_size, kPointerSizeLog2);
-    Addu(scratch2, result, scratch2);
+    dsll(scratch2, object_size, kPointerSizeLog2);
+    Daddu(scratch2, result, scratch2);
   } else {
-    Addu(scratch2, result, Operand(object_size));
+    Daddu(scratch2, result, Operand(object_size));
   }
   Branch(gc_required, Ugreater, scratch2, Operand(t9));
 
   // Update allocation top. result temporarily holds the new top.
   if (emit_debug_code()) {
     And(t9, scratch2, Operand(kObjectAlignmentMask));
     Check(eq, kUnalignedAllocationInNewSpace, t9, Operand(zero_reg));
   }
-  sw(scratch2, MemOperand(topaddr));
+  sd(scratch2, MemOperand(topaddr));
 
   // Tag object if requested.
   if ((flags & TAG_OBJECT) != 0) {
-    Addu(result, result, Operand(kHeapObjectTag));
+    Daddu(result, result, Operand(kHeapObjectTag));
   }
 }
 
 
 void MacroAssembler::UndoAllocationInNewSpace(Register object,
                                               Register scratch) {
   ExternalReference new_space_allocation_top =
       ExternalReference::new_space_allocation_top_address(isolate());
 
   // Make sure the object has no tag before resetting top.
   And(object, object, Operand(~kHeapObjectTagMask));
 #ifdef DEBUG
   // Check that the object un-allocated is below the current top.
   li(scratch, Operand(new_space_allocation_top));
-  lw(scratch, MemOperand(scratch));
+  ld(scratch, MemOperand(scratch));
   Check(less, kUndoAllocationOfNonAllocatedMemory,
       object, Operand(scratch));
 #endif
   // Write the address of the object to un-allocate as the current top.
   li(scratch, Operand(new_space_allocation_top));
-  sw(object, MemOperand(scratch));
+  sd(object, MemOperand(scratch));
 }
 
 
 void MacroAssembler::AllocateTwoByteString(Register result,
                                            Register length,
                                            Register scratch1,
                                            Register scratch2,
                                            Register scratch3,
                                            Label* gc_required) {
   // Calculate the number of bytes needed for the characters in the string while
   // observing object alignment.
   ASSERT((SeqTwoByteString::kHeaderSize & kObjectAlignmentMask) == 0);
-  sll(scratch1, length, 1);  // Length in bytes, not chars.
-  addiu(scratch1, scratch1,
+  dsll(scratch1, length, 1);  // Length in bytes, not chars.
+  daddiu(scratch1, scratch1,
        kObjectAlignmentMask + SeqTwoByteString::kHeaderSize);
   And(scratch1, scratch1, Operand(~kObjectAlignmentMask));
 
   // Allocate two-byte string in new space.
   Allocate(scratch1,
            result,
            scratch2,
            scratch3,
            gc_required,
            TAG_OBJECT);
@@ skipping 10 matching lines @@
 void MacroAssembler::AllocateAsciiString(Register result,
                                          Register length,
                                          Register scratch1,
                                          Register scratch2,
                                          Register scratch3,
                                          Label* gc_required) {
   // Calculate the number of bytes needed for the characters in the string
   // while observing object alignment.
   ASSERT((SeqOneByteString::kHeaderSize & kObjectAlignmentMask) == 0);
   ASSERT(kCharSize == 1);
-  addiu(scratch1, length, kObjectAlignmentMask + SeqOneByteString::kHeaderSize);
+  daddiu(scratch1, length,
+      kObjectAlignmentMask + SeqOneByteString::kHeaderSize);
   And(scratch1, scratch1, Operand(~kObjectAlignmentMask));
 
   // Allocate ASCII string in new space.
   Allocate(scratch1,
            result,
            scratch2,
            scratch3,
            gc_required,
            TAG_OBJECT);
 
@@ skipping 85 matching lines @@
 }
 
 
 // Allocates a heap number or jumps to the label if the young space is full and
 // a scavenge is needed.
 void MacroAssembler::AllocateHeapNumber(Register result,
                                         Register scratch1,
                                         Register scratch2,
                                         Register heap_number_map,
                                         Label* need_gc,
-                                        TaggingMode tagging_mode,
-                                        MutableMode mode) {
+                                        TaggingMode tagging_mode) {
   // Allocate an object in the heap for the heap number and tag it as a heap
   // object.
   Allocate(HeapNumber::kSize, result, scratch1, scratch2, need_gc,
            tagging_mode == TAG_RESULT ? TAG_OBJECT : NO_ALLOCATION_FLAGS);
 
-  Heap::RootListIndex map_index = mode == MUTABLE
-      ? Heap::kMutableHeapNumberMapRootIndex
-      : Heap::kHeapNumberMapRootIndex;
-  AssertIsRoot(heap_number_map, map_index);
-
   // Store heap number map in the allocated object.
+  AssertIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
   if (tagging_mode == TAG_RESULT) {
-    sw(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
+    sd(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
   } else {
-    sw(heap_number_map, MemOperand(result, HeapObject::kMapOffset));
+    sd(heap_number_map, MemOperand(result, HeapObject::kMapOffset));
   }
 }
 
 
 void MacroAssembler::AllocateHeapNumberWithValue(Register result,
                                                  FPURegister value,
                                                  Register scratch1,
                                                  Register scratch2,
                                                  Label* gc_required) {
   LoadRoot(t8, Heap::kHeapNumberMapRootIndex);
@@ skipping 15 matching lines @@
   // Find a temp register in temps list.
   for (int i = 0; i < kNumRegisters; i++) {
     if ((temps & (1 << i)) != 0) {
       tmp.code_ = i;
       break;
     }
   }
   ASSERT(!tmp.is(no_reg));
 
   for (int i = 0; i < field_count; i++) {
-    lw(tmp, FieldMemOperand(src, i * kPointerSize));
-    sw(tmp, FieldMemOperand(dst, i * kPointerSize));
+    ld(tmp, FieldMemOperand(src, i * kPointerSize));
+    sd(tmp, FieldMemOperand(dst, i * kPointerSize));
   }
 }
 
 
 void MacroAssembler::CopyBytes(Register src,
                                Register dst,
                                Register length,
                                Register scratch) {
   Label align_loop_1, word_loop, byte_loop, byte_loop_1, done;
 
   // Align src before copying in word size chunks.
   Branch(&byte_loop, le, length, Operand(kPointerSize));
   bind(&align_loop_1);
   And(scratch, src, kPointerSize - 1);
   Branch(&word_loop, eq, scratch, Operand(zero_reg));
   lbu(scratch, MemOperand(src));
-  Addu(src, src, 1);
+  Daddu(src, src, 1);
   sb(scratch, MemOperand(dst));
-  Addu(dst, dst, 1);
-  Subu(length, length, Operand(1));
+  Daddu(dst, dst, 1);
+  Dsubu(length, length, Operand(1));
   Branch(&align_loop_1, ne, length, Operand(zero_reg));
 
   // Copy bytes in word size chunks.
   bind(&word_loop);
   if (emit_debug_code()) {
     And(scratch, src, kPointerSize - 1);
     Assert(eq, kExpectingAlignmentForCopyBytes,
         scratch, Operand(zero_reg));
   }
   Branch(&byte_loop, lt, length, Operand(kPointerSize));
-  lw(scratch, MemOperand(src));
-  Addu(src, src, kPointerSize);
+  ld(scratch, MemOperand(src));
+  Daddu(src, src, kPointerSize);
 
   // TODO(kalmard) check if this can be optimized to use sw in most cases.
   // Can't use unaligned access - copy byte by byte.
-  if (kArchEndian == kLittle) {
-    sb(scratch, MemOperand(dst, 0));
-    srl(scratch, scratch, 8);
-    sb(scratch, MemOperand(dst, 1));
-    srl(scratch, scratch, 8);
-    sb(scratch, MemOperand(dst, 2));
-    srl(scratch, scratch, 8);
-    sb(scratch, MemOperand(dst, 3));
-  } else {
-    sb(scratch, MemOperand(dst, 3));
-    srl(scratch, scratch, 8);
-    sb(scratch, MemOperand(dst, 2));
-    srl(scratch, scratch, 8);
-    sb(scratch, MemOperand(dst, 1));
-    srl(scratch, scratch, 8);
-    sb(scratch, MemOperand(dst, 0));
-  }
+  sb(scratch, MemOperand(dst, 0));
+  dsrl(scratch, scratch, 8);
+  sb(scratch, MemOperand(dst, 1));
+  dsrl(scratch, scratch, 8);
+  sb(scratch, MemOperand(dst, 2));
+  dsrl(scratch, scratch, 8);
+  sb(scratch, MemOperand(dst, 3));
+  dsrl(scratch, scratch, 8);
+  sb(scratch, MemOperand(dst, 4));
+  dsrl(scratch, scratch, 8);
+  sb(scratch, MemOperand(dst, 5));
+  dsrl(scratch, scratch, 8);
+  sb(scratch, MemOperand(dst, 6));
+  dsrl(scratch, scratch, 8);
+  sb(scratch, MemOperand(dst, 7));
+  Daddu(dst, dst, 8);
 
-  Addu(dst, dst, 4);
-
-  Subu(length, length, Operand(kPointerSize));
+  Dsubu(length, length, Operand(kPointerSize));
   Branch(&word_loop);
 
   // Copy the last bytes if any left.
   bind(&byte_loop);
   Branch(&done, eq, length, Operand(zero_reg));
   bind(&byte_loop_1);
   lbu(scratch, MemOperand(src));
-  Addu(src, src, 1);
+  Daddu(src, src, 1);
   sb(scratch, MemOperand(dst));
-  Addu(dst, dst, 1);
-  Subu(length, length, Operand(1));
+  Daddu(dst, dst, 1);
+  Dsubu(length, length, Operand(1));
   Branch(&byte_loop_1, ne, length, Operand(zero_reg));
   bind(&done);
 }
 
 
 void MacroAssembler::InitializeFieldsWithFiller(Register start_offset,
                                                 Register end_offset,
                                                 Register filler) {
   Label loop, entry;
   Branch(&entry);
   bind(&loop);
-  sw(filler, MemOperand(start_offset));
-  Addu(start_offset, start_offset, kPointerSize);
+  sd(filler, MemOperand(start_offset));
+  Daddu(start_offset, start_offset, kPointerSize);
   bind(&entry);
   Branch(&loop, lt, start_offset, Operand(end_offset));
 }
 
 
 void MacroAssembler::CheckFastElements(Register map,
                                        Register scratch,
                                        Label* fail) {
   STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
   STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
@@ skipping 52 matching lines @@
            Heap::kHeapNumberMapRootIndex,
            fail,
            DONT_DO_SMI_CHECK);
 
   // Check for nan: all NaN values have a value greater (signed) than 0x7ff00000
   // in the exponent.
   li(scratch1, Operand(kNaNOrInfinityLowerBoundUpper32));
   lw(exponent_reg, FieldMemOperand(value_reg, HeapNumber::kExponentOffset));
   Branch(&maybe_nan, ge, exponent_reg, Operand(scratch1));
 
-  lw(mantissa_reg, FieldMemOperand(value_reg, HeapNumber::kMantissaOffset));
+  lwu(mantissa_reg, FieldMemOperand(value_reg, HeapNumber::kMantissaOffset));
 
   bind(&have_double_value);
-  sll(scratch1, key_reg, kDoubleSizeLog2 - kSmiTagSize);
-  Addu(scratch1, scratch1, elements_reg);
-  sw(mantissa_reg,
-      FieldMemOperand(scratch1, FixedDoubleArray::kHeaderSize - elements_offset
-          + kHoleNanLower32Offset));
-  sw(exponent_reg,
-      FieldMemOperand(scratch1, FixedDoubleArray::kHeaderSize - elements_offset
-          + kHoleNanUpper32Offset));
+  // dsll(scratch1, key_reg, kDoubleSizeLog2 - kSmiTagSize);
+  dsra(scratch1, key_reg, 32 - kDoubleSizeLog2);
+  Daddu(scratch1, scratch1, elements_reg);
+  sw(mantissa_reg, FieldMemOperand(
+     scratch1, FixedDoubleArray::kHeaderSize - elements_offset));
+  uint32_t offset = FixedDoubleArray::kHeaderSize - elements_offset +
+      sizeof(kHoleNanLower32);
+  sw(exponent_reg, FieldMemOperand(scratch1, offset));
   jmp(&done);
 
   bind(&maybe_nan);
-  // Could be NaN or Infinity. If fraction is not zero, it's NaN, otherwise
-  // it's an Infinity, and the non-NaN code path applies.
-  Branch(&is_nan, gt, exponent_reg, Operand(scratch1));
+  // Could be NaN, Infinity or -Infinity. If fraction is not zero, it's NaN,
+  // otherwise it's Infinity or -Infinity, and the non-NaN code path applies.
   lw(mantissa_reg, FieldMemOperand(value_reg, HeapNumber::kMantissaOffset));
   Branch(&have_double_value, eq, mantissa_reg, Operand(zero_reg));
   bind(&is_nan);
   // Load canonical NaN for storing into the double array.
   LoadRoot(at, Heap::kNanValueRootIndex);
   lw(mantissa_reg, FieldMemOperand(at, HeapNumber::kMantissaOffset));
   lw(exponent_reg, FieldMemOperand(at, HeapNumber::kExponentOffset));
   jmp(&have_double_value);
 
   bind(&smi_value);
-  Addu(scratch1, elements_reg,
+  Daddu(scratch1, elements_reg,
       Operand(FixedDoubleArray::kHeaderSize - kHeapObjectTag -
               elements_offset));
-  sll(scratch2, key_reg, kDoubleSizeLog2 - kSmiTagSize);
-  Addu(scratch1, scratch1, scratch2);
+  // dsll(scratch2, key_reg, kDoubleSizeLog2 - kSmiTagSize);
+  dsra(scratch2, key_reg, 32 - kDoubleSizeLog2);
+  Daddu(scratch1, scratch1, scratch2);
   // scratch1 is now effective address of the double element
 
   Register untagged_value = elements_reg;
   SmiUntag(untagged_value, value_reg);
   mtc1(untagged_value, f2);
   cvt_d_w(f0, f2);
   sdc1(f0, MemOperand(scratch1, 0));
   bind(&done);
 }
 
 
 void MacroAssembler::CompareMapAndBranch(Register obj,
                                          Register scratch,
                                          Handle<Map> map,
                                          Label* early_success,
                                          Condition cond,
                                          Label* branch_to) {
-  lw(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
+  ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   CompareMapAndBranch(scratch, map, early_success, cond, branch_to);
 }
 
 
 void MacroAssembler::CompareMapAndBranch(Register obj_map,
                                          Handle<Map> map,
                                          Label* early_success,
                                          Condition cond,
                                          Label* branch_to) {
   Branch(branch_to, cond, obj_map, Operand(map));
@@ skipping 16 matching lines @@
 
 void MacroAssembler::DispatchMap(Register obj,
                                  Register scratch,
                                  Handle<Map> map,
                                  Handle<Code> success,
                                  SmiCheckType smi_check_type) {
   Label fail;
   if (smi_check_type == DO_SMI_CHECK) {
     JumpIfSmi(obj, &fail);
   }
-  lw(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
+  ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   Jump(success, RelocInfo::CODE_TARGET, eq, scratch, Operand(map));
   bind(&fail);
 }
 
 
 void MacroAssembler::CheckMap(Register obj,
                               Register scratch,
                               Heap::RootListIndex index,
                               Label* fail,
                               SmiCheckType smi_check_type) {
   if (smi_check_type == DO_SMI_CHECK) {
     JumpIfSmi(obj, fail);
   }
-  lw(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
+  ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   LoadRoot(at, index);
   Branch(fail, ne, scratch, Operand(at));
 }
 
 
-void MacroAssembler::MovFromFloatResult(DoubleRegister dst) {
+void MacroAssembler::MovFromFloatResult(const DoubleRegister dst) {
   if (IsMipsSoftFloatABI) {
-    if (kArchEndian == kLittle) {
-      Move(dst, v0, v1);
-    } else {
-      Move(dst, v1, v0);
-    }
+    Move(dst, v0, v1);
   } else {
     Move(dst, f0);  // Reg f0 is o32 ABI FP return value.
   }
 }
 
 
-void MacroAssembler::MovFromFloatParameter(DoubleRegister dst) {
+void MacroAssembler::MovFromFloatParameter(const DoubleRegister dst) {
   if (IsMipsSoftFloatABI) {
-    if (kArchEndian == kLittle) {
-      Move(dst, a0, a1);
-    } else {
-      Move(dst, a1, a0);
-    }
+    Move(dst, a0, a1);
   } else {
     Move(dst, f12);  // Reg f12 is o32 ABI FP first argument value.
   }
 }
 
 
 void MacroAssembler::MovToFloatParameter(DoubleRegister src) {
   if (!IsMipsSoftFloatABI) {
     Move(f12, src);
   } else {
-    if (kArchEndian == kLittle) {
-      Move(a0, a1, src);
-    } else {
-      Move(a1, a0, src);
-    }
+    Move(a0, a1, src);
   }
 }
 
 
 void MacroAssembler::MovToFloatResult(DoubleRegister src) {
   if (!IsMipsSoftFloatABI) {
     Move(f0, src);
   } else {
-    if (kArchEndian == kLittle) {
-      Move(v0, v1, src);
-    } else {
-      Move(v1, v0, src);
-    }
+    Move(v0, v1, src);
   }
 }
 
 
 void MacroAssembler::MovToFloatParameters(DoubleRegister src1,
                                           DoubleRegister src2) {
   if (!IsMipsSoftFloatABI) {
+    const DoubleRegister fparg2 = (kMipsAbi == kN64) ? f13 : f14;
     if (src2.is(f12)) {
-      ASSERT(!src1.is(f14));
-      Move(f14, src2);
+      ASSERT(!src1.is(fparg2));
+      Move(fparg2, src2);
       Move(f12, src1);
     } else {
       Move(f12, src1);
-      Move(f14, src2);
+      Move(fparg2, src2);
     }
   } else {
-    if (kArchEndian == kLittle) {
-      Move(a0, a1, src1);
-      Move(a2, a3, src2);
-    } else {
-      Move(a1, a0, src1);
-      Move(a3, a2, src2);
-    }
+    Move(a0, a1, src1);
+    Move(a2, a3, src2);
   }
 }
 
 
 // -----------------------------------------------------------------------------
 // JavaScript invokes.
 
 void MacroAssembler::InvokePrologue(const ParameterCount& expected,
                                     const ParameterCount& actual,
                                     Handle<Code> code_constant,
@@ skipping 40 matching lines @@
   } else if (actual.is_immediate()) {
     Branch(&regular_invoke, eq, expected.reg(), Operand(actual.immediate()));
     li(a0, Operand(actual.immediate()));
   } else {
     Branch(&regular_invoke, eq, expected.reg(), Operand(actual.reg()));
   }
 
   if (!definitely_matches) {
     if (!code_constant.is_null()) {
       li(a3, Operand(code_constant));
-      addiu(a3, a3, Code::kHeaderSize - kHeapObjectTag);
+      daddiu(a3, a3, Code::kHeaderSize - kHeapObjectTag);
     }
 
     Handle<Code> adaptor =
         isolate()->builtins()->ArgumentsAdaptorTrampoline();
     if (flag == CALL_FUNCTION) {
       call_wrapper.BeforeCall(CallSize(adaptor));
       Call(adaptor);
       call_wrapper.AfterCall();
       if (!*definitely_mismatches) {
         Branch(done);
@@ skipping 40 matching lines @@
                                     const ParameterCount& actual,
                                     InvokeFlag flag,
                                     const CallWrapper& call_wrapper) {
   // You can't call a function without a valid frame.
   ASSERT(flag == JUMP_FUNCTION || has_frame());
 
   // Contract with called JS functions requires that function is passed in a1.
   ASSERT(function.is(a1));
   Register expected_reg = a2;
   Register code_reg = a3;
-
-  lw(code_reg, FieldMemOperand(a1, JSFunction::kSharedFunctionInfoOffset));
-  lw(cp, FieldMemOperand(a1, JSFunction::kContextOffset));
+  ld(code_reg, FieldMemOperand(a1, JSFunction::kSharedFunctionInfoOffset));
+  ld(cp, FieldMemOperand(a1, JSFunction::kContextOffset));
+  // The argument count is stored as int32_t on 64-bit platforms.
+  // TODO(plind): Smi on 32-bit platforms.
   lw(expected_reg,
       FieldMemOperand(code_reg,
                       SharedFunctionInfo::kFormalParameterCountOffset));
-  sra(expected_reg, expected_reg, kSmiTagSize);
-  lw(code_reg, FieldMemOperand(a1, JSFunction::kCodeEntryOffset));
-
+  ld(code_reg, FieldMemOperand(a1, JSFunction::kCodeEntryOffset));
   ParameterCount expected(expected_reg);
   InvokeCode(code_reg, expected, actual, flag, call_wrapper);
 }
 
 
 void MacroAssembler::InvokeFunction(Register function,
                                     const ParameterCount& expected,
                                     const ParameterCount& actual,
                                     InvokeFlag flag,
                                     const CallWrapper& call_wrapper) {
   // You can't call a function without a valid frame.
   ASSERT(flag == JUMP_FUNCTION || has_frame());
 
   // Contract with called JS functions requires that function is passed in a1.
   ASSERT(function.is(a1));
 
   // Get the function and setup the context.
-  lw(cp, FieldMemOperand(a1, JSFunction::kContextOffset));
+  ld(cp, FieldMemOperand(a1, JSFunction::kContextOffset));
 
   // We call indirectly through the code field in the function to
   // allow recompilation to take effect without changing any of the
   // call sites.
-  lw(a3, FieldMemOperand(a1, JSFunction::kCodeEntryOffset));
+  ld(a3, FieldMemOperand(a1, JSFunction::kCodeEntryOffset));
   InvokeCode(a3, expected, actual, flag, call_wrapper);
 }
 
 
 void MacroAssembler::InvokeFunction(Handle<JSFunction> function,
                                     const ParameterCount& expected,
                                     const ParameterCount& actual,
                                     InvokeFlag flag,
                                     const CallWrapper& call_wrapper) {
   li(a1, function);
   InvokeFunction(a1, expected, actual, flag, call_wrapper);
 }
 
 
 void MacroAssembler::IsObjectJSObjectType(Register heap_object,
                                           Register map,
                                           Register scratch,
                                           Label* fail) {
-  lw(map, FieldMemOperand(heap_object, HeapObject::kMapOffset));
+  ld(map, FieldMemOperand(heap_object, HeapObject::kMapOffset));
   IsInstanceJSObjectType(map, scratch, fail);
 }
 
 
 void MacroAssembler::IsInstanceJSObjectType(Register map,
                                             Register scratch,
                                             Label* fail) {
   lbu(scratch, FieldMemOperand(map, Map::kInstanceTypeOffset));
   Branch(fail, lt, scratch, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
   Branch(fail, gt, scratch, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE));
 }
 
 
 void MacroAssembler::IsObjectJSStringType(Register object,
                                           Register scratch,
                                           Label* fail) {
   ASSERT(kNotStringTag != 0);
 
-  lw(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
+  ld(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
   lbu(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
   And(scratch, scratch, Operand(kIsNotStringMask));
   Branch(fail, ne, scratch, Operand(zero_reg));
 }
 
 
 void MacroAssembler::IsObjectNameType(Register object,
                                       Register scratch,
                                       Label* fail) {
-  lw(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
+  ld(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
   lbu(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
   Branch(fail, hi, scratch, Operand(LAST_NAME_TYPE));
 }
 
 
 // ---------------------------------------------------------------------------
 // Support functions.
 
 
 void MacroAssembler::TryGetFunctionPrototype(Register function,
                                              Register result,
                                              Register scratch,
                                              Label* miss,
                                              bool miss_on_bound_function) {
   // Check that the receiver isn't a smi.
   JumpIfSmi(function, miss);
 
   // Check that the function really is a function.  Load map into result reg.
   GetObjectType(function, result, scratch);
   Branch(miss, ne, scratch, Operand(JS_FUNCTION_TYPE));
 
   if (miss_on_bound_function) {
-    lw(scratch,
+    ld(scratch,
        FieldMemOperand(function, JSFunction::kSharedFunctionInfoOffset));
-    lw(scratch,
-       FieldMemOperand(scratch, SharedFunctionInfo::kCompilerHintsOffset));
+    // ld(scratch,
+    //   FieldMemOperand(scratch, SharedFunctionInfo::kCompilerHintsOffset));
+    // And(scratch, scratch,
+    //    Operand(Smi::FromInt(1 << SharedFunctionInfo::kBoundFunction)));
+    lwu(scratch,
+        FieldMemOperand(scratch, SharedFunctionInfo::kCompilerHintsOffset));
     And(scratch, scratch,
-        Operand(Smi::FromInt(1 << SharedFunctionInfo::kBoundFunction)));
+        Operand(1 << SharedFunctionInfo::kBoundFunction));
     Branch(miss, ne, scratch, Operand(zero_reg));
   }
 
   // Make sure that the function has an instance prototype.
   Label non_instance;
   lbu(scratch, FieldMemOperand(result, Map::kBitFieldOffset));
   And(scratch, scratch, Operand(1 << Map::kHasNonInstancePrototype));
   Branch(&non_instance, ne, scratch, Operand(zero_reg));
 
   // Get the prototype or initial map from the function.
-  lw(result,
+  ld(result,
      FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
 
   // If the prototype or initial map is the hole, don't return it and
   // simply miss the cache instead. This will allow us to allocate a
   // prototype object on-demand in the runtime system.
   LoadRoot(t8, Heap::kTheHoleValueRootIndex);
   Branch(miss, eq, result, Operand(t8));
 
   // If the function does not have an initial map, we're done.
   Label done;
   GetObjectType(result, scratch, scratch);
   Branch(&done, ne, scratch, Operand(MAP_TYPE));
 
   // Get the prototype from the initial map.
-  lw(result, FieldMemOperand(result, Map::kPrototypeOffset));
+  ld(result, FieldMemOperand(result, Map::kPrototypeOffset));
   jmp(&done);
 
   // Non-instance prototype: Fetch prototype from constructor field
   // in initial map.
   bind(&non_instance);
-  lw(result, FieldMemOperand(result, Map::kConstructorOffset));
+  ld(result, FieldMemOperand(result, Map::kConstructorOffset));
 
   // All done.
   bind(&done);
 }
 
 
 void MacroAssembler::GetObjectType(Register object,
                                    Register map,
                                    Register type_reg) {
-  lw(map, FieldMemOperand(object, HeapObject::kMapOffset));
+  ld(map, FieldMemOperand(object, HeapObject::kMapOffset));
   lbu(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
 }
 
 
 // -----------------------------------------------------------------------------
 // Runtime calls.
 
 void MacroAssembler::CallStub(CodeStub* stub,
                               TypeFeedbackId ast_id,
                               Condition cond,
                               Register r1,
                               const Operand& r2,
                               BranchDelaySlot bd) {
   ASSERT(AllowThisStubCall(stub));  // Stub calls are not allowed in some stubs.
   Call(stub->GetCode(), RelocInfo::CODE_TARGET, ast_id,
        cond, r1, r2, bd);
 }
 
 
 void MacroAssembler::TailCallStub(CodeStub* stub,
                                   Condition cond,
                                   Register r1,
                                   const Operand& r2,
                                   BranchDelaySlot bd) {
   Jump(stub->GetCode(), RelocInfo::CODE_TARGET, cond, r1, r2, bd);
 }
 
 
 static int AddressOffset(ExternalReference ref0, ExternalReference ref1) {
-  return ref0.address() - ref1.address();
+  int64_t offset = (ref0.address() - ref1.address());
+  ASSERT(static_cast<int>(offset) == offset);
+  return static_cast<int>(offset);
 }
 
 
 void MacroAssembler::CallApiFunctionAndReturn(
     Register function_address,
     ExternalReference thunk_ref,
     int stack_space,
     MemOperand return_value_operand,
     MemOperand* context_restore_operand) {
   ExternalReference next_address =
@@ skipping 17 matching lines @@
   // Additional parameter is the address of the actual callback.
   li(t9, Operand(thunk_ref));
   jmp(&end_profiler_check);
 
   bind(&profiler_disabled);
   mov(t9, function_address);
   bind(&end_profiler_check);
 
   // Allocate HandleScope in callee-save registers.
   li(s3, Operand(next_address));
-  lw(s0, MemOperand(s3, kNextOffset));
-  lw(s1, MemOperand(s3, kLimitOffset));
-  lw(s2, MemOperand(s3, kLevelOffset));
-  Addu(s2, s2, Operand(1));
-  sw(s2, MemOperand(s3, kLevelOffset));
+  ld(s0, MemOperand(s3, kNextOffset));
+  ld(s1, MemOperand(s3, kLimitOffset));
+  ld(s2, MemOperand(s3, kLevelOffset));
+  Daddu(s2, s2, Operand(1));
+  sd(s2, MemOperand(s3, kLevelOffset));
 
   if (FLAG_log_timer_events) {
     FrameScope frame(this, StackFrame::MANUAL);
     PushSafepointRegisters();
     PrepareCallCFunction(1, a0);
     li(a0, Operand(ExternalReference::isolate_address(isolate())));
     CallCFunction(ExternalReference::log_enter_external_function(isolate()), 1);
     PopSafepointRegisters();
   }
 
@@ skipping 12 matching lines @@
     PopSafepointRegisters();
   }
 
   Label promote_scheduled_exception;
   Label exception_handled;
   Label delete_allocated_handles;
   Label leave_exit_frame;
   Label return_value_loaded;
 
   // Load value from ReturnValue.
-  lw(v0, return_value_operand);
+  ld(v0, return_value_operand);
   bind(&return_value_loaded);
 
   // No more valid handles (the result handle was the last one). Restore
   // previous handle scope.
-  sw(s0, MemOperand(s3, kNextOffset));
+  sd(s0, MemOperand(s3, kNextOffset));
   if (emit_debug_code()) {
-    lw(a1, MemOperand(s3, kLevelOffset));
+    ld(a1, MemOperand(s3, kLevelOffset));
     Check(eq, kUnexpectedLevelAfterReturnFromApiCall, a1, Operand(s2));
   }
-  Subu(s2, s2, Operand(1));
-  sw(s2, MemOperand(s3, kLevelOffset));
-  lw(at, MemOperand(s3, kLimitOffset));
+  Dsubu(s2, s2, Operand(1));
+  sd(s2, MemOperand(s3, kLevelOffset));
+  ld(at, MemOperand(s3, kLimitOffset));
   Branch(&delete_allocated_handles, ne, s1, Operand(at));
 
   // Check if the function scheduled an exception.
   bind(&leave_exit_frame);
-  LoadRoot(t0, Heap::kTheHoleValueRootIndex);
+  LoadRoot(a4, Heap::kTheHoleValueRootIndex);
   li(at, Operand(ExternalReference::scheduled_exception_address(isolate())));
-  lw(t1, MemOperand(at));
-  Branch(&promote_scheduled_exception, ne, t0, Operand(t1));
+  ld(a5, MemOperand(at));
+  Branch(&promote_scheduled_exception, ne, a4, Operand(a5));
   bind(&exception_handled);
 
   bool restore_context = context_restore_operand != NULL;
   if (restore_context) {
-    lw(cp, *context_restore_operand);
+    ld(cp, *context_restore_operand);
   }
   li(s0, Operand(stack_space));
   LeaveExitFrame(false, s0, !restore_context, EMIT_RETURN);
 
   bind(&promote_scheduled_exception);
   {
     FrameScope frame(this, StackFrame::INTERNAL);
     CallExternalReference(
         ExternalReference(Runtime::kPromoteScheduledException, isolate()),
         0);
   }
   jmp(&exception_handled);
 
   // HandleScope limit has changed. Delete allocated extensions.
   bind(&delete_allocated_handles);
-  sw(s1, MemOperand(s3, kLimitOffset));
+  sd(s1, MemOperand(s3, kLimitOffset));
   mov(s0, v0);
   mov(a0, v0);
   PrepareCallCFunction(1, s1);
   li(a0, Operand(ExternalReference::isolate_address(isolate())));
   CallCFunction(ExternalReference::delete_handle_scope_extensions(isolate()),
       1);
   mov(v0, s0);
   jmp(&leave_exit_frame);
 }
 
@@ skipping 19 matching lines @@
                                                Register scratch1,
                                                Register scratch2,
                                                Register heap_number_map,
                                                Label* not_number,
                                                ObjectToDoubleFlags flags) {
   Label done;
   if ((flags & OBJECT_NOT_SMI) == 0) {
     Label not_smi;
     JumpIfNotSmi(object, &not_smi);
     // Remove smi tag and convert to double.
-    sra(scratch1, object, kSmiTagSize);
+    // dsra(scratch1, object, kSmiTagSize);
+    dsra32(scratch1, object, 0);
     mtc1(scratch1, result);
     cvt_d_w(result, result);
     Branch(&done);
     bind(&not_smi);
   }
   // Check for heap number and load double value from it.
-  lw(scratch1, FieldMemOperand(object, HeapObject::kMapOffset));
+  ld(scratch1, FieldMemOperand(object, HeapObject::kMapOffset));
   Branch(not_number, ne, scratch1, Operand(heap_number_map));
 
   if ((flags & AVOID_NANS_AND_INFINITIES) != 0) {
     // If exponent is all ones the number is either a NaN or +/-Infinity.
     Register exponent = scratch1;
     Register mask_reg = scratch2;
-    lw(exponent, FieldMemOperand(object, HeapNumber::kExponentOffset));
+    lwu(exponent, FieldMemOperand(object, HeapNumber::kExponentOffset));
     li(mask_reg, HeapNumber::kExponentMask);
 
     And(exponent, exponent, mask_reg);
     Branch(not_number, eq, exponent, Operand(mask_reg));
   }
   ldc1(result, FieldMemOperand(object, HeapNumber::kValueOffset));
   bind(&done);
 }
 
 
 void MacroAssembler::SmiToDoubleFPURegister(Register smi,
                                             FPURegister value,
                                             Register scratch1) {
-  sra(scratch1, smi, kSmiTagSize);
+  // dsra(scratch1, smi, kSmiTagSize);
+  dsra32(scratch1, smi, 0);
   mtc1(scratch1, value);
   cvt_d_w(value, value);
 }
 
 
 void MacroAssembler::AdduAndCheckForOverflow(Register dst,
                                              Register left,
                                              Register right,
                                              Register overflow_dst,
                                              Register scratch) {
   ASSERT(!dst.is(overflow_dst));
   ASSERT(!dst.is(scratch));
   ASSERT(!overflow_dst.is(scratch));
   ASSERT(!overflow_dst.is(left));
   ASSERT(!overflow_dst.is(right));
 
   if (left.is(right) && dst.is(left)) {
     ASSERT(!dst.is(t9));
     ASSERT(!scratch.is(t9));
     ASSERT(!left.is(t9));
     ASSERT(!right.is(t9));
     ASSERT(!overflow_dst.is(t9));
     mov(t9, right);
     right = t9;
   }
 
   if (dst.is(left)) {
     mov(scratch, left);  // Preserve left.
-    addu(dst, left, right);  // Left is overwritten.
+    daddu(dst, left, right);  // Left is overwritten.
     xor_(scratch, dst, scratch);  // Original left.
     xor_(overflow_dst, dst, right);
     and_(overflow_dst, overflow_dst, scratch);
   } else if (dst.is(right)) {
     mov(scratch, right);  // Preserve right.
-    addu(dst, left, right);  // Right is overwritten.
+    daddu(dst, left, right);  // Right is overwritten.
     xor_(scratch, dst, scratch);  // Original right.
     xor_(overflow_dst, dst, left);
     and_(overflow_dst, overflow_dst, scratch);
   } else {
-    addu(dst, left, right);
+    daddu(dst, left, right);
     xor_(overflow_dst, dst, left);
     xor_(scratch, dst, right);
     and_(overflow_dst, scratch, overflow_dst);
   }
 }
 
 
 void MacroAssembler::SubuAndCheckForOverflow(Register dst,
                                              Register left,
                                              Register right,
@@ skipping 10 matching lines @@
   // This happens with some crankshaft code. Since Subu works fine if
   // left == right, let's not make that restriction here.
   if (left.is(right)) {
     mov(dst, zero_reg);
     mov(overflow_dst, zero_reg);
     return;
   }
 
   if (dst.is(left)) {
     mov(scratch, left);  // Preserve left.
-    subu(dst, left, right);  // Left is overwritten.
+    dsubu(dst, left, right);  // Left is overwritten.
     xor_(overflow_dst, dst, scratch);  // scratch is original left.
     xor_(scratch, scratch, right);  // scratch is original left.
     and_(overflow_dst, scratch, overflow_dst);
   } else if (dst.is(right)) {
     mov(scratch, right);  // Preserve right.
-    subu(dst, left, right);  // Right is overwritten.
+    dsubu(dst, left, right);  // Right is overwritten.
     xor_(overflow_dst, dst, left);
     xor_(scratch, left, scratch);  // Original right.
     and_(overflow_dst, scratch, overflow_dst);
   } else {
-    subu(dst, left, right);
+    dsubu(dst, left, right);
     xor_(overflow_dst, dst, left);
     xor_(scratch, left, right);
     and_(overflow_dst, scratch, overflow_dst);
   }
 }
 
 
 void MacroAssembler::CallRuntime(const Runtime::Function* f,
                                  int num_arguments,
                                  SaveFPRegsMode save_doubles) {
@@ skipping 74 matching lines @@
   } else {
     ASSERT(flag == JUMP_FUNCTION);
     Jump(t9);
   }
 }
 
 
 void MacroAssembler::GetBuiltinFunction(Register target,
                                         Builtins::JavaScript id) {
   // Load the builtins object into target register.
-  lw(target, MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
-  lw(target, FieldMemOperand(target, GlobalObject::kBuiltinsOffset));
+  ld(target, MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
+  ld(target, FieldMemOperand(target, GlobalObject::kBuiltinsOffset));
   // Load the JavaScript builtin function from the builtins object.
-  lw(target, FieldMemOperand(target,
+  ld(target, FieldMemOperand(target,
                           JSBuiltinsObject::OffsetOfFunctionWithId(id)));
 }
 
 
 void MacroAssembler::GetBuiltinEntry(Register target, Builtins::JavaScript id) {
   ASSERT(!target.is(a1));
   GetBuiltinFunction(a1, id);
   // Load the code entry point from the builtins object.
-  lw(target, FieldMemOperand(a1, JSFunction::kCodeEntryOffset));
+  ld(target, FieldMemOperand(a1, JSFunction::kCodeEntryOffset));
 }
 
 
 void MacroAssembler::SetCounter(StatsCounter* counter, int value,
                                 Register scratch1, Register scratch2) {
   if (FLAG_native_code_counters && counter->Enabled()) {
     li(scratch1, Operand(value));
     li(scratch2, Operand(ExternalReference(counter)));
-    sw(scratch1, MemOperand(scratch2));
+    sd(scratch1, MemOperand(scratch2));
   }
 }
 
 
 void MacroAssembler::IncrementCounter(StatsCounter* counter, int value,
                                       Register scratch1, Register scratch2) {
   ASSERT(value > 0);
   if (FLAG_native_code_counters && counter->Enabled()) {
     li(scratch2, Operand(ExternalReference(counter)));
-    lw(scratch1, MemOperand(scratch2));
-    Addu(scratch1, scratch1, Operand(value));
-    sw(scratch1, MemOperand(scratch2));
+    ld(scratch1, MemOperand(scratch2));
+    Daddu(scratch1, scratch1, Operand(value));
+    sd(scratch1, MemOperand(scratch2));
   }
 }
 
 
 void MacroAssembler::DecrementCounter(StatsCounter* counter, int value,
                                       Register scratch1, Register scratch2) {
   ASSERT(value > 0);
   if (FLAG_native_code_counters && counter->Enabled()) {
     li(scratch2, Operand(ExternalReference(counter)));
-    lw(scratch1, MemOperand(scratch2));
-    Subu(scratch1, scratch1, Operand(value));
-    sw(scratch1, MemOperand(scratch2));
+    ld(scratch1, MemOperand(scratch2));
+    Dsubu(scratch1, scratch1, Operand(value));
+    sd(scratch1, MemOperand(scratch2));
   }
 }
 
 
 // -----------------------------------------------------------------------------
 // Debugging.
 
 void MacroAssembler::Assert(Condition cc, BailoutReason reason,
                             Register rs, Operand rt) {
   if (emit_debug_code())
     Check(cc, reason, rs, rt);
 }
 
 
 void MacroAssembler::AssertFastElements(Register elements) {
   if (emit_debug_code()) {
     ASSERT(!elements.is(at));
     Label ok;
     push(elements);
-    lw(elements, FieldMemOperand(elements, HeapObject::kMapOffset));
+    ld(elements, FieldMemOperand(elements, HeapObject::kMapOffset));
     LoadRoot(at, Heap::kFixedArrayMapRootIndex);
     Branch(&ok, eq, elements, Operand(at));
     LoadRoot(at, Heap::kFixedDoubleArrayMapRootIndex);
     Branch(&ok, eq, elements, Operand(at));
     LoadRoot(at, Heap::kFixedCOWArrayMapRootIndex);
     Branch(&ok, eq, elements, Operand(at));
     Abort(kJSObjectWithFastElementsMapHasSlowElements);
     bind(&ok);
     pop(elements);
   }
@@ skipping 50 matching lines @@
     while (abort_instructions++ < kExpectedAbortInstructions) {
       nop();
     }
   }
 }
 
 
 void MacroAssembler::LoadContext(Register dst, int context_chain_length) {
   if (context_chain_length > 0) {
     // Move up the chain of contexts to the context containing the slot.
-    lw(dst, MemOperand(cp, Context::SlotOffset(Context::PREVIOUS_INDEX)));
+    ld(dst, MemOperand(cp, Context::SlotOffset(Context::PREVIOUS_INDEX)));
     for (int i = 1; i < context_chain_length; i++) {
-      lw(dst, MemOperand(dst, Context::SlotOffset(Context::PREVIOUS_INDEX)));
+      ld(dst, MemOperand(dst, Context::SlotOffset(Context::PREVIOUS_INDEX)));
     }
   } else {
     // Slot is in the current function context.  Move it into the
     // destination register in case we store into it (the write barrier
     // cannot be allowed to destroy the context in esi).
     Move(dst, cp);
   }
 }
 
 
 void MacroAssembler::LoadTransitionedArrayMapConditional(
     ElementsKind expected_kind,
     ElementsKind transitioned_kind,
     Register map_in_out,
     Register scratch,
     Label* no_map_match) {
   // Load the global or builtins object from the current context.
-  lw(scratch,
+  ld(scratch,
      MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
-  lw(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
+  ld(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
 
   // Check that the function's map is the same as the expected cached map.
-  lw(scratch,
+  ld(scratch,
      MemOperand(scratch,
                 Context::SlotOffset(Context::JS_ARRAY_MAPS_INDEX)));
   size_t offset = expected_kind * kPointerSize +
       FixedArrayBase::kHeaderSize;
-  lw(at, FieldMemOperand(scratch, offset));
+  ld(at, FieldMemOperand(scratch, offset));
   Branch(no_map_match, ne, map_in_out, Operand(at));
 
   // Use the transitioned cached map.
   offset = transitioned_kind * kPointerSize +
       FixedArrayBase::kHeaderSize;
-  lw(map_in_out, FieldMemOperand(scratch, offset));
+  ld(map_in_out, FieldMemOperand(scratch, offset));
 }
 
 
 void MacroAssembler::LoadGlobalFunction(int index, Register function) {
   // Load the global or builtins object from the current context.
-  lw(function,
+  ld(function,
      MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
   // Load the native context from the global or builtins object.
-  lw(function, FieldMemOperand(function,
+  ld(function, FieldMemOperand(function,
                                GlobalObject::kNativeContextOffset));
   // Load the function from the native context.
-  lw(function, MemOperand(function, Context::SlotOffset(index)));
+  ld(function, MemOperand(function, Context::SlotOffset(index)));
 }
 
 
 void MacroAssembler::LoadGlobalFunctionInitialMap(Register function,
                                                   Register map,
                                                   Register scratch) {
   // Load the initial map. The global functions all have initial maps.
-  lw(map, FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
+  ld(map, FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
   if (emit_debug_code()) {
     Label ok, fail;
     CheckMap(map, scratch, Heap::kMetaMapRootIndex, &fail, DO_SMI_CHECK);
     Branch(&ok);
     bind(&fail);
     Abort(kGlobalFunctionsMustHaveInitialMap);
     bind(&ok);
   }
 }
 
 
 void MacroAssembler::StubPrologue() {
     Push(ra, fp, cp);
     Push(Smi::FromInt(StackFrame::STUB));
     // Adjust FP to point to saved FP.
-    Addu(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
+    Daddu(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
 }
 
 
 void MacroAssembler::Prologue(bool code_pre_aging) {
   PredictableCodeSizeScope predictible_code_size_scope(
       this, kNoCodeAgeSequenceLength);
   // The following three instructions must remain together and unmodified
   // for code aging to work properly.
   if (code_pre_aging) {
     // Pre-age the code.
     Code* stub = Code::GetPreAgedCodeAgeStub(isolate());
     nop(Assembler::CODE_AGE_MARKER_NOP);
     // Load the stub address to t9 and call it,
     // GetCodeAgeAndParity() extracts the stub address from this instruction.
     li(t9,
-       Operand(reinterpret_cast<uint32_t>(stub->instruction_start())),
-       CONSTANT_SIZE);
+       Operand(reinterpret_cast<uint64_t>(stub->instruction_start())),
+       ADDRESS_LOAD);
     nop();  // Prevent jalr to jal optimization.
     jalr(t9, a0);
     nop();  // Branch delay slot nop.
     nop();  // Pad the empty space.
   } else {
     Push(ra, fp, cp, a1);
     nop(Assembler::CODE_AGE_SEQUENCE_NOP);
+    nop(Assembler::CODE_AGE_SEQUENCE_NOP);
+    nop(Assembler::CODE_AGE_SEQUENCE_NOP);
     // Adjust fp to point to caller's fp.
-    Addu(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
+    Daddu(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
   }
 }
 
 
 void MacroAssembler::EnterFrame(StackFrame::Type type) {
-  addiu(sp, sp, -5 * kPointerSize);
+  daddiu(sp, sp, -5 * kPointerSize);
   li(t8, Operand(Smi::FromInt(type)));
   li(t9, Operand(CodeObject()), CONSTANT_SIZE);
-  sw(ra, MemOperand(sp, 4 * kPointerSize));
-  sw(fp, MemOperand(sp, 3 * kPointerSize));
-  sw(cp, MemOperand(sp, 2 * kPointerSize));
-  sw(t8, MemOperand(sp, 1 * kPointerSize));
-  sw(t9, MemOperand(sp, 0 * kPointerSize));
+  sd(ra, MemOperand(sp, 4 * kPointerSize));
+  sd(fp, MemOperand(sp, 3 * kPointerSize));
+  sd(cp, MemOperand(sp, 2 * kPointerSize));
+  sd(t8, MemOperand(sp, 1 * kPointerSize));
+  sd(t9, MemOperand(sp, 0 * kPointerSize));
   // Adjust FP to point to saved FP.
-  Addu(fp, sp,
+  Daddu(fp, sp,
        Operand(StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize));
 }
 
 
 void MacroAssembler::LeaveFrame(StackFrame::Type type) {
   mov(sp, fp);
-  lw(fp, MemOperand(sp, 0 * kPointerSize));
-  lw(ra, MemOperand(sp, 1 * kPointerSize));
-  addiu(sp, sp, 2 * kPointerSize);
+  ld(fp, MemOperand(sp, 0 * kPointerSize));
+  ld(ra, MemOperand(sp, 1 * kPointerSize));
+  daddiu(sp, sp, 2 * kPointerSize);
 }
 
 
 void MacroAssembler::EnterExitFrame(bool save_doubles,
                                     int stack_space) {
   // Set up the frame structure on the stack.
   STATIC_ASSERT(2 * kPointerSize == ExitFrameConstants::kCallerSPDisplacement);
   STATIC_ASSERT(1 * kPointerSize == ExitFrameConstants::kCallerPCOffset);
   STATIC_ASSERT(0 * kPointerSize == ExitFrameConstants::kCallerFPOffset);
 
   // This is how the stack will look:
   // fp + 2 (==kCallerSPDisplacement) - old stack's end
   // [fp + 1 (==kCallerPCOffset)] - saved old ra
   // [fp + 0 (==kCallerFPOffset)] - saved old fp
   // [fp - 1 (==kSPOffset)] - sp of the called function
   // [fp - 2 (==kCodeOffset)] - CodeObject
   // fp - (2 + stack_space + alignment) == sp == [fp - kSPOffset] - top of the
   //   new stack (will contain saved ra)
 
   // Save registers.
-  addiu(sp, sp, -4 * kPointerSize);
-  sw(ra, MemOperand(sp, 3 * kPointerSize));
-  sw(fp, MemOperand(sp, 2 * kPointerSize));
-  addiu(fp, sp, 2 * kPointerSize);  // Set up new frame pointer.
+  daddiu(sp, sp, -4 * kPointerSize);
+  sd(ra, MemOperand(sp, 3 * kPointerSize));
+  sd(fp, MemOperand(sp, 2 * kPointerSize));
+  daddiu(fp, sp, 2 * kPointerSize);  // Set up new frame pointer.
 
   if (emit_debug_code()) {
-    sw(zero_reg, MemOperand(fp, ExitFrameConstants::kSPOffset));
+    sd(zero_reg, MemOperand(fp, ExitFrameConstants::kSPOffset));
   }
 
   // Accessed from ExitFrame::code_slot.
   li(t8, Operand(CodeObject()), CONSTANT_SIZE);
-  sw(t8, MemOperand(fp, ExitFrameConstants::kCodeOffset));
+  sd(t8, MemOperand(fp, ExitFrameConstants::kCodeOffset));
 
   // Save the frame pointer and the context in top.
   li(t8, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
-  sw(fp, MemOperand(t8));
+  sd(fp, MemOperand(t8));
   li(t8, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
-  sw(cp, MemOperand(t8));
+  sd(cp, MemOperand(t8));
 
   const int frame_alignment = MacroAssembler::ActivationFrameAlignment();
   if (save_doubles) {
-    // The stack  must be allign to 0 modulo 8 for stores with sdc1.
-    ASSERT(kDoubleSize == frame_alignment);
-    if (frame_alignment > 0) {
-      ASSERT(IsPowerOf2(frame_alignment));
-      And(sp, sp, Operand(-frame_alignment));  // Align stack.
-    }
-    int space = FPURegister::kMaxNumRegisters * kDoubleSize;
-    Subu(sp, sp, Operand(space));
+    // The stack is already aligned to 0 modulo 8 for stores with sdc1.
+    int kNumOfSavedRegisters = FPURegister::kMaxNumRegisters / 2;
+    int space = kNumOfSavedRegisters * kDoubleSize ;
+    Dsubu(sp, sp, Operand(space));
     // Remember: we only need to save every 2nd double FPU value.
-    for (int i = 0; i < FPURegister::kMaxNumRegisters; i+=2) {
-      FPURegister reg = FPURegister::from_code(i);
+    for (int i = 0; i < kNumOfSavedRegisters; i++) {
+      FPURegister reg = FPURegister::from_code(2 * i);
       sdc1(reg, MemOperand(sp, i * kDoubleSize));
     }
   }
 
   // Reserve place for the return address, stack space and an optional slot
   // (used by the DirectCEntryStub to hold the return value if a struct is
   // returned) and align the frame preparing for calling the runtime function.
   ASSERT(stack_space >= 0);
-  Subu(sp, sp, Operand((stack_space + 2) * kPointerSize));
+  Dsubu(sp, sp, Operand((stack_space + 2) * kPointerSize));
   if (frame_alignment > 0) {
     ASSERT(IsPowerOf2(frame_alignment));
     And(sp, sp, Operand(-frame_alignment));  // Align stack.
   }
 
   // Set the exit frame sp value to point just before the return address
   // location.
-  addiu(at, sp, kPointerSize);
-  sw(at, MemOperand(fp, ExitFrameConstants::kSPOffset));
+  daddiu(at, sp, kPointerSize);
+  sd(at, MemOperand(fp, ExitFrameConstants::kSPOffset));
 }
 
 
 void MacroAssembler::LeaveExitFrame(bool save_doubles,
                                     Register argument_count,
                                     bool restore_context,
                                     bool do_return) {
   // Optionally restore all double registers.
   if (save_doubles) {
     // Remember: we only need to restore every 2nd double FPU value.
-    lw(t8, MemOperand(fp, ExitFrameConstants::kSPOffset));
-    for (int i = 0; i < FPURegister::kMaxNumRegisters; i+=2) {
-      FPURegister reg = FPURegister::from_code(i);
-      ldc1(reg, MemOperand(t8, i  * kDoubleSize + kPointerSize));
+    int kNumOfSavedRegisters = FPURegister::kMaxNumRegisters / 2;
+    Dsubu(t8, fp, Operand(ExitFrameConstants::kFrameSize +
+        kNumOfSavedRegisters * kDoubleSize));
+    for (int i = 0; i < kNumOfSavedRegisters; i++) {
+      FPURegister reg = FPURegister::from_code(2 * i);
+      ldc1(reg, MemOperand(t8, i  * kDoubleSize));
     }
   }
 
   // Clear top frame.
   li(t8, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
-  sw(zero_reg, MemOperand(t8));
+  sd(zero_reg, MemOperand(t8));
 
   // Restore current context from top and clear it in debug mode.
   if (restore_context) {
     li(t8, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
-    lw(cp, MemOperand(t8));
+    ld(cp, MemOperand(t8));
   }
 #ifdef DEBUG
   li(t8, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
-  sw(a3, MemOperand(t8));
+  sd(a3, MemOperand(t8));
 #endif
 
   // Pop the arguments, restore registers, and return.
   mov(sp, fp);  // Respect ABI stack constraint.
-  lw(fp, MemOperand(sp, ExitFrameConstants::kCallerFPOffset));
-  lw(ra, MemOperand(sp, ExitFrameConstants::kCallerPCOffset));
+  ld(fp, MemOperand(sp, ExitFrameConstants::kCallerFPOffset));
+  ld(ra, MemOperand(sp, ExitFrameConstants::kCallerPCOffset));
 
   if (argument_count.is_valid()) {
-    sll(t8, argument_count, kPointerSizeLog2);
-    addu(sp, sp, t8);
+    dsll(t8, argument_count, kPointerSizeLog2);
+    daddu(sp, sp, t8);
   }
 
   if (do_return) {
     Ret(USE_DELAY_SLOT);
     // If returning, the instruction in the delay slot will be the addiu below.
   }
-  addiu(sp, sp, 8);
+  daddiu(sp, sp, 2 * kPointerSize);
 }
 
 
 void MacroAssembler::InitializeNewString(Register string,
                                          Register length,
                                          Heap::RootListIndex map_index,
                                          Register scratch1,
                                          Register scratch2) {
-  sll(scratch1, length, kSmiTagSize);
+  // dsll(scratch1, length, kSmiTagSize);
+  dsll32(scratch1, length, 0);
   LoadRoot(scratch2, map_index);
-  sw(scratch1, FieldMemOperand(string, String::kLengthOffset));
+  sd(scratch1, FieldMemOperand(string, String::kLengthOffset));
   li(scratch1, Operand(String::kEmptyHashField));
-  sw(scratch2, FieldMemOperand(string, HeapObject::kMapOffset));
-  sw(scratch1, FieldMemOperand(string, String::kHashFieldOffset));
+  sd(scratch2, FieldMemOperand(string, HeapObject::kMapOffset));
+  sd(scratch1, FieldMemOperand(string, String::kHashFieldOffset));
 }
 
 
 int MacroAssembler::ActivationFrameAlignment() {
-#if V8_HOST_ARCH_MIPS
+#if V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
   // Running on the real platform. Use the alignment as mandated by the local
   // environment.
   // Note: This will break if we ever start generating snapshots on one Mips
   // platform for another Mips platform with a different alignment.
   return base::OS::ActivationFrameAlignment();
 #else  // V8_HOST_ARCH_MIPS
   // If we are using the simulator then we should always align to the expected
   // alignment. As the simulator is used to generate snapshots we do not know
   // if the target platform will need alignment, so this is controlled from a
   // flag.
@@ skipping 17 matching lines @@
         bind(&alignment_as_expected);
       }
     }
 }
 
 
 void MacroAssembler::JumpIfNotPowerOfTwoOrZero(
     Register reg,
     Register scratch,
     Label* not_power_of_two_or_zero) {
-  Subu(scratch, reg, Operand(1));
+  Dsubu(scratch, reg, Operand(1));
   Branch(USE_DELAY_SLOT, not_power_of_two_or_zero, lt,
          scratch, Operand(zero_reg));
   and_(at, scratch, reg);  // In the delay slot.
   Branch(not_power_of_two_or_zero, ne, at, Operand(zero_reg));
 }
 
 
 void MacroAssembler::SmiTagCheckOverflow(Register reg, Register overflow) {
   ASSERT(!reg.is(overflow));
   mov(overflow, reg);  // Save original value.
@@ skipping 11 matching lines @@
   } else {
     ASSERT(!dst.is(src));
     ASSERT(!dst.is(overflow));
     ASSERT(!src.is(overflow));
     SmiTag(dst, src);
     xor_(overflow, dst, src);  // Overflow if (value ^ 2 * value) < 0.
   }
 }
 
 
+void MacroAssembler::SmiLoadUntag(Register dst, MemOperand src) {
+  if (SmiValuesAre32Bits()) {
+    lw(dst, UntagSmiMemOperand(src.rm(), src.offset()));
+  } else {
+    lw(dst, src);
+    SmiUntag(dst);
+  }
+}
+
+
+void MacroAssembler::SmiLoadScale(Register dst, MemOperand src, int scale) {
+  if (SmiValuesAre32Bits()) {
+    // TODO(plind): not clear if lw or ld faster here, need micro-benchmark.
+    lw(dst, UntagSmiMemOperand(src.rm(), src.offset()));
+    dsll(dst, dst, scale);
+  } else {
+    lw(dst, src);
+    ASSERT(scale >= kSmiTagSize);
+    sll(dst, dst, scale - kSmiTagSize);
+  }
+}
+
+
+// Returns 2 values: the Smi and a scaled version of the int within the Smi.
+void MacroAssembler::SmiLoadWithScale(Register d_smi,
+                                      Register d_scaled,
+                                      MemOperand src,
+                                      int scale) {
+  if (SmiValuesAre32Bits()) {
+    ld(d_smi, src);
+    dsra(d_scaled, d_smi, kSmiShift - scale);
+  } else {
+    lw(d_smi, src);
+    ASSERT(scale >= kSmiTagSize);
+    sll(d_scaled, d_smi, scale - kSmiTagSize);
+  }
+}
+
+
+// Returns 2 values: the untagged Smi (int32) and scaled version of that int.
+void MacroAssembler::SmiLoadUntagWithScale(Register d_int,
+                                           Register d_scaled,
+                                           MemOperand src,
+                                           int scale) {
+  if (SmiValuesAre32Bits()) {
+    lw(d_int, UntagSmiMemOperand(src.rm(), src.offset()));
+    dsll(d_scaled, d_int, scale);
+  } else {
+    lw(d_int, src);
+    // Need both the int and the scaled in, so use two instructions.
+    SmiUntag(d_int);
+    sll(d_scaled, d_int, scale);
+  }
+}
+
+
 void MacroAssembler::UntagAndJumpIfSmi(Register dst,
                                        Register src,
                                        Label* smi_case) {
+  // ASSERT(!dst.is(src));
   JumpIfSmi(src, smi_case, at, USE_DELAY_SLOT);
   SmiUntag(dst, src);
 }
 
 
 void MacroAssembler::UntagAndJumpIfNotSmi(Register dst,
                                           Register src,
                                           Label* non_smi_case) {
+  // ASSERT(!dst.is(src));
   JumpIfNotSmi(src, non_smi_case, at, USE_DELAY_SLOT);
   SmiUntag(dst, src);
 }
 
 void MacroAssembler::JumpIfSmi(Register value,
                                Label* smi_label,
                                Register scratch,
                                BranchDelaySlot bd) {
   ASSERT_EQ(0, kSmiTag);
   andi(scratch, value, kSmiTagMask);
   Branch(bd, smi_label, eq, scratch, Operand(zero_reg));
 }
 
 void MacroAssembler::JumpIfNotSmi(Register value,
                                   Label* not_smi_label,
                                   Register scratch,
                                   BranchDelaySlot bd) {
   ASSERT_EQ(0, kSmiTag);
   andi(scratch, value, kSmiTagMask);
   Branch(bd, not_smi_label, ne, scratch, Operand(zero_reg));
 }
 
 
 void MacroAssembler::JumpIfNotBothSmi(Register reg1,
                                       Register reg2,
                                       Label* on_not_both_smi) {
   STATIC_ASSERT(kSmiTag == 0);
+  // TODO(plind): Find some better to fix this assert issue.
+#if defined(__APPLE__)
   ASSERT_EQ(1, kSmiTagMask);
+#else
+  ASSERT_EQ((uint64_t)1, kSmiTagMask);
+#endif
   or_(at, reg1, reg2);
   JumpIfNotSmi(at, on_not_both_smi);
 }
 
 
 void MacroAssembler::JumpIfEitherSmi(Register reg1,
                                      Register reg2,
                                      Label* on_either_smi) {
   STATIC_ASSERT(kSmiTag == 0);
+  // TODO(plind): Find some better to fix this assert issue.
+#if defined(__APPLE__)
   ASSERT_EQ(1, kSmiTagMask);
+#else
+  ASSERT_EQ((uint64_t)1, kSmiTagMask);
+#endif
   // Both Smi tags must be 1 (not Smi).
   and_(at, reg1, reg2);
   JumpIfSmi(at, on_either_smi);
 }
 
 
 void MacroAssembler::AssertNotSmi(Register object) {
   if (emit_debug_code()) {
     STATIC_ASSERT(kSmiTag == 0);
     andi(at, object, kSmiTagMask);
     Check(ne, kOperandIsASmi, at, Operand(zero_reg));
   }
 }
 
 
 void MacroAssembler::AssertSmi(Register object) {
   if (emit_debug_code()) {
     STATIC_ASSERT(kSmiTag == 0);
     andi(at, object, kSmiTagMask);
     Check(eq, kOperandIsASmi, at, Operand(zero_reg));
   }
 }
 
 
 void MacroAssembler::AssertString(Register object) {
   if (emit_debug_code()) {
     STATIC_ASSERT(kSmiTag == 0);
-    SmiTst(object, t0);
-    Check(ne, kOperandIsASmiAndNotAString, t0, Operand(zero_reg));
+    SmiTst(object, a4);
+    Check(ne, kOperandIsASmiAndNotAString, a4, Operand(zero_reg));
     push(object);
-    lw(object, FieldMemOperand(object, HeapObject::kMapOffset));
+    ld(object, FieldMemOperand(object, HeapObject::kMapOffset));
     lbu(object, FieldMemOperand(object, Map::kInstanceTypeOffset));
     Check(lo, kOperandIsNotAString, object, Operand(FIRST_NONSTRING_TYPE));
     pop(object);
   }
 }
 
 
 void MacroAssembler::AssertName(Register object) {
   if (emit_debug_code()) {
     STATIC_ASSERT(kSmiTag == 0);
-    SmiTst(object, t0);
-    Check(ne, kOperandIsASmiAndNotAName, t0, Operand(zero_reg));
+    SmiTst(object, a4);
+    Check(ne, kOperandIsASmiAndNotAName, a4, Operand(zero_reg));
     push(object);
-    lw(object, FieldMemOperand(object, HeapObject::kMapOffset));
+    ld(object, FieldMemOperand(object, HeapObject::kMapOffset));
     lbu(object, FieldMemOperand(object, Map::kInstanceTypeOffset));
     Check(le, kOperandIsNotAName, object, Operand(LAST_NAME_TYPE));
     pop(object);
   }
 }
 
 
 void MacroAssembler::AssertUndefinedOrAllocationSite(Register object,
                                                      Register scratch) {
   if (emit_debug_code()) {
     Label done_checking;
     AssertNotSmi(object);
     LoadRoot(scratch, Heap::kUndefinedValueRootIndex);
     Branch(&done_checking, eq, object, Operand(scratch));
     push(object);
-    lw(object, FieldMemOperand(object, HeapObject::kMapOffset));
+    ld(object, FieldMemOperand(object, HeapObject::kMapOffset));
     LoadRoot(scratch, Heap::kAllocationSiteMapRootIndex);
     Assert(eq, kExpectedUndefinedOrCell, object, Operand(scratch));
     pop(object);
     bind(&done_checking);
   }
 }
 
 
 void MacroAssembler::AssertIsRoot(Register reg, Heap::RootListIndex index) {
   if (emit_debug_code()) {
     ASSERT(!reg.is(at));
     LoadRoot(at, index);
     Check(eq, kHeapNumberMapRegisterClobbered, reg, Operand(at));
   }
 }
 
 
 void MacroAssembler::JumpIfNotHeapNumber(Register object,
                                          Register heap_number_map,
                                          Register scratch,
                                          Label* on_not_heap_number) {
-  lw(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
+  ld(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
   AssertIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
   Branch(on_not_heap_number, ne, scratch, Operand(heap_number_map));
 }
 
 
 void MacroAssembler::LookupNumberStringCache(Register object,
                                              Register result,
                                              Register scratch1,
                                              Register scratch2,
                                              Register scratch3,
                                              Label* not_found) {
   // Use of registers. Register result is used as a temporary.
   Register number_string_cache = result;
   Register mask = scratch3;
 
   // Load the number string cache.
   LoadRoot(number_string_cache, Heap::kNumberStringCacheRootIndex);
 
   // Make the hash mask from the length of the number string cache. It
   // contains two elements (number and string) for each cache entry.
-  lw(mask, FieldMemOperand(number_string_cache, FixedArray::kLengthOffset));
+  ld(mask, FieldMemOperand(number_string_cache, FixedArray::kLengthOffset));
   // Divide length by two (length is a smi).
-  sra(mask, mask, kSmiTagSize + 1);
-  Addu(mask, mask, -1);  // Make mask.
+  // dsra(mask, mask, kSmiTagSize + 1);
+  dsra32(mask, mask, 1);
+  Daddu(mask, mask, -1);  // Make mask.
 
   // Calculate the entry in the number string cache. The hash value in the
   // number string cache for smis is just the smi value, and the hash for
   // doubles is the xor of the upper and lower words. See
   // Heap::GetNumberStringCache.
   Label is_smi;
   Label load_result_from_cache;
   JumpIfSmi(object, &is_smi);
   CheckMap(object,
            scratch1,
            Heap::kHeapNumberMapRootIndex,
            not_found,
            DONT_DO_SMI_CHECK);
 
   STATIC_ASSERT(8 == kDoubleSize);
-  Addu(scratch1,
+  Daddu(scratch1,
        object,
        Operand(HeapNumber::kValueOffset - kHeapObjectTag));
-  lw(scratch2, MemOperand(scratch1, kPointerSize));
-  lw(scratch1, MemOperand(scratch1, 0));
+  ld(scratch2, MemOperand(scratch1, kPointerSize));
+  ld(scratch1, MemOperand(scratch1, 0));
   Xor(scratch1, scratch1, Operand(scratch2));
   And(scratch1, scratch1, Operand(mask));
 
   // Calculate address of entry in string cache: each entry consists
   // of two pointer sized fields.
-  sll(scratch1, scratch1, kPointerSizeLog2 + 1);
-  Addu(scratch1, number_string_cache, scratch1);
+  dsll(scratch1, scratch1, kPointerSizeLog2 + 1);
+  Daddu(scratch1, number_string_cache, scratch1);
 
   Register probe = mask;
-  lw(probe, FieldMemOperand(scratch1, FixedArray::kHeaderSize));
+  ld(probe, FieldMemOperand(scratch1, FixedArray::kHeaderSize));
   JumpIfSmi(probe, not_found);
   ldc1(f12, FieldMemOperand(object, HeapNumber::kValueOffset));
   ldc1(f14, FieldMemOperand(probe, HeapNumber::kValueOffset));
   BranchF(&load_result_from_cache, NULL, eq, f12, f14);
   Branch(not_found);
 
   bind(&is_smi);
   Register scratch = scratch1;
-  sra(scratch, object, 1);   // Shift away the tag.
+  // dsra(scratch, object, 1);   // Shift away the tag.
+  dsra32(scratch, scratch, 0);
   And(scratch, mask, Operand(scratch));
 
   // Calculate address of entry in string cache: each entry consists
   // of two pointer sized fields.
-  sll(scratch, scratch, kPointerSizeLog2 + 1);
-  Addu(scratch, number_string_cache, scratch);
+  dsll(scratch, scratch, kPointerSizeLog2 + 1);
+  Daddu(scratch, number_string_cache, scratch);
 
   // Check if the entry is the smi we are looking for.
-  lw(probe, FieldMemOperand(scratch, FixedArray::kHeaderSize));
+  ld(probe, FieldMemOperand(scratch, FixedArray::kHeaderSize));
   Branch(not_found, ne, object, Operand(probe));
 
   // Get the result from the cache.
   bind(&load_result_from_cache);
-  lw(result, FieldMemOperand(scratch, FixedArray::kHeaderSize + kPointerSize));
+  ld(result, FieldMemOperand(scratch, FixedArray::kHeaderSize + kPointerSize));
 
   IncrementCounter(isolate()->counters()->number_to_string_native(),
                    1,
                    scratch1,
                    scratch2);
 }
 
 
 void MacroAssembler::JumpIfNonSmisNotBothSequentialAsciiStrings(
     Register first,
     Register second,
     Register scratch1,
     Register scratch2,
     Label* failure) {
   // Test that both first and second are sequential ASCII strings.
   // Assume that they are non-smis.
-  lw(scratch1, FieldMemOperand(first, HeapObject::kMapOffset));
-  lw(scratch2, FieldMemOperand(second, HeapObject::kMapOffset));
+  ld(scratch1, FieldMemOperand(first, HeapObject::kMapOffset));
+  ld(scratch2, FieldMemOperand(second, HeapObject::kMapOffset));
   lbu(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
   lbu(scratch2, FieldMemOperand(scratch2, Map::kInstanceTypeOffset));
 
   JumpIfBothInstanceTypesAreNotSequentialAscii(scratch1,
                                                scratch2,
                                                scratch1,
                                                scratch2,
                                                failure);
 }
 
@@ skipping 38 matching lines @@
                                                             Label* failure) {
   const int kFlatAsciiStringMask =
       kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
   const int kFlatAsciiStringTag =
       kStringTag | kOneByteStringTag | kSeqStringTag;
   And(scratch, type, Operand(kFlatAsciiStringMask));
   Branch(failure, ne, scratch, Operand(kFlatAsciiStringTag));
 }
 
 
-static const int kRegisterPassedArguments = 4;
+static const int kRegisterPassedArguments = (kMipsAbi == kN64) ? 8 : 4;
 
 int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments,
                                               int num_double_arguments) {
   int stack_passed_words = 0;
   num_reg_arguments += 2 * num_double_arguments;
 
-  // Up to four simple arguments are passed in registers a0..a3.
+  // O32: Up to four simple arguments are passed in registers a0..a3.
+  // N64: Up to eight simple arguments are passed in registers a0..a7.
   if (num_reg_arguments > kRegisterPassedArguments) {
     stack_passed_words += num_reg_arguments - kRegisterPassedArguments;
   }
   stack_passed_words += kCArgSlotCount;
   return stack_passed_words;
 }
 
 
 void MacroAssembler::EmitSeqStringSetCharCheck(Register string,
                                                Register index,
                                                Register value,
                                                Register scratch,
                                                uint32_t encoding_mask) {
   Label is_object;
   SmiTst(string, at);
   Check(ne, kNonObject, at, Operand(zero_reg));
 
-  lw(at, FieldMemOperand(string, HeapObject::kMapOffset));
+  ld(at, FieldMemOperand(string, HeapObject::kMapOffset));
   lbu(at, FieldMemOperand(at, Map::kInstanceTypeOffset));
 
   andi(at, at, kStringRepresentationMask | kStringEncodingMask);
   li(scratch, Operand(encoding_mask));
   Check(eq, kUnexpectedStringType, at, Operand(scratch));
 
-  // The index is assumed to be untagged coming in, tag it to compare with the
-  // string length without using a temp register, it is restored at the end of
-  // this function.
-  Label index_tag_ok, index_tag_bad;
-  TrySmiTag(index, scratch, &index_tag_bad);
-  Branch(&index_tag_ok);
-  bind(&index_tag_bad);
-  Abort(kIndexIsTooLarge);
-  bind(&index_tag_ok);
+  // TODO(plind): requires Smi size check code for mips32.
 
-  lw(at, FieldMemOperand(string, String::kLengthOffset));
+  ld(at, FieldMemOperand(string, String::kLengthOffset));
   Check(lt, kIndexIsTooLarge, index, Operand(at));
 
   ASSERT(Smi::FromInt(0) == 0);
   Check(ge, kIndexIsNegative, index, Operand(zero_reg));
-
-  SmiUntag(index, index);
 }
 
 
 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
                                           int num_double_arguments,
                                           Register scratch) {
   int frame_alignment = ActivationFrameAlignment();
 
-  // Up to four simple arguments are passed in registers a0..a3.
+  // n64: Up to eight simple arguments in a0..a3, a4..a7, No argument slots.
+  // O32: Up to four simple arguments are passed in registers a0..a3.
   // Those four arguments must have reserved argument slots on the stack for
   // mips, even though those argument slots are not normally used.
-  // Remaining arguments are pushed on the stack, above (higher address than)
-  // the argument slots.
+  // Both ABIs: Remaining arguments are pushed on the stack, above (higher
+  // address than) the (O32) argument slots. (arg slot calculation handled by
+  // CalculateStackPassedWords()).
   int stack_passed_arguments = CalculateStackPassedWords(
       num_reg_arguments, num_double_arguments);
   if (frame_alignment > kPointerSize) {
     // Make stack end at alignment and make room for num_arguments - 4 words
     // and the original value of sp.
     mov(scratch, sp);
-    Subu(sp, sp, Operand((stack_passed_arguments + 1) * kPointerSize));
+    Dsubu(sp, sp, Operand((stack_passed_arguments + 1) * kPointerSize));
     ASSERT(IsPowerOf2(frame_alignment));
     And(sp, sp, Operand(-frame_alignment));
-    sw(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
+    sd(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
   } else {
-    Subu(sp, sp, Operand(stack_passed_arguments * kPointerSize));
+    Dsubu(sp, sp, Operand(stack_passed_arguments * kPointerSize));
   }
 }
 
 
 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
                                           Register scratch) {
   PrepareCallCFunction(num_reg_arguments, 0, scratch);
 }
 
 
@@ skipping 27 matching lines @@
 void MacroAssembler::CallCFunctionHelper(Register function,
                                          int num_reg_arguments,
                                          int num_double_arguments) {
   ASSERT(has_frame());
   // Make sure that the stack is aligned before calling a C function unless
   // running in the simulator. The simulator has its own alignment check which
   // provides more information.
   // The argument stots are presumed to have been set up by
   // PrepareCallCFunction. The C function must be called via t9, for mips ABI.
 
-#if V8_HOST_ARCH_MIPS
+#if V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
   if (emit_debug_code()) {
     int frame_alignment = base::OS::ActivationFrameAlignment();
     int frame_alignment_mask = frame_alignment - 1;
     if (frame_alignment > kPointerSize) {
       ASSERT(IsPowerOf2(frame_alignment));
       Label alignment_as_expected;
       And(at, sp, Operand(frame_alignment_mask));
       Branch(&alignment_as_expected, eq, at, Operand(zero_reg));
       // Don't use Check here, as it will call Runtime_Abort possibly
       // re-entering here.
@@ skipping 11 matching lines @@
     mov(t9, function);
     function = t9;
   }
 
   Call(function);
 
   int stack_passed_arguments = CalculateStackPassedWords(
       num_reg_arguments, num_double_arguments);
 
   if (base::OS::ActivationFrameAlignment() > kPointerSize) {
-    lw(sp, MemOperand(sp, stack_passed_arguments * kPointerSize));
+    ld(sp, MemOperand(sp, stack_passed_arguments * kPointerSize));
   } else {
-    Addu(sp, sp, Operand(stack_passed_arguments * sizeof(kPointerSize)));
+    Daddu(sp, sp, Operand(stack_passed_arguments * kPointerSize));
   }
 }
 
 
 #undef BRANCH_ARGS_CHECK
 
 
 void MacroAssembler::PatchRelocatedValue(Register li_location,
                                          Register scratch,
                                          Register new_value) {
-  lw(scratch, MemOperand(li_location));
+  lwu(scratch, MemOperand(li_location));
   // At this point scratch is a lui(at, ...) instruction.
   if (emit_debug_code()) {
     And(scratch, scratch, kOpcodeMask);
     Check(eq, kTheInstructionToPatchShouldBeALui,
         scratch, Operand(LUI));
-    lw(scratch, MemOperand(li_location));
+    lwu(scratch, MemOperand(li_location));
   }
-  srl(t9, new_value, kImm16Bits);
+  dsrl32(t9, new_value, 0);
   Ins(scratch, t9, 0, kImm16Bits);
   sw(scratch, MemOperand(li_location));
 
-  lw(scratch, MemOperand(li_location, kInstrSize));
+  lwu(scratch, MemOperand(li_location, kInstrSize));
   // scratch is now ori(at, ...).
   if (emit_debug_code()) {
     And(scratch, scratch, kOpcodeMask);
     Check(eq, kTheInstructionToPatchShouldBeAnOri,
         scratch, Operand(ORI));
-    lw(scratch, MemOperand(li_location, kInstrSize));
+    lwu(scratch, MemOperand(li_location, kInstrSize));
   }
-  Ins(scratch, new_value, 0, kImm16Bits);
+  dsrl(t9, new_value, kImm16Bits);
+  Ins(scratch, t9, 0, kImm16Bits);
   sw(scratch, MemOperand(li_location, kInstrSize));
 
+  lwu(scratch, MemOperand(li_location, kInstrSize * 3));
+  // scratch is now ori(at, ...).
+  if (emit_debug_code()) {
+    And(scratch, scratch, kOpcodeMask);
+    Check(eq, kTheInstructionToPatchShouldBeAnOri,
+        scratch, Operand(ORI));
+    lwu(scratch, MemOperand(li_location, kInstrSize * 3));
+  }
+
+  Ins(scratch, new_value, 0, kImm16Bits);
+  sw(scratch, MemOperand(li_location, kInstrSize * 3));
+
   // Update the I-cache so the new lui and ori can be executed.
-  FlushICache(li_location, 2);
+  FlushICache(li_location, 4);
 }
 
 void MacroAssembler::GetRelocatedValue(Register li_location,
                                        Register value,
                                        Register scratch) {
-  lw(value, MemOperand(li_location));
+  lwu(value, MemOperand(li_location));
   if (emit_debug_code()) {
     And(value, value, kOpcodeMask);
     Check(eq, kTheInstructionShouldBeALui,
         value, Operand(LUI));
-    lw(value, MemOperand(li_location));
+    lwu(value, MemOperand(li_location));
   }
 
   // value now holds a lui instruction. Extract the immediate.
-  sll(value, value, kImm16Bits);
+  andi(value, value, kImm16Mask);
+  dsll32(value, value, kImm16Bits);
 
-  lw(scratch, MemOperand(li_location, kInstrSize));
+  lwu(scratch, MemOperand(li_location, kInstrSize));
   if (emit_debug_code()) {
     And(scratch, scratch, kOpcodeMask);
     Check(eq, kTheInstructionShouldBeAnOri,
         scratch, Operand(ORI));
-    lw(scratch, MemOperand(li_location, kInstrSize));
+    lwu(scratch, MemOperand(li_location, kInstrSize));
   }
   // "scratch" now holds an ori instruction. Extract the immediate.
   andi(scratch, scratch, kImm16Mask);
+  dsll32(scratch, scratch, 0);
 
-  // Merge the results.
   or_(value, value, scratch);
+
+  lwu(scratch, MemOperand(li_location, kInstrSize * 3));
+  if (emit_debug_code()) {
+    And(scratch, scratch, kOpcodeMask);
+    Check(eq, kTheInstructionShouldBeAnOri,
+        scratch, Operand(ORI));
+    lwu(scratch, MemOperand(li_location, kInstrSize * 3));
+  }
+  // "scratch" now holds an ori instruction. Extract the immediate.
+  andi(scratch, scratch, kImm16Mask);
+  dsll(scratch, scratch, kImm16Bits);
+
+  or_(value, value, scratch);
+  // Sign extend extracted address.
+  dsra(value, value, kImm16Bits);
 }
 
 
 void MacroAssembler::CheckPageFlag(
     Register object,
     Register scratch,
     int mask,
     Condition cc,
     Label* condition_met) {
-  And(scratch, object, Operand(~Page::kPageAlignmentMask));
-  lw(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
+  // TODO(plind):  Fix li() so we can use constant embedded inside And().
+  // And(scratch, object, Operand(~Page::kPageAlignmentMask));
+  li(at, Operand(~Page::kPageAlignmentMask), CONSTANT_SIZE);  // plind HACK
+  And(scratch, object, at);
+  ld(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
   And(scratch, scratch, Operand(mask));
   Branch(condition_met, cc, scratch, Operand(zero_reg));
 }
 
 
 void MacroAssembler::CheckMapDeprecated(Handle<Map> map,
                                         Register scratch,
                                         Label* if_deprecated) {
   if (map->CanBeDeprecated()) {
     li(scratch, Operand(map));
-    lw(scratch, FieldMemOperand(scratch, Map::kBitField3Offset));
+    ld(scratch, FieldMemOperand(scratch, Map::kBitField3Offset));
     And(scratch, scratch, Operand(Map::Deprecated::kMask));
     Branch(if_deprecated, ne, scratch, Operand(zero_reg));
   }
 }
 
 
 void MacroAssembler::JumpIfBlack(Register object,
                                  Register scratch0,
                                  Register scratch1,
                                  Label* on_black) {
   HasColor(object, scratch0, scratch1, on_black, 1, 0);  // kBlackBitPattern.
   ASSERT(strcmp(Marking::kBlackBitPattern, "10") == 0);
 }
 
 
 void MacroAssembler::HasColor(Register object,
                               Register bitmap_scratch,
                               Register mask_scratch,
                               Label* has_color,
                               int first_bit,
                               int second_bit) {
   ASSERT(!AreAliased(object, bitmap_scratch, mask_scratch, t8));
   ASSERT(!AreAliased(object, bitmap_scratch, mask_scratch, t9));
 
   GetMarkBits(object, bitmap_scratch, mask_scratch);
 
-  Label other_color, word_boundary;
-  lw(t9, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+  Label other_color;
+  // Note that we are using a 4-byte aligned 8-byte load.
+  Uld(t9, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
   And(t8, t9, Operand(mask_scratch));
   Branch(&other_color, first_bit == 1 ? eq : ne, t8, Operand(zero_reg));
   // Shift left 1 by adding.
-  Addu(mask_scratch, mask_scratch, Operand(mask_scratch));
-  Branch(&word_boundary, eq, mask_scratch, Operand(zero_reg));
+  Daddu(mask_scratch, mask_scratch, Operand(mask_scratch));
   And(t8, t9, Operand(mask_scratch));
   Branch(has_color, second_bit == 1 ? ne : eq, t8, Operand(zero_reg));
-  jmp(&other_color);
 
-  bind(&word_boundary);
-  lw(t9, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize + kPointerSize));
-  And(t9, t9, Operand(1));
-  Branch(has_color, second_bit == 1 ? ne : eq, t9, Operand(zero_reg));
   bind(&other_color);
 }
 
 
 // Detect some, but not all, common pointer-free objects.  This is used by the
 // incremental write barrier which doesn't care about oddballs (they are always
 // marked black immediately so this code is not hit).
 void MacroAssembler::JumpIfDataObject(Register value,
                                       Register scratch,
                                       Label* not_data_object) {
   ASSERT(!AreAliased(value, scratch, t8, no_reg));
   Label is_data_object;
-  lw(scratch, FieldMemOperand(value, HeapObject::kMapOffset));
+  ld(scratch, FieldMemOperand(value, HeapObject::kMapOffset));
   LoadRoot(t8, Heap::kHeapNumberMapRootIndex);
   Branch(&is_data_object, eq, t8, Operand(scratch));
   ASSERT(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);
   ASSERT(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);
   // If it's a string and it's not a cons string then it's an object containing
   // no GC pointers.
   lbu(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
   And(t8, scratch, Operand(kIsIndirectStringMask | kIsNotStringMask));
   Branch(not_data_object, ne, t8, Operand(zero_reg));
   bind(&is_data_object);
 }
 
 
 void MacroAssembler::GetMarkBits(Register addr_reg,
                                  Register bitmap_reg,
                                  Register mask_reg) {
   ASSERT(!AreAliased(addr_reg, bitmap_reg, mask_reg, no_reg));
+  // addr_reg is divided into fields:
+  // |63        page base        20|19    high      8|7   shift   3|2  0|
+  // 'high' gives the index of the cell holding color bits for the object.
+  // 'shift' gives the offset in the cell for this object's color.
   And(bitmap_reg, addr_reg, Operand(~Page::kPageAlignmentMask));
   Ext(mask_reg, addr_reg, kPointerSizeLog2, Bitmap::kBitsPerCellLog2);
   const int kLowBits = kPointerSizeLog2 + Bitmap::kBitsPerCellLog2;
   Ext(t8, addr_reg, kLowBits, kPageSizeBits - kLowBits);
-  sll(t8, t8, kPointerSizeLog2);
-  Addu(bitmap_reg, bitmap_reg, t8);
+  dsll(t8, t8, Bitmap::kBytesPerCellLog2);
+  Daddu(bitmap_reg, bitmap_reg, t8);
   li(t8, Operand(1));
-  sllv(mask_reg, t8, mask_reg);
+  dsllv(mask_reg, t8, mask_reg);
 }
 
 
 void MacroAssembler::EnsureNotWhite(
     Register value,
     Register bitmap_scratch,
     Register mask_scratch,
     Register load_scratch,
     Label* value_is_white_and_not_data) {
   ASSERT(!AreAliased(value, bitmap_scratch, mask_scratch, t8));
   GetMarkBits(value, bitmap_scratch, mask_scratch);
 
   // If the value is black or grey we don't need to do anything.
   ASSERT(strcmp(Marking::kWhiteBitPattern, "00") == 0);
   ASSERT(strcmp(Marking::kBlackBitPattern, "10") == 0);
   ASSERT(strcmp(Marking::kGreyBitPattern, "11") == 0);
   ASSERT(strcmp(Marking::kImpossibleBitPattern, "01") == 0);
 
   Label done;
 
   // Since both black and grey have a 1 in the first position and white does
   // not have a 1 there we only need to check one bit.
-  lw(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+  // Note that we are using a 4-byte aligned 8-byte load.
+  Uld(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
   And(t8, mask_scratch, load_scratch);
   Branch(&done, ne, t8, Operand(zero_reg));
 
   if (emit_debug_code()) {
     // Check for impossible bit pattern.
     Label ok;
     // sll may overflow, making the check conservative.
-    sll(t8, mask_scratch, 1);
+    dsll(t8, mask_scratch, 1);
     And(t8, load_scratch, t8);
     Branch(&ok, eq, t8, Operand(zero_reg));
     stop("Impossible marking bit pattern");
     bind(&ok);
   }
 
   // Value is white.  We check whether it is data that doesn't need scanning.
   // Currently only checks for HeapNumber and non-cons strings.
   Register map = load_scratch;  // Holds map while checking type.
   Register length = load_scratch;  // Holds length of object after testing type.
   Label is_data_object;
 
   // Check for heap-number
-  lw(map, FieldMemOperand(value, HeapObject::kMapOffset));
+  ld(map, FieldMemOperand(value, HeapObject::kMapOffset));
   LoadRoot(t8, Heap::kHeapNumberMapRootIndex);
   {
     Label skip;
     Branch(&skip, ne, t8, Operand(map));
     li(length, HeapNumber::kSize);
     Branch(&is_data_object);
     bind(&skip);
   }
 
   // Check for strings.
@@ skipping 20 matching lines @@
     Branch(&is_data_object);
     bind(&skip);
   }
 
   // Sequential string, either ASCII or UC16.
   // For ASCII (char-size of 1) we shift the smi tag away to get the length.
   // For UC16 (char-size of 2) we just leave the smi tag in place, thereby
   // getting the length multiplied by 2.
   ASSERT(kOneByteStringTag == 4 && kStringEncodingMask == 4);
   ASSERT(kSmiTag == 0 && kSmiTagSize == 1);
-  lw(t9, FieldMemOperand(value, String::kLengthOffset));
+  lw(t9, UntagSmiFieldMemOperand(value, String::kLengthOffset));
   And(t8, instance_type, Operand(kStringEncodingMask));
   {
     Label skip;
-    Branch(&skip, eq, t8, Operand(zero_reg));
-    srl(t9, t9, 1);
+    Branch(&skip, ne, t8, Operand(zero_reg));
+    // Adjust length for UC16.
+    dsll(t9, t9, 1);
     bind(&skip);
   }
-  Addu(length, t9, Operand(SeqString::kHeaderSize + kObjectAlignmentMask));
+  Daddu(length, t9, Operand(SeqString::kHeaderSize + kObjectAlignmentMask));
+  ASSERT(!length.is(t8));
   And(length, length, Operand(~kObjectAlignmentMask));
 
   bind(&is_data_object);
   // Value is a data object, and it is white.  Mark it black.  Since we know
   // that the object is white we can make it black by flipping one bit.
-  lw(t8, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+  Uld(t8, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
   Or(t8, t8, Operand(mask_scratch));
-  sw(t8, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+  Usd(t8, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
 
   And(bitmap_scratch, bitmap_scratch, Operand(~Page::kPageAlignmentMask));
-  lw(t8, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
-  Addu(t8, t8, Operand(length));
-  sw(t8, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
+  Uld(t8, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
+  Daddu(t8, t8, Operand(length));
+  Usd(t8, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
 
   bind(&done);
 }
 
 
 void MacroAssembler::LoadInstanceDescriptors(Register map,
                                              Register descriptors) {
-  lw(descriptors, FieldMemOperand(map, Map::kDescriptorsOffset));
+  ld(descriptors, FieldMemOperand(map, Map::kDescriptorsOffset));
 }
 
 
 void MacroAssembler::NumberOfOwnDescriptors(Register dst, Register map) {
-  lw(dst, FieldMemOperand(map, Map::kBitField3Offset));
+  ld(dst, FieldMemOperand(map, Map::kBitField3Offset));
   DecodeField<Map::NumberOfOwnDescriptorsBits>(dst);
 }
 
 
 void MacroAssembler::EnumLength(Register dst, Register map) {
   STATIC_ASSERT(Map::EnumLengthBits::kShift == 0);
-  lw(dst, FieldMemOperand(map, Map::kBitField3Offset));
+  ld(dst, FieldMemOperand(map, Map::kBitField3Offset));
   And(dst, dst, Operand(Map::EnumLengthBits::kMask));
   SmiTag(dst);
 }
 
 
 void MacroAssembler::CheckEnumCache(Register null_value, Label* call_runtime) {
-  Register  empty_fixed_array_value = t2;
+  Register  empty_fixed_array_value = a6;
   LoadRoot(empty_fixed_array_value, Heap::kEmptyFixedArrayRootIndex);
   Label next, start;
   mov(a2, a0);
 
   // Check if the enum length field is properly initialized, indicating that
   // there is an enum cache.
-  lw(a1, FieldMemOperand(a2, HeapObject::kMapOffset));
+  ld(a1, FieldMemOperand(a2, HeapObject::kMapOffset));
 
   EnumLength(a3, a1);
   Branch(
       call_runtime, eq, a3, Operand(Smi::FromInt(kInvalidEnumCacheSentinel)));
 
   jmp(&start);
 
   bind(&next);
-  lw(a1, FieldMemOperand(a2, HeapObject::kMapOffset));
+  ld(a1, FieldMemOperand(a2, HeapObject::kMapOffset));
 
   // For all objects but the receiver, check that the cache is empty.
   EnumLength(a3, a1);
   Branch(call_runtime, ne, a3, Operand(Smi::FromInt(0)));
 
   bind(&start);
 
   // Check that there are no elements. Register a2 contains the current JS
   // object we've reached through the prototype chain.
   Label no_elements;
-  lw(a2, FieldMemOperand(a2, JSObject::kElementsOffset));
+  ld(a2, FieldMemOperand(a2, JSObject::kElementsOffset));
   Branch(&no_elements, eq, a2, Operand(empty_fixed_array_value));
 
   // Second chance, the object may be using the empty slow element dictionary.
   LoadRoot(at, Heap::kEmptySlowElementDictionaryRootIndex);
   Branch(call_runtime, ne, a2, Operand(at));
 
   bind(&no_elements);
-  lw(a2, FieldMemOperand(a1, Map::kPrototypeOffset));
+  ld(a2, FieldMemOperand(a1, Map::kPrototypeOffset));
   Branch(&next, ne, a2, Operand(null_value));
 }
 
 
 void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) {
   ASSERT(!output_reg.is(input_reg));
   Label done;
   li(output_reg, Operand(255));
   // Normal branch: nop in delay slot.
   Branch(&done, gt, input_reg, Operand(output_reg));
@@ skipping 37 matching lines @@
 void MacroAssembler::TestJSArrayForAllocationMemento(
     Register receiver_reg,
     Register scratch_reg,
     Label* no_memento_found,
     Condition cond,
     Label* allocation_memento_present) {
   ExternalReference new_space_start =
       ExternalReference::new_space_start(isolate());
   ExternalReference new_space_allocation_top =
       ExternalReference::new_space_allocation_top_address(isolate());
-  Addu(scratch_reg, receiver_reg,
+  Daddu(scratch_reg, receiver_reg,
        Operand(JSArray::kSize + AllocationMemento::kSize - kHeapObjectTag));
   Branch(no_memento_found, lt, scratch_reg, Operand(new_space_start));
   li(at, Operand(new_space_allocation_top));
-  lw(at, MemOperand(at));
+  ld(at, MemOperand(at));
   Branch(no_memento_found, gt, scratch_reg, Operand(at));
-  lw(scratch_reg, MemOperand(scratch_reg, -AllocationMemento::kSize));
+  ld(scratch_reg, MemOperand(scratch_reg, -AllocationMemento::kSize));
   if (allocation_memento_present) {
     Branch(allocation_memento_present, cond, scratch_reg,
            Operand(isolate()->factory()->allocation_memento_map()));
   }
 }
 
 
 Register GetRegisterThatIsNotOneOf(Register reg1,
                                    Register reg2,
                                    Register reg3,
@@ skipping 26 matching lines @@
   ASSERT(!scratch1.is(scratch0));
   Factory* factory = isolate()->factory();
   Register current = scratch0;
   Label loop_again;
 
   // Scratch contained elements pointer.
   Move(current, object);
 
   // Loop based on the map going up the prototype chain.
   bind(&loop_again);
-  lw(current, FieldMemOperand(current, HeapObject::kMapOffset));
+  ld(current, FieldMemOperand(current, HeapObject::kMapOffset));
   lb(scratch1, FieldMemOperand(current, Map::kBitField2Offset));
   DecodeField<Map::ElementsKindBits>(scratch1);
   Branch(found, eq, scratch1, Operand(DICTIONARY_ELEMENTS));
-  lw(current, FieldMemOperand(current, Map::kPrototypeOffset));
+  ld(current, FieldMemOperand(current, Map::kPrototypeOffset));
   Branch(&loop_again, ne, current, Operand(factory->null_value()));
 }
 
 
 bool AreAliased(Register r1, Register r2, Register r3, Register r4) {
   if (r1.is(r2)) return true;
   if (r1.is(r3)) return true;
   if (r1.is(r4)) return true;
   if (r2.is(r3)) return true;
   if (r2.is(r4)) return true;
@@ skipping 14 matching lines @@
   // bytes of instructions without failing with buffer size constraints.
   ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
 }
 
 
 CodePatcher::~CodePatcher() {
   // Indicate that code has changed.
   if (flush_cache_ == FLUSH) {
     CpuFeatures::FlushICache(address_, size_);
   }
-
   // Check that the code was patched as expected.
   ASSERT(masm_.pc_ == address_ + size_);
   ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
 }
 
 
 void CodePatcher::Emit(Instr instr) {
   masm()->emit(instr);
 }
 
 
 void CodePatcher::Emit(Address addr) {
-  masm()->emit(reinterpret_cast<Instr>(addr));
+  // masm()->emit(reinterpret_cast<Instr>(addr));
 }
 
 
 void CodePatcher::ChangeBranchCondition(Condition cond) {
   Instr instr = Assembler::instr_at(masm_.pc_);
   ASSERT(Assembler::IsBranch(instr));
   uint32_t opcode = Assembler::GetOpcodeField(instr);
   // Currently only the 'eq' and 'ne' cond values are supported and the simple
   // branch instructions (with opcode being the branch type).
   // There are some special cases (see Assembler::IsBranch()) so extending this
@@ skipping 29 matching lines @@
     Subu(result, result, Operand(dividend));
   }
   if (ms.shift() > 0) sra(result, result, ms.shift());
   srl(at, dividend, 31);
   Addu(result, result, Operand(at));
 }
 
 
 } }  // namespace v8::internal
 
-#endif  // V8_TARGET_ARCH_MIPS
+#endif  // V8_TARGET_ARCH_MIPS64