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Issue 371923006: Add mips64 port. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Rebase Created 6 years, 5 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/cpu.h" 5 #include "src/base/cpu.h"
6 6
7 #if V8_LIBC_MSVCRT 7 #if V8_LIBC_MSVCRT
8 #include <intrin.h> // __cpuid() 8 #include <intrin.h> // __cpuid()
9 #endif 9 #endif
10 #if V8_OS_POSIX 10 #if V8_OS_POSIX
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after
49 __asm__ volatile ( 49 __asm__ volatile (
50 "cpuid \n\t" 50 "cpuid \n\t"
51 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) 51 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
52 : "a"(info_type) 52 : "a"(info_type)
53 ); 53 );
54 #endif // defined(__i386__) && defined(__pic__) 54 #endif // defined(__i386__) && defined(__pic__)
55 } 55 }
56 56
57 #endif // !V8_LIBC_MSVCRT 57 #endif // !V8_LIBC_MSVCRT
58 58
59 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 || V8_HOST_ARCH_MIPS 59 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 \
60 || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
60 61
61 #if V8_OS_LINUX 62 #if V8_OS_LINUX
62 63
63 #if V8_HOST_ARCH_ARM 64 #if V8_HOST_ARCH_ARM
64 65
65 // See <uapi/asm/hwcap.h> kernel header. 66 // See <uapi/asm/hwcap.h> kernel header.
66 /* 67 /*
67 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP 68 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
68 */ 69 */
69 #define HWCAP_SWP (1 << 0) 70 #define HWCAP_SWP (1 << 0)
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199 result[len] = '\0'; 200 result[len] = '\0';
200 } 201 }
201 return result; 202 return result;
202 } 203 }
203 204
204 private: 205 private:
205 char* data_; 206 char* data_;
206 size_t datalen_; 207 size_t datalen_;
207 }; 208 };
208 209
209 #if V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS 210 #if V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
210 211
211 // Checks that a space-separated list of items contains one given 'item'. 212 // Checks that a space-separated list of items contains one given 'item'.
212 static bool HasListItem(const char* list, const char* item) { 213 static bool HasListItem(const char* list, const char* item) {
213 ssize_t item_len = strlen(item); 214 ssize_t item_len = strlen(item);
214 const char* p = list; 215 const char* p = list;
215 if (p != NULL) { 216 if (p != NULL) {
216 while (*p != '\0') { 217 while (*p != '\0') {
217 // Skip whitespace. 218 // Skip whitespace.
218 while (isspace(*p)) ++p; 219 while (isspace(*p)) ++p;
219 220
220 // Find end of current list item. 221 // Find end of current list item.
221 const char* q = p; 222 const char* q = p;
222 while (*q != '\0' && !isspace(*q)) ++q; 223 while (*q != '\0' && !isspace(*q)) ++q;
223 224
224 if (item_len == q - p && memcmp(p, item, item_len) == 0) { 225 if (item_len == q - p && memcmp(p, item, item_len) == 0) {
225 return true; 226 return true;
226 } 227 }
227 228
228 // Skip to next item. 229 // Skip to next item.
229 p = q; 230 p = q;
230 } 231 }
231 } 232 }
232 return false; 233 return false;
233 } 234 }
234 235
235 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS 236 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
236 237
237 #endif // V8_OS_LINUX 238 #endif // V8_OS_LINUX
238 239
239 #endif // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 240 #endif // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
240 241
241 CPU::CPU() : stepping_(0), 242 CPU::CPU() : stepping_(0),
242 model_(0), 243 model_(0),
243 ext_model_(0), 244 ext_model_(0),
244 family_(0), 245 family_(0),
245 ext_family_(0), 246 ext_family_(0),
(...skipping 201 matching lines...) Expand 10 before | Expand all | Expand 10 after
447 has_neon_ = true; 448 has_neon_ = true;
448 has_vfp3_ = has_vfp_; 449 has_vfp3_ = has_vfp_;
449 #ifdef ARM_CPU_FLAG_VFP_D32 450 #ifdef ARM_CPU_FLAG_VFP_D32
450 has_vfp3_d32_ = (cpu_flags & ARM_CPU_FLAG_VFP_D32) != 0; 451 has_vfp3_d32_ = (cpu_flags & ARM_CPU_FLAG_VFP_D32) != 0;
451 #endif 452 #endif
452 } 453 }
453 has_idiva_ = (cpu_flags & ARM_CPU_FLAG_IDIV) != 0; 454 has_idiva_ = (cpu_flags & ARM_CPU_FLAG_IDIV) != 0;
454 455
455 #endif // V8_OS_LINUX 456 #endif // V8_OS_LINUX
456 457
457 #elif V8_HOST_ARCH_MIPS 458 #elif V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
458 459
459 // Simple detection of FPU at runtime for Linux. 460 // Simple detection of FPU at runtime for Linux.
460 // It is based on /proc/cpuinfo, which reveals hardware configuration 461 // It is based on /proc/cpuinfo, which reveals hardware configuration
461 // to user-space applications. According to MIPS (early 2010), no similar 462 // to user-space applications. According to MIPS (early 2010), no similar
462 // facility is universally available on the MIPS architectures, 463 // facility is universally available on the MIPS architectures,
463 // so it's up to individual OSes to provide such. 464 // so it's up to individual OSes to provide such.
464 CPUInfo cpu_info; 465 CPUInfo cpu_info;
465 char* cpu_model = cpu_info.ExtractField("cpu model"); 466 char* cpu_model = cpu_info.ExtractField("cpu model");
466 has_fpu_ = HasListItem(cpu_model, "FPU"); 467 has_fpu_ = HasListItem(cpu_model, "FPU");
467 delete[] cpu_model; 468 delete[] cpu_model;
(...skipping 21 matching lines...) Expand all
489 if (end == part) { 490 if (end == part) {
490 part_ = 0; 491 part_ = 0;
491 } 492 }
492 delete[] part; 493 delete[] part;
493 } 494 }
494 495
495 #endif 496 #endif
496 } 497 }
497 498
498 } } // namespace v8::base 499 } } // namespace v8::base
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