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1 # Copyright 2013 the V8 project authors. All rights reserved. | 1 # Copyright 2013 the V8 project authors. All rights reserved. |
2 # Redistribution and use in source and binary forms, with or without | 2 # Redistribution and use in source and binary forms, with or without |
3 # modification, are permitted provided that the following conditions are | 3 # modification, are permitted provided that the following conditions are |
4 # met: | 4 # met: |
5 # | 5 # |
6 # * Redistributions of source code must retain the above copyright | 6 # * Redistributions of source code must retain the above copyright |
7 # notice, this list of conditions and the following disclaimer. | 7 # notice, this list of conditions and the following disclaimer. |
8 # * Redistributions in binary form must reproduce the above | 8 # * Redistributions in binary form must reproduce the above |
9 # copyright notice, this list of conditions and the following | 9 # copyright notice, this list of conditions and the following |
10 # disclaimer in the documentation and/or other materials provided | 10 # disclaimer in the documentation and/or other materials provided |
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49 'v8_can_use_vfp32dregs%': 'false', | 49 'v8_can_use_vfp32dregs%': 'false', |
50 'arm_test_noprobe%': 'off', | 50 'arm_test_noprobe%': 'off', |
51 | 51 |
52 # Similar to vfp but on MIPS. | 52 # Similar to vfp but on MIPS. |
53 'v8_can_use_fpu_instructions%': 'true', | 53 'v8_can_use_fpu_instructions%': 'true', |
54 | 54 |
55 # Similar to the ARM hard float ABI but on MIPS. | 55 # Similar to the ARM hard float ABI but on MIPS. |
56 'v8_use_mips_abi_hardfloat%': 'true', | 56 'v8_use_mips_abi_hardfloat%': 'true', |
57 | 57 |
58 # Default arch variant for MIPS. | 58 # Default arch variant for MIPS. |
59 'mips_arch_variant%': 'mips32r2', | 59 'mips_arch_variant%': 'r2', |
60 | 60 |
61 'v8_enable_backtrace%': 0, | 61 'v8_enable_backtrace%': 0, |
62 | 62 |
63 # Enable profiling support. Only required on Windows. | 63 # Enable profiling support. Only required on Windows. |
64 'v8_enable_prof%': 0, | 64 'v8_enable_prof%': 0, |
65 | 65 |
66 # Some versions of GCC 4.5 seem to need -fno-strict-aliasing. | 66 # Some versions of GCC 4.5 seem to need -fno-strict-aliasing. |
67 'v8_no_strict_aliasing%': 0, | 67 'v8_no_strict_aliasing%': 0, |
68 | 68 |
69 # Chrome needs this definition unconditionally. For standalone V8 builds, | 69 # Chrome needs this definition unconditionally. For standalone V8 builds, |
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240 'cflags': ['-EB'], | 240 'cflags': ['-EB'], |
241 'ldflags': ['-EB'], | 241 'ldflags': ['-EB'], |
242 'conditions': [ | 242 'conditions': [ |
243 [ 'v8_use_mips_abi_hardfloat=="true"', { | 243 [ 'v8_use_mips_abi_hardfloat=="true"', { |
244 'cflags': ['-mhard-float'], | 244 'cflags': ['-mhard-float'], |
245 'ldflags': ['-mhard-float'], | 245 'ldflags': ['-mhard-float'], |
246 }, { | 246 }, { |
247 'cflags': ['-msoft-float'], | 247 'cflags': ['-msoft-float'], |
248 'ldflags': ['-msoft-float'], | 248 'ldflags': ['-msoft-float'], |
249 }], | 249 }], |
250 ['mips_arch_variant=="mips32r2"', { | 250 ['mips_arch_variant=="r2"', { |
251 'cflags': ['-mips32r2', '-Wa,-mips32r2'], | 251 'cflags': ['-mips32r2', '-Wa,-mips32r2'], |
252 }], | 252 }], |
253 ['mips_arch_variant=="mips32r1"', { | 253 ['mips_arch_variant=="r1"', { |
254 'cflags': ['-mips32', '-Wa,-mips32'], | 254 'cflags': ['-mips32', '-Wa,-mips32'], |
255 }], | 255 }], |
256 ], | 256 ], |
257 }], | 257 }], |
258 ], | 258 ], |
259 }], | 259 }], |
260 [ 'v8_can_use_fpu_instructions=="true"', { | 260 [ 'v8_can_use_fpu_instructions=="true"', { |
261 'defines': [ | 261 'defines': [ |
262 'CAN_USE_FPU_INSTRUCTIONS', | 262 'CAN_USE_FPU_INSTRUCTIONS', |
263 ], | 263 ], |
264 }], | 264 }], |
265 [ 'v8_use_mips_abi_hardfloat=="true"', { | 265 [ 'v8_use_mips_abi_hardfloat=="true"', { |
266 'defines': [ | 266 'defines': [ |
267 '__mips_hard_float=1', | 267 '__mips_hard_float=1', |
268 'CAN_USE_FPU_INSTRUCTIONS', | 268 'CAN_USE_FPU_INSTRUCTIONS', |
269 ], | 269 ], |
270 }, { | 270 }, { |
271 'defines': [ | 271 'defines': [ |
272 '__mips_soft_float=1' | 272 '__mips_soft_float=1' |
273 ], | 273 ], |
274 }], | 274 }], |
275 ['mips_arch_variant=="mips32r2"', { | 275 ['mips_arch_variant=="r2"', { |
276 'defines': ['_MIPS_ARCH_MIPS32R2',], | 276 'defines': ['_MIPS_ARCH_MIPS32R2',], |
277 }], | 277 }], |
278 ], | 278 ], |
279 }], # v8_target_arch=="mips" | 279 }], # v8_target_arch=="mips" |
280 ['v8_target_arch=="mipsel"', { | 280 ['v8_target_arch=="mipsel"', { |
281 'defines': [ | 281 'defines': [ |
282 'V8_TARGET_ARCH_MIPS', | 282 'V8_TARGET_ARCH_MIPS', |
283 ], | 283 ], |
284 'variables': { | 284 'variables': { |
285 'mipscompiler': '<!($(echo <(CXX)) -v 2>&1 | grep -q "^Target: mips" &
& echo "yes" || echo "no")', | 285 'mipscompiler': '<!($(echo <(CXX)) -v 2>&1 | grep -q "^Target: mips" &
& echo "yes" || echo "no")', |
286 }, | 286 }, |
287 'conditions': [ | 287 'conditions': [ |
288 ['mipscompiler=="yes"', { | 288 ['mipscompiler=="yes"', { |
289 'target_conditions': [ | 289 'target_conditions': [ |
290 ['_toolset=="target"', { | 290 ['_toolset=="target"', { |
291 'cflags': ['-EL'], | 291 'cflags': ['-EL'], |
292 'ldflags': ['-EL'], | 292 'ldflags': ['-EL'], |
293 'conditions': [ | 293 'conditions': [ |
294 [ 'v8_use_mips_abi_hardfloat=="true"', { | 294 [ 'v8_use_mips_abi_hardfloat=="true"', { |
295 'cflags': ['-mhard-float'], | 295 'cflags': ['-mhard-float'], |
296 'ldflags': ['-mhard-float'], | 296 'ldflags': ['-mhard-float'], |
297 }, { | 297 }, { |
298 'cflags': ['-msoft-float'], | 298 'cflags': ['-msoft-float'], |
299 'ldflags': ['-msoft-float'], | 299 'ldflags': ['-msoft-float'], |
300 }], | 300 }], |
301 ['mips_arch_variant=="mips32r2"', { | 301 ['mips_arch_variant=="r2"', { |
302 'cflags': ['-mips32r2', '-Wa,-mips32r2'], | 302 'cflags': ['-mips32r2', '-Wa,-mips32r2'], |
303 }], | 303 }], |
304 ['mips_arch_variant=="mips32r1"', { | 304 ['mips_arch_variant=="r1"', { |
305 'cflags': ['-mips32', '-Wa,-mips32'], | 305 'cflags': ['-mips32', '-Wa,-mips32'], |
306 }], | 306 }], |
307 ['mips_arch_variant=="loongson"', { | 307 ['mips_arch_variant=="loongson"', { |
308 'cflags': ['-mips3', '-Wa,-mips3'], | 308 'cflags': ['-mips3', '-Wa,-mips3'], |
309 }], | 309 }], |
310 ], | 310 ], |
311 }], | 311 }], |
312 ], | 312 ], |
313 }], | 313 }], |
314 [ 'v8_can_use_fpu_instructions=="true"', { | 314 [ 'v8_can_use_fpu_instructions=="true"', { |
315 'defines': [ | 315 'defines': [ |
316 'CAN_USE_FPU_INSTRUCTIONS', | 316 'CAN_USE_FPU_INSTRUCTIONS', |
317 ], | 317 ], |
318 }], | 318 }], |
319 [ 'v8_use_mips_abi_hardfloat=="true"', { | 319 [ 'v8_use_mips_abi_hardfloat=="true"', { |
320 'defines': [ | 320 'defines': [ |
321 '__mips_hard_float=1', | 321 '__mips_hard_float=1', |
322 'CAN_USE_FPU_INSTRUCTIONS', | 322 'CAN_USE_FPU_INSTRUCTIONS', |
323 ], | 323 ], |
324 }, { | 324 }, { |
325 'defines': [ | 325 'defines': [ |
326 '__mips_soft_float=1' | 326 '__mips_soft_float=1' |
327 ], | 327 ], |
328 }], | 328 }], |
329 ['mips_arch_variant=="mips32r2"', { | 329 ['mips_arch_variant=="r2"', { |
330 'defines': ['_MIPS_ARCH_MIPS32R2',], | 330 'defines': ['_MIPS_ARCH_MIPS32R2',], |
331 }], | 331 }], |
332 ['mips_arch_variant=="loongson"', { | 332 ['mips_arch_variant=="loongson"', { |
333 'defines': ['_MIPS_ARCH_LOONGSON',], | 333 'defines': ['_MIPS_ARCH_LOONGSON',], |
334 }], | 334 }], |
335 ], | 335 ], |
336 }], # v8_target_arch=="mipsel" | 336 }], # v8_target_arch=="mipsel" |
| 337 ['v8_target_arch=="mips64el"', { |
| 338 'defines': [ |
| 339 'V8_TARGET_ARCH_MIPS64', |
| 340 ], |
| 341 'variables': { |
| 342 'mipscompiler': '<!($(echo <(CXX)) -v 2>&1 | grep -q "^Target: mips" &
& echo "yes" || echo "no")', |
| 343 }, |
| 344 'conditions': [ |
| 345 ['mipscompiler=="yes"', { |
| 346 'target_conditions': [ |
| 347 ['_toolset=="target"', { |
| 348 'cflags': ['-EL'], |
| 349 'ldflags': ['-EL'], |
| 350 'conditions': [ |
| 351 [ 'v8_use_mips_abi_hardfloat=="true"', { |
| 352 'cflags': ['-mhard-float'], |
| 353 'ldflags': ['-mhard-float'], |
| 354 }, { |
| 355 'cflags': ['-msoft-float'], |
| 356 'ldflags': ['-msoft-float'], |
| 357 }], |
| 358 ['mips_arch_variant=="r2"', { |
| 359 'cflags': ['-mips64r2', '-mabi=64', '-Wa,-mips64r2'], |
| 360 'ldflags': [ |
| 361 '-mips64r2', '-mabi=64', |
| 362 '-Wl,--dynamic-linker=$(LDSO_PATH)', |
| 363 '-Wl,--rpath=$(LD_R_PATH)', |
| 364 ], |
| 365 }], |
| 366 ['mips_arch_variant=="loongson"', { |
| 367 'cflags': ['-mips3', '-Wa,-mips3'], |
| 368 }], |
| 369 ], |
| 370 }], |
| 371 ], |
| 372 }], |
| 373 [ 'v8_can_use_fpu_instructions=="true"', { |
| 374 'defines': [ |
| 375 'CAN_USE_FPU_INSTRUCTIONS', |
| 376 ], |
| 377 }], |
| 378 [ 'v8_use_mips_abi_hardfloat=="true"', { |
| 379 'defines': [ |
| 380 '__mips_hard_float=1', |
| 381 'CAN_USE_FPU_INSTRUCTIONS', |
| 382 ], |
| 383 }, { |
| 384 'defines': [ |
| 385 '__mips_soft_float=1' |
| 386 ], |
| 387 }], |
| 388 ['mips_arch_variant=="r2"', { |
| 389 'defines': ['_MIPS_ARCH_MIPS64R2',], |
| 390 }], |
| 391 ['mips_arch_variant=="loongson"', { |
| 392 'defines': ['_MIPS_ARCH_LOONGSON',], |
| 393 }], |
| 394 ], |
| 395 }], # v8_target_arch=="mips64el" |
337 ['v8_target_arch=="x64"', { | 396 ['v8_target_arch=="x64"', { |
338 'defines': [ | 397 'defines': [ |
339 'V8_TARGET_ARCH_X64', | 398 'V8_TARGET_ARCH_X64', |
340 ], | 399 ], |
341 'xcode_settings': { | 400 'xcode_settings': { |
342 'ARCHS': [ 'x86_64' ], | 401 'ARCHS': [ 'x86_64' ], |
343 }, | 402 }, |
344 'msvs_settings': { | 403 'msvs_settings': { |
345 'VCLinkerTool': { | 404 'VCLinkerTool': { |
346 'StackReserveSize': '2097152', | 405 'StackReserveSize': '2097152', |
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754 'OptimizeReferences': '2', | 813 'OptimizeReferences': '2', |
755 'EnableCOMDATFolding': '2', | 814 'EnableCOMDATFolding': '2', |
756 }, | 815 }, |
757 }, | 816 }, |
758 }], # OS=="win" | 817 }], # OS=="win" |
759 ], # conditions | 818 ], # conditions |
760 }, # Release | 819 }, # Release |
761 }, # configurations | 820 }, # configurations |
762 }, # target_defaults | 821 }, # target_defaults |
763 } | 822 } |
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