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1 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===// | 1 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the skeleton of the TargetLowering class, | 10 // This file implements the skeleton of the TargetLowering class, |
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160 // Drives register allocation, allowing all physical registers (except | 160 // Drives register allocation, allowing all physical registers (except |
161 // perhaps for the frame pointer) to be allocated. This set of | 161 // perhaps for the frame pointer) to be allocated. This set of |
162 // registers could potentially be parameterized if we want to restrict | 162 // registers could potentially be parameterized if we want to restrict |
163 // registers e.g. for performance testing. | 163 // registers e.g. for performance testing. |
164 void TargetLowering::regAlloc() { | 164 void TargetLowering::regAlloc() { |
165 LinearScan LinearScan(Func); | 165 LinearScan LinearScan(Func); |
166 RegSetMask RegInclude = RegSet_None; | 166 RegSetMask RegInclude = RegSet_None; |
167 RegSetMask RegExclude = RegSet_None; | 167 RegSetMask RegExclude = RegSet_None; |
168 RegInclude |= RegSet_CallerSave; | 168 RegInclude |= RegSet_CallerSave; |
169 RegInclude |= RegSet_CalleeSave; | 169 RegInclude |= RegSet_CalleeSave; |
170 RegExclude |= RegSet_StackPointer; | |
171 if (hasFramePointer()) | 170 if (hasFramePointer()) |
172 RegExclude |= RegSet_FramePointer; | 171 RegExclude |= RegSet_FramePointer; |
173 llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude); | 172 llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude); |
174 LinearScan.scan(RegMask); | 173 LinearScan.scan(RegMask); |
175 } | 174 } |
176 | 175 |
177 TargetGlobalInitLowering * | 176 TargetGlobalInitLowering * |
178 TargetGlobalInitLowering::createLowering(TargetArch Target, | 177 TargetGlobalInitLowering::createLowering(TargetArch Target, |
179 GlobalContext *Ctx) { | 178 GlobalContext *Ctx) { |
180 // These statements can be #ifdef'd to specialize the code generator | 179 // These statements can be #ifdef'd to specialize the code generator |
181 // to a subset of the available targets. TODO: use CRTP. | 180 // to a subset of the available targets. TODO: use CRTP. |
182 if (Target == Target_X8632) | 181 if (Target == Target_X8632) |
183 return TargetGlobalInitX8632::create(Ctx); | 182 return TargetGlobalInitX8632::create(Ctx); |
184 #if 0 | 183 #if 0 |
185 if (Target == Target_X8664) | 184 if (Target == Target_X8664) |
186 return IceTargetGlobalInitX8664::create(Ctx); | 185 return IceTargetGlobalInitX8664::create(Ctx); |
187 if (Target == Target_ARM32) | 186 if (Target == Target_ARM32) |
188 return IceTargetGlobalInitARM32::create(Ctx); | 187 return IceTargetGlobalInitARM32::create(Ctx); |
189 if (Target == Target_ARM64) | 188 if (Target == Target_ARM64) |
190 return IceTargetGlobalInitARM64::create(Ctx); | 189 return IceTargetGlobalInitARM64::create(Ctx); |
191 #endif | 190 #endif |
192 llvm_unreachable("Unsupported target"); | 191 llvm_unreachable("Unsupported target"); |
193 return NULL; | 192 return NULL; |
194 } | 193 } |
195 | 194 |
196 } // end of namespace Ice | 195 } // end of namespace Ice |
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