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Side by Side Diff: src/arm64/macro-assembler-arm64.h

Issue 368313002: ARM64: Generate better immediates for shifted ops (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Add comment about bit setting Created 6 years, 5 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ 5 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_H_
6 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ 6 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_H_
7 7
8 #include <vector> 8 #include <vector>
9 9
10 #include "src/globals.h" 10 #include "src/globals.h"
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195 void Mov(const Register& rd, 195 void Mov(const Register& rd,
196 const Operand& operand, 196 const Operand& operand,
197 DiscardMoveMode discard_mode = kDontDiscardForSameWReg); 197 DiscardMoveMode discard_mode = kDontDiscardForSameWReg);
198 void Mov(const Register& rd, uint64_t imm); 198 void Mov(const Register& rd, uint64_t imm);
199 inline void Mvn(const Register& rd, uint64_t imm); 199 inline void Mvn(const Register& rd, uint64_t imm);
200 void Mvn(const Register& rd, const Operand& operand); 200 void Mvn(const Register& rd, const Operand& operand);
201 static bool IsImmMovn(uint64_t imm, unsigned reg_size); 201 static bool IsImmMovn(uint64_t imm, unsigned reg_size);
202 static bool IsImmMovz(uint64_t imm, unsigned reg_size); 202 static bool IsImmMovz(uint64_t imm, unsigned reg_size);
203 static unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size); 203 static unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size);
204 204
205 // Try to move an immediate into the destination register in a single
206 // instruction. Returns true for success, and updates the contents of dst.
207 // Returns false, otherwise.
208 bool TryOneInstrMoveImmediate(const Register& dst, int64_t imm);
209
210 // Move an immediate into register dst, and return an Operand object for use
211 // with a subsequent instruction that accepts a shift. The value moved into
212 // dst is not necessarily equal to imm; it may have had a shifting operation
213 // applied to it that will be subsequently undone by the shift applied in the
214 // Operand.
215 Operand MoveImmediateForShiftedOp(const Register& dst, int64_t imm);
216
205 // Conditional macros. 217 // Conditional macros.
206 inline void Ccmp(const Register& rn, 218 inline void Ccmp(const Register& rn,
207 const Operand& operand, 219 const Operand& operand,
208 StatusFlags nzcv, 220 StatusFlags nzcv,
209 Condition cond); 221 Condition cond);
210 inline void Ccmn(const Register& rn, 222 inline void Ccmn(const Register& rn,
211 const Operand& operand, 223 const Operand& operand,
212 StatusFlags nzcv, 224 StatusFlags nzcv,
213 Condition cond); 225 Condition cond);
214 void ConditionalCompareMacro(const Register& rn, 226 void ConditionalCompareMacro(const Register& rn,
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2320 #error "Unsupported option" 2332 #error "Unsupported option"
2321 #define CODE_COVERAGE_STRINGIFY(x) #x 2333 #define CODE_COVERAGE_STRINGIFY(x) #x
2322 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) 2334 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
2323 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 2335 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
2324 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 2336 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
2325 #else 2337 #else
2326 #define ACCESS_MASM(masm) masm-> 2338 #define ACCESS_MASM(masm) masm->
2327 #endif 2339 #endif
2328 2340
2329 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ 2341 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_H_
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